From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC2C0C2D0DB for ; Wed, 22 Jan 2020 13:16:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C470A205F4 for ; Wed, 22 Jan 2020 13:16:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C470A205F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 436AE6E037; Wed, 22 Jan 2020 13:16:42 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3F4266E037 for ; Wed, 22 Jan 2020 13:16:41 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Jan 2020 05:16:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,350,1574150400"; d="scan'208";a="221230166" Received: from gaia.fi.intel.com ([10.237.72.192]) by fmsmga007.fm.intel.com with ESMTP; 22 Jan 2020 05:16:39 -0800 Received: by gaia.fi.intel.com (Postfix, from userid 1000) id 12AC45C1DD9; Wed, 22 Jan 2020 15:15:58 +0200 (EET) From: Mika Kuoppala To: Chris Wilson , intel-gfx@lists.freedesktop.org In-Reply-To: <20200121222447.419489-1-chris@chris-wilson.co.uk> References: <20200121222447.419489-1-chris@chris-wilson.co.uk> Date: Wed, 22 Jan 2020 15:15:58 +0200 Message-ID: <87ftg7pr75.fsf@gaia.fi.intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH 1/7] drm/i915: Clear the GGTT_WRITE bit on unbinding the vma X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Chris Wilson writes: > While we do flush writes to the vma before unbinding (to make sure they > go through the right detiling register), we may also be concurrently > poking at the GGTT_WRITE bit from set-domain, as we mark all GGTT vma > associated with an object. We know this is for another vma, as we > are currently unbind this one -- so if this vma will be reused, it will > be refaulted and have its dirty bit set before the next write. > > Closes: https://gitlab.freedesktop.org/drm/intel/issues/999 > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_vma.c | 11 +++++++++-- > drivers/gpu/drm/i915/i915_vma_types.h | 1 + > 2 files changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c > index 17d7c525ea5c..eb18b56af3af 100644 > --- a/drivers/gpu/drm/i915/i915_vma.c > +++ b/drivers/gpu/drm/i915/i915_vma.c > @@ -1218,9 +1218,15 @@ int __i915_vma_unbind(struct i915_vma *vma) > * before the unbind, other due to non-strict nature of those > * indirect writes they may end up referencing the GGTT PTE > * after the unbind. > + * > + * Note that we may be concurrently poking at the GGTT_WRITE > + * bit from set-domain, as we mark all GGTT vma associated > + * with an object. We know this is for another vma, as we > + * are currently unbind this one -- so if this vma will be > + * reused, it will be refaulted and have its dirty bit set > + * before the next write. > */ > i915_vma_flush_writes(vma); > - GEM_BUG_ON(i915_vma_has_ggtt_write(vma)); > > /* release the fence reg _after_ flushing */ > ret = i915_vma_revoke_fence(vma); > @@ -1240,7 +1246,8 @@ int __i915_vma_unbind(struct i915_vma *vma) > trace_i915_vma_unbind(vma); > vma->ops->unbind_vma(vma); > } > - atomic_and(~(I915_VMA_BIND_MASK | I915_VMA_ERROR), &vma->flags); > + atomic_and(~(I915_VMA_BIND_MASK | I915_VMA_ERROR | I915_VMA_DIRTY), > + &vma->flags); > > i915_vma_detach(vma); > vma_unbind_pages(vma); > diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h > index e0942efd5236..1ddc450ae766 100644 > --- a/drivers/gpu/drm/i915/i915_vma_types.h > +++ b/drivers/gpu/drm/i915/i915_vma_types.h > @@ -244,6 +244,7 @@ struct i915_vma { > #define I915_VMA_CAN_FENCE_BIT 15 > #define I915_VMA_USERFAULT_BIT 16 > #define I915_VMA_GGTT_WRITE_BIT 17 > +#define I915_VMA_DIRTY ((int)BIT(I915_VMA_GGTT_WRITE_BIT)) You can omit this and use I915_VMA_GGTT_WRITE. With that, Reviewed-by: Mika Kuoppala > > #define I915_VMA_GGTT ((int)BIT(I915_VMA_GGTT_BIT)) > #define I915_VMA_CAN_FENCE ((int)BIT(I915_VMA_CAN_FENCE_BIT)) > -- > 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx