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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Durgadoss R <durgadoss.r@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [RFC DP-typeC 0/2] Support USB typeC based DP on BXT
Date: Wed, 16 Sep 2015 12:48:03 +0300	[thread overview]
Message-ID: <87fv2evgoc.fsf@intel.com> (raw)
In-Reply-To: <1442313301-7053-1-git-send-email-durgadoss.r@intel.com>

On Tue, 15 Sep 2015, Durgadoss R <durgadoss.r@intel.com> wrote:
> This is an RFC series to start the review/discussion on approach
> to support USB type C based DP panel.
>
> To support USB type C alternate DP mode, the display driver needs to
> know the number of lanes required by the DP panel as well as number
> of lanes that can be supported by the type-C cable. Sometimes, the
> type-C cable may limit the bandwidth even if Panel can support
> more lanes.
>
> The goal is to find out the number of lanes which can be supported
> using a particular cable so that we can cap 'max_available_lanes'
> to that number during modeset.
>
> These two patches are based on 4.2-rc2 and tested only on
> a BXT A1 platform for now.
>
> Brief summary of the approach taken:
> -----------------------------------
> 1.As soon as DP-hotplug is detected, driver starts link training
>   with highest number of lanes/bandwidth possible. If it fails,
>   driver retries link training with lane/2 for same bandwidth.
>   We continue this procedure until we find a working configuration
>   of lane/bandwidth values. This 'number of lanes' is then
>   set as the 'max_available_lanes', so that the following
>   intel_dp_compute_config() during modeset picks it up as
>   max_lane_count (instead of 4 always, from DPCD).

Would all of this work automatically if our link training sequence
followed the DP spec to the letter wrt degrading the link on failures?

BR,
Jani.


>
> 2.Since we do only link training on hotplug, only the port
>   and its PLLs are enabled/disabled without touching pipe/
>   planes etc.
>
> 3.For scenarios where we boot with DP connected (along with
>   an LFP like MIPI/eDP) we disable the crtc and then start
>   link training, since BIOS brings up DP. The crtc is
>   enabled back during subsequent modeset. This needs some
>   changes for latest -nightly branch since we do not have
>   intel_crtc_control() anymore.
>
> 4.Since we are doing the link training on hotplug (as
>   opposed to during modeset) we named the function
>   '{chv/bxt/*}_upfront_link_train'. We can also think
>   of a virtual func for this, inside intel_encoder.
>
> Durgadoss R (2):
>   drm/i915/dp: Make bxt_ddi_pll_select non-static
>   drm/i915/dp: Enable Upfront link training for type-C DP support
>
>  drivers/gpu/drm/i915/intel_ddi.c     |  11 +--
>  drivers/gpu/drm/i915/intel_display.c | 130 +++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_dp.c      |  22 ++++++
>  drivers/gpu/drm/i915/intel_drv.h     |   6 ++
>  4 files changed, 165 insertions(+), 4 deletions(-)
>
> -- 
> 1.9.1
>

-- 
Jani Nikula, Intel Open Source Technology Center
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  parent reply	other threads:[~2015-09-16  9:44 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-15 10:34 [RFC DP-typeC 0/2] Support USB typeC based DP on BXT Durgadoss R
2015-09-15 10:35 ` [PATCH 1/2] drm/i915/dp: Make bxt_ddi_pll_select non-static Durgadoss R
2015-09-15 10:35 ` [PATCH 2/2] drm/i915/dp: Enable Upfront link training for typeC DP support on BXT Durgadoss R
2015-09-16  9:48 ` Jani Nikula [this message]
2015-09-16 10:57   ` [RFC DP-typeC 0/2] Support USB typeC based DP " R, Durgadoss
2015-09-23  9:44     ` Daniel Vetter
2015-09-25 12:22       ` R, Durgadoss
2015-09-28  8:19         ` Daniel Vetter
2015-09-28 16:48           ` R, Durgadoss
2015-09-29  9:04             ` Daniel Vetter
2015-09-30 17:32               ` R, Durgadoss
2015-10-01  8:22                 ` Daniel Vetter

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