From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5B513ECAAD4 for ; Fri, 26 Aug 2022 13:14:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AB6E210E8DF; Fri, 26 Aug 2022 13:14:25 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0A33C10E8DF for ; Fri, 26 Aug 2022 13:14:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661519663; x=1693055663; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=y5MbVMVGGNcJ4tgj7K4fNlFHpoFOtN+GdCOCtbWQiyw=; b=ZmVTjpAyD7Ys9jp/U//ti/zssYvMA+ZWoETuXZffYQJOmzDqFrlczvs3 HIq1Ag0u3rnD7CYmKlP859am2VM2TUAGhP6W0dy+SeLEjmKpTMxlBbO6r jczYZLnsDGUt7bnDOYUfsmZXp7gCX4zqg/MMjT6m1+W+pNsnfspWqecIq xTWw1tZ0hIpDI7s3pL5SpFeII9POdpQbko05zILXHsk05ThVIWOx3GLH7 ydfUYWvrZjXEQ+WDL6qFzHf6j1IwXeKKC54pWYE2jH1SL3j/jDc1zgGnf luPKg2OpSnXIiQx/RbJfBkDitL9tD7UeMB52yDbomov4GH/CgrGhCqw1D A==; X-IronPort-AV: E=McAfee;i="6500,9779,10450"; a="293243485" X-IronPort-AV: E=Sophos;i="5.93,265,1654585200"; d="scan'208";a="293243485" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2022 06:14:22 -0700 X-IronPort-AV: E=Sophos;i="5.93,265,1654585200"; d="scan'208";a="938749253" Received: from nmacaddi-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.255.229.56]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2022 06:14:22 -0700 Date: Fri, 26 Aug 2022 06:13:44 -0700 Message-ID: <87h71zjgfr.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Rodrigo Vivi In-Reply-To: <20220826101318.78486-1-rodrigo.vivi@intel.com> References: <87o7w7kh7w.wl-ashutosh.dixit@intel.com> <20220826101318.78486-1-rodrigo.vivi@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/slpc: Fix PCODE IA Freq requests when using SLPC X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, Sushma Venkatesh Reddy , stable@vger.kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, 26 Aug 2022 03:13:18 -0700, Rodrigo Vivi wrote: > > We need to inform PCODE of a desired ring frequencies so PCODE update > the memory frequencies to us. rps->min_freq and rps->max_freq are the > frequencies used in that request. However they were unset when SLPC was > enabled and PCODE never updated the memory freq. > > v2 (as Suggested by Ashutosh): if SLPC is in use, let's pick the right > frequencies from the get_ia_constants instead of the fake init of > rps' min and max. Reviewed-by: Ashutosh Dixit > > Fixes: 7ba79a671568 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled") > Cc: # v5.15+ > Cc: Ashutosh Dixit > Tested-by: Sushma Venkatesh Reddy > Signed-off-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/gt/intel_llc.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c > index 14fe65812e42..766f9526da99 100644 > --- a/drivers/gpu/drm/i915/gt/intel_llc.c > +++ b/drivers/gpu/drm/i915/gt/intel_llc.c > @@ -49,6 +49,7 @@ static unsigned int cpu_max_MHz(void) > static bool get_ia_constants(struct intel_llc *llc, > struct ia_constants *consts) > { > + struct intel_guc_slpc *slpc = &llc_to_gt(llc)->uc.guc.slpc; > struct drm_i915_private *i915 = llc_to_gt(llc)->i915; > struct intel_rps *rps = &llc_to_gt(llc)->rps; > > @@ -65,8 +66,13 @@ static bool get_ia_constants(struct intel_llc *llc, > /* convert DDR frequency from units of 266.6MHz to bandwidth */ > consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3); > > - consts->min_gpu_freq = rps->min_freq; > - consts->max_gpu_freq = rps->max_freq; > + if (intel_uc_uses_guc_slpc(&llc_to_gt(llc)->uc)) { > + consts->min_gpu_freq = slpc->min_freq; > + consts->max_gpu_freq = slpc->rp0_freq; > + } else { > + consts->min_gpu_freq = rps->min_freq; > + consts->max_gpu_freq = rps->max_freq; > + } > if (GRAPHICS_VER(i915) >= 9) { > /* Convert GT frequency to 50 HZ units */ > consts->min_gpu_freq /= GEN9_FREQ_SCALER; > -- > 2.37.1 >