From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Anholt Subject: Re: [PATCH] drm/i915: Add support for resetting the SO write pointers on gen7. Date: Tue, 03 Jan 2012 17:56:09 -0800 Message-ID: <87hb0cmds6.fsf@eliezer.anholt.net> References: <1325209977-27562-1-git-send-email-eric@anholt.net> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1171058508==" Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Eugeni Dodonov Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1171058508== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha1; protocol="application/pgp-signature" --=-=-= Content-Transfer-Encoding: quoted-printable On Mon, 2 Jan 2012 13:04:37 -0200, Eugeni Dodonov wrot= e: > On Thu, Dec 29, 2011 at 23:52, Eric Anholt wrote: >=20 > > These registers are automatically incremented by the hardware during > > transform feedback to track where the next streamed vertex output > > should go. Unlike the previous generation, which had a packet for > > setting the corresponding registers to a defined value, gen7 only has > > MI_LOAD_REGISTER_IMM to do so. That's a secure packet (since it loads > > an arbitrary register), so we need to do it from the kernel, and it > > needs to be settable atomically with the batchbuffer execution so that > > two clients doing transform feedback don't stomp on each others' > > state. > > > > Instead of building a more complicated interface involcing setting the > > registers to a specific value, just set them to 0 when asked and > > userland can tweak its pointers accordingly. > > diff --git a/drivers/gpu/drm/i915/i915_dma.c > > b/drivers/gpu/drm/i915/i915_dma.c > > index a9ae374..1add685 100644 > > --- a/drivers/gpu/drm/i915/i915_dma.c > > +++ b/drivers/gpu/drm/i915/i915_dma.c > > @@ -781,6 +781,9 @@ static int i915_getparam(struct drm_device *dev, vo= id > > *data, > > case I915_PARAM_HAS_RELAXED_DELTA: > > value =3D 1; > > break; > > + case I915_PARAM_HAS_GEN7_SOL_RESET: > > + value =3D 1; > > >=20 > Wouldn't it be better to have: > value =3D IS_GEN7(dev); >=20 > as it is gen7+-specific item. This way, userspace could check for this > support early, and avoid setting the flag on the batchbuffer in vain on > pre-gen7 architectures. >=20 > Either way, it will work, so: >=20 > Reviewed-by: Eugeni Dodonov The flag only gets set by userland in the gen7 code, so it wouldn't change anything. --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iEYEARECAAYFAk8DsbkACgkQHUdvYGzw6vdY4wCbBV/5ZveMNWWCwU01Ohx8SqIR sPsAoITUdQnEn1z0sECjKJVT+MhGBHZu =3cPV -----END PGP SIGNATURE----- --=-=-=-- --===============1171058508== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1171058508==--