From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 07/12] drm/i915/flipq: Provide the nuts and bolts code for flip queue
Date: Fri, 16 May 2025 14:48:43 +0300 [thread overview]
Message-ID: <87ikm0wzc4.fsf@intel.com> (raw)
In-Reply-To: <20250516113408.11689-8-ville.syrjala@linux.intel.com>
On Fri, 16 May 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> diff --git a/drivers/gpu/drm/i915/display/intel_flipq.c b/drivers/gpu/drm/i915/display/intel_flipq.c
> new file mode 100644
> index 000000000000..8677929b7ece
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_flipq.c
> @@ -0,0 +1,306 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
I'd really appreciate adding a high level comment about what flip queue
is, and maybe some words about how it's implemented, right around
here. Doesn't need to be a special DOC comment, nor does it need to be
exhaustive, and can come as a follow-up patch.
BR,
Jani.
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-05-16 11:49 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-16 11:33 [PATCH 00/12] drm/i915/flipq: Rough flip queue implementation Ville Syrjala
2025-05-16 11:33 ` [PATCH 01/12] drm/i915/dsb: Extract intel_dsb_ins_align() Ville Syrjala
2025-05-16 11:33 ` [PATCH 02/12] drm/i915/dsb: Use intel_dsb_ins_align() in intel_dsb_align_tail() Ville Syrjala
2025-05-16 11:33 ` [PATCH 03/12] drm/i915/dsb: Extract assert_dsb_tail_is_aligned() Ville Syrjala
2025-05-16 11:34 ` [PATCH 04/12] drm/i915/dsb: Extract intel_dsb_{head,tail}() Ville Syrjala
2025-05-16 11:34 ` [PATCH 05/12] drm/i915/dsb: Provide intel_dsb_head() and intel_dsb_size() Ville Syrjala
2025-05-18 18:44 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 06/12] drm/i915/dmc: Define flip queue related PIPEDMC registers Ville Syrjala
2025-05-18 19:41 ` Shankar, Uma
2025-05-21 17:43 ` Ville Syrjälä
2025-05-23 9:12 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 07/12] drm/i915/flipq: Provide the nuts and bolts code for flip queue Ville Syrjala
2025-05-16 11:48 ` Jani Nikula [this message]
2025-05-18 20:21 ` Shankar, Uma
2025-05-19 17:08 ` [PATCH v2 " Ville Syrjala
2025-05-20 7:06 ` Shankar, Uma
2025-05-21 17:40 ` Ville Syrjälä
2025-05-23 9:07 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 08/12] drm/i915/flipq: Implement flipq queue based commit path Ville Syrjala
2025-05-18 20:27 ` Shankar, Uma
2025-05-19 17:09 ` [PATCH v2 " Ville Syrjala
2025-05-20 6:53 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 09/12] drm/i915/flipq: Implement Wa_18034343758 Ville Syrjala
2025-05-18 20:32 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 10/12] drm/i915/flipq: Implement Wa_16018781658 for LNL-A0 Ville Syrjala
2025-05-20 7:11 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 11/12] drm/i915/flipq: Add intel_flipq_dump() Ville Syrjala
2025-05-18 20:36 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 12/12] drm/i915/flipq: Enable flipq by default for testing Ville Syrjala
2025-05-16 12:18 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/flipq: Rough flip queue implementation Patchwork
2025-05-16 12:18 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-05-16 12:41 ` ✗ i915.CI.BAT: failure " Patchwork
2025-05-19 17:58 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/flipq: Rough flip queue implementation (rev3) Patchwork
2025-05-19 18:00 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-05-19 18:21 ` ✓ i915.CI.BAT: success " Patchwork
2025-05-19 22:33 ` ✗ i915.CI.Full: failure " Patchwork
2025-05-20 6:56 ` [PATCH 00/12] drm/i915/flipq: Rough flip queue implementation Shankar, Uma
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