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* [PATCH] drm/i915/bxt: Enable VBT based BL control for DP (v2)
@ 2018-01-10  2:25 Mustamin B Mustaffa
  2018-01-10  2:26 ` ✗ Fi.CI.BAT: failure for drm/i915/bxt: Enable VBT based BL control for DP (rev4) Patchwork
  2018-01-16 10:02 ` [PATCH] drm/i915/bxt: Enable VBT based BL control for DP (v2) Jani Nikula
  0 siblings, 2 replies; 8+ messages in thread
From: Mustamin B Mustaffa @ 2018-01-10  2:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: Mustamin B Mustaffa

Currently, BXT_PP is hardcoded with value '0'.
It practically disabled eDP backlight on MRB (BXT) platform.

This patch will tell which BXT_PP registers (there are two set of PP_CONTROL in the spec)
to be used as defined in VBT (Video Bios Timing table) and this will enabled eDP
backlight controller on MRB (BXT) platform.

v2:
 - Remove unnecessary information in commit message
 - Assign vbt.backlight.controller to a backlight_controller variable and return
   the variable value.

Signed-off-by: Mustamin B Mustaffa <mustamin.b.mustaffa@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 09f2744..e00569f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -640,19 +640,15 @@ static enum pipe vlv_find_free_pps(struct drm_i915_private *dev_priv)
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 	struct drm_device *dev = intel_dig_port->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
+	int backlight_controller = dev_priv->vbt.backlight.controller;
 
 	lockdep_assert_held(&dev_priv->pps_mutex);
 
 	/* We should never land here with regular DP ports */
 	WARN_ON(!is_edp(intel_dp));
 
-	/*
-	 * TODO: BXT has 2 PPS instances. The correct port->PPS instance
-	 * mapping needs to be retrieved from VBT, for now just hard-code to
-	 * use instance #0 always.
-	 */
 	if (!intel_dp->pps_reset)
-		return 0;
+		return backlight_controller;
 
 	intel_dp->pps_reset = false;
 
@@ -662,7 +658,7 @@ static enum pipe vlv_find_free_pps(struct drm_i915_private *dev_priv)
 	 */
 	intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, false);
 
-	return 0;
+	return backlight_controller;
 }
 
 typedef bool (*vlv_pipe_check)(struct drm_i915_private *dev_priv,
-- 
1.9.1

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH] drm/i915/bxt: Enable VBT based BL control for DP (v2)
@ 2017-06-07  9:12 Mustamin B Mustaffa
  0 siblings, 0 replies; 8+ messages in thread
From: Mustamin B Mustaffa @ 2017-06-07  9:12 UTC (permalink / raw)
  To: intel-gfx; +Cc: Mustamin B Mustaffa

Currently, BXT_PP is hardcoded with value '0'.
It practically disabled eDP backlight on MRB (BXT) platform.

This patch will tell which BXT_PP registers (there are two set of PP_CONTROL in the spec)
to be used as defined in VBT (Video Bios Timing table) and this will enabled eDP
backlight controller on MRB (BXT) platform.

v2:
 - Remove unnecessary information in commit message
 - Assign vbt.backlight.controller to a backlight_controller variable and return
   the variable value.

Signed-off-by: Mustamin B Mustaffa <mustamin.b.mustaffa@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index d1670b8..4c55ef0 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -585,19 +585,15 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 	struct drm_device *dev = intel_dig_port->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
+	int backlight_controller = dev_priv->vbt.backlight.controller;
 
 	lockdep_assert_held(&dev_priv->pps_mutex);
 
 	/* We should never land here with regular DP ports */
 	WARN_ON(!is_edp(intel_dp));
 
-	/*
-	 * TODO: BXT has 2 PPS instances. The correct port->PPS instance
-	 * mapping needs to be retrieved from VBT, for now just hard-code to
-	 * use instance #0 always.
-	 */
 	if (!intel_dp->pps_reset)
-		return 0;
+		return backlight_controller;
 
 	intel_dp->pps_reset = false;
 
@@ -607,7 +603,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
 	 */
 	intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, false);
 
-	return 0;
+	return backlight_controller;
 }
 
 typedef bool (*vlv_pipe_check)(struct drm_i915_private *dev_priv,
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2018-02-15 14:14 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-01-10  2:25 [PATCH] drm/i915/bxt: Enable VBT based BL control for DP (v2) Mustamin B Mustaffa
2018-01-10  2:26 ` ✗ Fi.CI.BAT: failure for drm/i915/bxt: Enable VBT based BL control for DP (rev4) Patchwork
2018-01-16 10:02 ` [PATCH] drm/i915/bxt: Enable VBT based BL control for DP (v2) Jani Nikula
2018-02-09 10:45   ` Mustaffa, Mustamin B
2018-02-13 15:53     ` Jani Nikula
2018-02-14  2:58       ` Mustaffa, Mustamin B
2018-02-15 14:13         ` Jani Nikula
  -- strict thread matches above, loose matches on Subject: below --
2017-06-07  9:12 Mustamin B Mustaffa

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