From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jani Nikula <jani.nikula@intel.com>
Subject: Re: [GLK MIPI DSI V5 5/8] drm/i915/glk: Add DSI PLL
	divider range for glk
Date: Thu, 16 Feb 2017 17:13:03 +0200
Message-ID: <87inoamao0.fsf@intel.com>
References: <1487078180-15147-1-git-send-email-madhav.chauhan@intel.com>
 <1487078180-15147-6-git-send-email-madhav.chauhan@intel.com>
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To: Madhav Chauhan <madhav.chauhan@intel.com>, intel-gfx@lists.freedesktop.org
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