[PATCH] drm/i915: Reudce CHV DPLL min vco frequency to 4.8 GHz

[PATCH] drm/i915: Reudce CHV DPLL min vco frequency to 4.8 GHz

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The current minimum vco frequency leaves us with a gap in our supported
frequencies at 233-243 MHz. Your typical 2560x1440@60 display wants a
pixel clock of 241.5 MHz, which is just withing that gap. Reduce the
allowed vco min frequency to 4.8GHz to reduce the gap to 233-240 MHz,
and thus allow such displays to work.

4.8 GHz is actually the documented (at least in some docs) limit of the
PLL, and we just picked 4.86 GHz originally because that was the lowest
value produced by the PLL spreadsheet, which obviously didn't consider
2560x1440 displays.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 102b12d..d437a21 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -390,7 +390,7 @@ static const intel_limit_t intel_limits_chv = {
 	 * them would make no difference.
 	 */
 	.dot = { .min = 25000 * 5, .max = 540000 * 5},
-	.vco = { .min = 4860000, .max = 6700000 },
+	.vco = { .min = 4800000, .max = 6700000 },
 	.n = { .min = 1, .max = 1 },
 	.m1 = { .min = 2, .max = 2 },
 	.m2 = { .min = 24 << 22, .max = 175 << 22 },
-- 
2.0.5

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Reudce CHV DPLL min vco frequency to 4.8 GHz

[shuang.he]

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5845
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  282/282              282/282
ILK                 -1              308/308              307/308
SNB                                  326/326              326/326
IVB                                  379/379              379/379
BYT                                  294/294              294/294
HSW                 -1              387/387              386/387
BDW                 -1              316/316              315/316
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*ILK  igt_kms_flip_rcs-wf_vblank-vs-dpms-interruptible      PASS(4)      DMESG_WARN(1)PASS(1)
*HSW  igt_gem_storedw_batches_loop_normal      PASS(4)      DMESG_WARN(1)PASS(1)
*BDW  igt_gem_gtt_hog      PASS(15)      DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Reudce CHV DPLL min vco frequency to 4.8 GHz

[Purushothaman, Vijay A]

On 2/27/2015 12:31 AM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The current minimum vco frequency leaves us with a gap in our supported
> frequencies at 233-243 MHz. Your typical 2560x1440@60 display wants a
> pixel clock of 241.5 MHz, which is just withing that gap. Reduce the
> allowed vco min frequency to 4.8GHz to reduce the gap to 233-240 MHz,
> and thus allow such displays to work.
>
> 4.8 GHz is actually the documented (at least in some docs) limit of the
> PLL, and we just picked 4.86 GHz originally because that was the lowest
> value produced by the PLL spreadsheet, which obviously didn't consider
> 2560x1440 displays.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_display.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 102b12d..d437a21 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -390,7 +390,7 @@ static const intel_limit_t intel_limits_chv = {
>   	 * them would make no difference.
>   	 */
>   	.dot = { .min = 25000 * 5, .max = 540000 * 5},
> -	.vco = { .min = 4860000, .max = 6700000 },
> +	.vco = { .min = 4800000, .max = 6700000 },
>   	.n = { .min = 1, .max = 1 },
>   	.m1 = { .min = 2, .max = 2 },
>   	.m2 = { .min = 24 << 22, .max = 175 << 22 },

Minor nitpick: typo in patch title

Reviewed-by: Vijay Purushothaman <vijay.a.purushothaman@linux.intel.com>

Thanks,
Vijay
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Reudce CHV DPLL min vco frequency to 4.8 GHz

[Ville Syrjälä]

On Wed, Mar 04, 2015 at 08:11:38PM +0530, Purushothaman, Vijay A wrote:
> On 2/27/2015 12:31 AM, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The current minimum vco frequency leaves us with a gap in our supported
> > frequencies at 233-243 MHz. Your typical 2560x1440@60 display wants a
> > pixel clock of 241.5 MHz, which is just withing that gap. Reduce the
> > allowed vco min frequency to 4.8GHz to reduce the gap to 233-240 MHz,
> > and thus allow such displays to work.
> >
> > 4.8 GHz is actually the documented (at least in some docs) limit of the
> > PLL, and we just picked 4.86 GHz originally because that was the lowest
> > value produced by the PLL spreadsheet, which obviously didn't consider
> > 2560x1440 displays.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >   drivers/gpu/drm/i915/intel_display.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 102b12d..d437a21 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -390,7 +390,7 @@ static const intel_limit_t intel_limits_chv = {
> >   	 * them would make no difference.
> >   	 */
> >   	.dot = { .min = 25000 * 5, .max = 540000 * 5},
> > -	.vco = { .min = 4860000, .max = 6700000 },
> > +	.vco = { .min = 4800000, .max = 6700000 },
> >   	.n = { .min = 1, .max = 1 },
> >   	.m1 = { .min = 2, .max = 2 },
> >   	.m2 = { .min = 24 << 22, .max = 175 << 22 },
> 
> Minor nitpick: typo in patch title

Dang. I already fixed a typo there before sending this out, but turns
out I only managed to cchange it into a different typo :( Maybe I need
to invest in a spell checker...

> 
> Reviewed-by: Vijay Purushothaman <vijay.a.purushothaman@linux.intel.com>
> 
> Thanks,
> Vijay
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Reudce CHV DPLL min vco frequency to 4.8 GHz

[Daniel Vetter]

On Wed, Mar 04, 2015 at 05:10:02PM +0200, Ville Syrjälä wrote:
> On Wed, Mar 04, 2015 at 08:11:38PM +0530, Purushothaman, Vijay A wrote:
> > On 2/27/2015 12:31 AM, ville.syrjala@linux.intel.com wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > The current minimum vco frequency leaves us with a gap in our supported
> > > frequencies at 233-243 MHz. Your typical 2560x1440@60 display wants a
> > > pixel clock of 241.5 MHz, which is just withing that gap. Reduce the
> > > allowed vco min frequency to 4.8GHz to reduce the gap to 233-240 MHz,
> > > and thus allow such displays to work.
> > >
> > > 4.8 GHz is actually the documented (at least in some docs) limit of the
> > > PLL, and we just picked 4.86 GHz originally because that was the lowest
> > > value produced by the PLL spreadsheet, which obviously didn't consider
> > > 2560x1440 displays.
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >   drivers/gpu/drm/i915/intel_display.c | 2 +-
> > >   1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > > index 102b12d..d437a21 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -390,7 +390,7 @@ static const intel_limit_t intel_limits_chv = {
> > >   	 * them would make no difference.
> > >   	 */
> > >   	.dot = { .min = 25000 * 5, .max = 540000 * 5},
> > > -	.vco = { .min = 4860000, .max = 6700000 },
> > > +	.vco = { .min = 4800000, .max = 6700000 },
> > >   	.n = { .min = 1, .max = 1 },
> > >   	.m1 = { .min = 2, .max = 2 },
> > >   	.m2 = { .min = 24 << 22, .max = 175 << 22 },
> > 
> > Minor nitpick: typo in patch title
> 
> Dang. I already fixed a typo there before sending this out, but turns
> out I only managed to cchange it into a different typo :( Maybe I need
> to invest in a spell checker...

Fixed and applied, thanks.
-Daniel

> 
> > 
> > Reviewed-by: Vijay Purushothaman <vijay.a.purushothaman@linux.intel.com>
> > 
> > Thanks,
> > Vijay
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

checkpatch spell checking (was: Re: [PATCH] drm/i915: Reudce CHV DPLL min vco frequency to 4.8 GHz)

[Jani Nikula]

On Wed, 04 Mar 2015, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Wed, Mar 04, 2015 at 08:11:38PM +0530, Purushothaman, Vijay A wrote:
>> Minor nitpick: typo in patch title
>
> Dang. I already fixed a typo there before sending this out, but turns
> out I only managed to cchange it into a different typo :( Maybe I need
> to invest in a spell checker...

These days checkpatch.pl does some of this for you (see
scripts/spelling.txt). However your "reudce" isn't there, and, more
importantly, AFAICT checkpatch.pl does not look at the patch subject
anyway.

Joe, Andy, hint, hint. ;)


BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: checkpatch spell checking (was: Re: [Intel-gfx] [PATCH] drm/i915: Reudce CHV DPLL min vco frequency to 4.8 GHz)

[Joe Perches]

On Thu, 2015-03-05 at 09:43 +0200, Jani Nikula wrote:
> On Wed, 04 Mar 2015, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Wed, Mar 04, 2015 at 08:11:38PM +0530, Purushothaman, Vijay A wrote:
> >> Minor nitpick: typo in patch title
> >
> > Dang. I already fixed a typo there before sending this out, but turns
> > out I only managed to cchange it into a different typo :( Maybe I need
> > to invest in a spell checker...
> 
> These days checkpatch.pl does some of this for you (see
> scripts/spelling.txt). However your "reudce" isn't there, and, more
> importantly, AFAICT checkpatch.pl does not look at the patch subject
> anyway.
> 
> Joe, Andy, hint, hint. ;)

Patches happily accepted, (hint back..:)

(adding Kees Cook too)

[PATCH] checkpatch: Add spell checking of email subject line

[Joe Perches]

Only commit log and patch additions are checked for
typos and spelling errors currently.  Add a check
of the email subject line too.

Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Joe Perches <joe@perches.com>
---
 scripts/checkpatch.pl | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 421bbb4..c061a63 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -2303,7 +2303,8 @@ sub process {
 		}
 
 # Check for various typo / spelling mistakes
-		if (defined($misspellings) && ($in_commit_log || $line =~ /^\+/)) {
+		if (defined($misspellings) &&
+		    ($in_commit_log || $line =~ /^(?:\+|Subject:)/i)) {
 			while ($rawline =~ /(?:^|[^a-z@])($misspellings)(?:$|[^a-z@])/gi) {
 				my $typo = $1;
 				my $typo_fix = $spelling_fix{lc($typo)};


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] checkpatch: Add spell checking of email subject line

[Jani Nikula]

On Thu, 05 Mar 2015, Joe Perches <joe@perches.com> wrote:
> Only commit log and patch additions are checked for
> typos and spelling errors currently.  Add a check
> of the email subject line too.
>
> Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Joe Perches <joe@perches.com>

Thanks Joe.

FWIW,

Tested-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  scripts/checkpatch.pl | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
> index 421bbb4..c061a63 100755
> --- a/scripts/checkpatch.pl
> +++ b/scripts/checkpatch.pl
> @@ -2303,7 +2303,8 @@ sub process {
>  		}
>  
>  # Check for various typo / spelling mistakes
> -		if (defined($misspellings) && ($in_commit_log || $line =~ /^\+/)) {
> +		if (defined($misspellings) &&
> +		    ($in_commit_log || $line =~ /^(?:\+|Subject:)/i)) {
>  			while ($rawline =~ /(?:^|[^a-z@])($misspellings)(?:$|[^a-z@])/gi) {
>  				my $typo = $1;
>  				my $typo_fix = $spelling_fix{lc($typo)};
>
>

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH] checkpatch: spell check reudce

[Jani Nikula]

References: http://mid.gmane.org/1424977312-24902-1-git-send-email-ville.syrjala@linux.intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 scripts/spelling.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/spelling.txt b/scripts/spelling.txt
index fc7fd52b5e03..bb8e4d0a1911 100644
--- a/scripts/spelling.txt
+++ b/scripts/spelling.txt
@@ -825,6 +825,7 @@ retreived||retrieved
 retreive||retrieve
 retrive||retrieve
 retuned||returned
+reudce||reduce
 reuest||request
 reuqest||request
 reutnred||returned
-- 
2.1.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] checkpatch: spell check reudce

[shuang.he]

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5903
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -2              275/275              273/275
ILK                                  307/307              307/307
SNB                                  284/284              284/284
IVB                                  375/375              375/375
BYT                                  294/294              294/294
HSW                                  385/385              385/385
BDW                 -1              314/314              313/314
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 PNV  igt_gen3_render_tiledx_blits      FAIL(1)PASS(3)      FAIL(2)
 PNV  igt_gen3_render_tiledy_blits      FAIL(1)PASS(1)      FAIL(2)
*BDW  igt_gem_gtt_hog      PASS(2)      DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx