From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mika Kuoppala Subject: Re: [PATCH 2/7] drm/i915: Add RP0/RP1/RPn render P state thresholds in VLV sysfs Date: Fri, 11 Jul 2014 17:44:35 +0300 Message-ID: <87ion4j6p8.fsf@gaia.fi.intel.com> References: <1404978387-28180-1-git-send-email-deepak.s@linux.intel.com> <1404978387-28180-3-git-send-email-deepak.s@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 65AF86E08C for ; Fri, 11 Jul 2014 07:44:53 -0700 (PDT) In-Reply-To: <1404978387-28180-3-git-send-email-deepak.s@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: deepak.s@linux.intel.com, intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org deepak.s@linux.intel.com writes: > From: Deepak S > > This is useful for userspace utilities to verify and micromanaging the > increase/decrease frequncy. > > Signed-off-by: Deepak S Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/i915_sysfs.c | 18 +++++++++++++++--- > 1 file changed, 15 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c > index 86ce39a..b15c8ce 100644 > --- a/drivers/gpu/drm/i915/i915_sysfs.c > +++ b/drivers/gpu/drm/i915/i915_sysfs.c > @@ -461,11 +461,20 @@ static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr > mutex_unlock(&dev->struct_mutex); > > if (attr == &dev_attr_gt_RP0_freq_mhz) { > - val = ((rp_state_cap & 0x0000ff) >> 0) * GT_FREQUENCY_MULTIPLIER; > + if (IS_VALLEYVIEW(dev)) > + val = vlv_gpu_freq(dev_priv, dev_priv->rps.rp0_freq); > + else > + val = ((rp_state_cap & 0x0000ff) >> 0) * GT_FREQUENCY_MULTIPLIER; > } else if (attr == &dev_attr_gt_RP1_freq_mhz) { > - val = ((rp_state_cap & 0x00ff00) >> 8) * GT_FREQUENCY_MULTIPLIER; > + if (IS_VALLEYVIEW(dev)) > + val = vlv_gpu_freq(dev_priv, dev_priv->rps.rp1_freq); > + else > + val = ((rp_state_cap & 0x00ff00) >> 8) * GT_FREQUENCY_MULTIPLIER; > } else if (attr == &dev_attr_gt_RPn_freq_mhz) { > - val = ((rp_state_cap & 0xff0000) >> 16) * GT_FREQUENCY_MULTIPLIER; > + if (IS_VALLEYVIEW(dev)) > + val = vlv_gpu_freq(dev_priv, dev_priv->rps.min_freq); > + else > + val = ((rp_state_cap & 0xff0000) >> 16) * GT_FREQUENCY_MULTIPLIER; > } else { > BUG(); > } > @@ -486,6 +495,9 @@ static const struct attribute *vlv_attrs[] = { > &dev_attr_gt_cur_freq_mhz.attr, > &dev_attr_gt_max_freq_mhz.attr, > &dev_attr_gt_min_freq_mhz.attr, > + &dev_attr_gt_RP0_freq_mhz.attr, > + &dev_attr_gt_RP1_freq_mhz.attr, > + &dev_attr_gt_RPn_freq_mhz.attr, > &dev_attr_vlv_rpe_freq_mhz.attr, > NULL, > }; > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx