From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Ben Widawsky <ben@bwidawsk.net>,
Anuj Phogat <anuj.phogat@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH] drm/i915/cnl: WA FtrEnableFastAnisoL1BankingFix
Date: Wed, 30 Aug 2017 11:55:21 +0300 [thread overview]
Message-ID: <87k21l4epy.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20170829230723.20898-1-rodrigo.vivi@intel.com>
Rodrigo Vivi <rodrigo.vivi@intel.com> writes:
> WA to enable HW L1 Banking fix that allows aniso to operate
> at full sample rate.
>
References: HSD#1937670
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Ben Widawsky <ben@bwidawsk.net>
> Cc: Anuj Phogat <anuj.phogat@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e2908ae34004..1ad22a824921 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8072,6 +8072,7 @@ enum {
> #define HSW_SAMPLE_C_PERFORMANCE (1<<9)
> #define GEN8_CENTROID_PIXEL_OPT_DIS (1<<8)
> #define GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC (1<<5)
> +#define CNL_FAST_ANISO_L1_BANKING_FIX (1<<4)
> #define GEN8_SAMPLER_POWER_BYPASS_DIS (1<<1)
>
> #define GEN9_HALF_SLICE_CHICKEN7 _MMIO(0xe194)
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index a6ac9d0a4156..4b9b7828802d 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -1090,6 +1090,9 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
> /* WaPushConstantDereferenceHoldDisable:cnl */
> WA_SET_BIT(GEN7_ROW_CHICKEN2, PUSH_CONSTANT_DEREF_DISABLE);
>
> + /* FtrEnableFastAnisoL1BankingFix: cnl */
> + WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3, CNL_FAST_ANISO_L1_BANKING_FIX);
> +
> /* WaEnablePreemptionGranularityControlByUMD:cnl */
> ret= wa_ring_whitelist_reg(engine, GEN8_CS_CHICKEN1);
> if (ret)
> --
> 2.13.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2017-08-30 8:56 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-29 23:07 [PATCH] drm/i915/cnl: WA FtrEnableFastAnisoL1BankingFix Rodrigo Vivi
2017-08-29 23:26 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-08-30 1:53 ` ✓ Fi.CI.IGT: " Patchwork
2017-08-30 8:55 ` Mika Kuoppala [this message]
2017-08-31 4:59 ` [PATCH] " Vivi, Rodrigo
2017-09-05 20:17 ` Oscar Mateo
2017-09-05 22:03 ` Vivi, Rodrigo
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