* [PATCH] drm/i915: Clean up device info structure definitions
@ 2015-12-01 19:34 Wayne Boyer
2015-12-02 12:35 ` Jani Nikula
0 siblings, 1 reply; 7+ messages in thread
From: Wayne Boyer @ 2015-12-01 19:34 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Beginning with gen7, newer devices repetitively redefine values
for the device info structure members. This patch simplifies the
structure definitions by grouping member value definitions into the
existing GEN7_FEATURES #define and into the new GEN7_LP_FEATURES
and HSW_FEATURES #defines.
Specifically, GEN_DEFAULT_PIPEOFFSETS and IVB_CURSOR_OFFSETS are
added to GEN7_FEATURES and subsequent IVB definitions are simplified.
GEN7_LP_FEATURES is created to differentiate and simplify the
gen7 low power (LP) devices.
HSW_FEATURES is created and used to simplify all HSW+ devices
except for LP.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 137 ++++++++++------------------------------
1 file changed, 35 insertions(+), 102 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 90faa8e..5f8b0ff 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -226,125 +226,87 @@ static const struct intel_device_info intel_sandybridge_m_info = {
#define GEN7_FEATURES \
.gen = 7, .num_pipes = 3, \
.need_gfx_hws = 1, .has_hotplug = 1, \
.has_fbc = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
- .has_llc = 1
+ .has_llc = 1, \
+ GEN_DEFAULT_PIPEOFFSETS, \
+ IVB_CURSOR_OFFSETS
static const struct intel_device_info intel_ivybridge_d_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_ivybridge_m_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
.is_mobile = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_ivybridge_q_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
.num_pipes = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
+#define GEN7_LP_FEATURES \
+ .gen = 7, .num_pipes = 2, \
+ .need_gfx_hws = 1, .has_hotplug = 1, \
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
+ .display_mmio_offset = VLV_DISPLAY_BASE, \
+ GEN_DEFAULT_PIPEOFFSETS, \
+ CURSOR_OFFSETS
+
static const struct intel_device_info intel_valleyview_m_info = {
- GEN7_FEATURES,
- .is_mobile = 1,
- .num_pipes = 2,
+ GEN7_LP_FEATURES,
.is_valleyview = 1,
- .display_mmio_offset = VLV_DISPLAY_BASE,
- .has_fbc = 0, /* legal, last one wins */
- .has_llc = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- CURSOR_OFFSETS,
+ .is_mobile = 1,
};
static const struct intel_device_info intel_valleyview_d_info = {
- GEN7_FEATURES,
- .num_pipes = 2,
+ GEN7_LP_FEATURES,
.is_valleyview = 1,
- .display_mmio_offset = VLV_DISPLAY_BASE,
- .has_fbc = 0, /* legal, last one wins */
- .has_llc = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- CURSOR_OFFSETS,
};
+#define HSW_FEATURES \
+ GEN7_FEATURES, \
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
+ .has_ddi = 1, \
+ .has_fpga_dbg = 1
+
static const struct intel_device_info intel_haswell_d_info = {
- GEN7_FEATURES,
+ HSW_FEATURES,
.is_haswell = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_haswell_m_info = {
- GEN7_FEATURES,
+ HSW_FEATURES,
.is_haswell = 1,
.is_mobile = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broadwell_d_info = {
- .gen = 8, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ HSW_FEATURES,
+ .gen = 8,
};
static const struct intel_device_info intel_broadwell_m_info = {
- .gen = 8, .is_mobile = 1, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ HSW_FEATURES,
+ .gen = 8, .is_mobile = 1,
};
static const struct intel_device_info intel_broadwell_gt3d_info = {
- .gen = 8, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ HSW_FEATURES,
+ .gen = 8,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broadwell_gt3m_info = {
- .gen = 8, .is_mobile = 1, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ HSW_FEATURES,
+ .gen = 8, .is_mobile = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_cherryview_info = {
.gen = 8, .num_pipes = 3,
.need_gfx_hws = 1, .has_hotplug = 1,
@@ -354,33 +316,19 @@ static const struct intel_device_info intel_cherryview_info = {
GEN_CHV_PIPEOFFSETS,
CURSOR_OFFSETS,
};
static const struct intel_device_info intel_skylake_info = {
+ HSW_FEATURES,
.is_skylake = 1,
- .gen = 9, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ .gen = 9,
};
static const struct intel_device_info intel_skylake_gt3_info = {
.is_skylake = 1,
- .gen = 9, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ .gen = 9,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broxton_info = {
.is_preliminary = 1,
.is_broxton = 1,
@@ -394,37 +342,22 @@ static const struct intel_device_info intel_broxton_info = {
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_kabylake_info = {
+ HSW_FEATURES,
.is_preliminary = 1,
.is_kabylake = 1,
.gen = 9,
- .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_kabylake_gt3_info = {
+ HSW_FEATURES,
.is_preliminary = 1,
.is_kabylake = 1,
.gen = 9,
- .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
/*
* Make sure any device matches here are from most specific to most
* general. For example, since the Quanta match is based on the subsystem
--
2.6.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Clean up device info structure definitions
2015-12-01 19:34 [PATCH] drm/i915: Clean up device info structure definitions Wayne Boyer
@ 2015-12-02 12:35 ` Jani Nikula
2015-12-02 21:28 ` Wayne Boyer
0 siblings, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2015-12-02 12:35 UTC (permalink / raw)
To: Wayne Boyer, intel-gfx; +Cc: Rodrigo Vivi
On Tue, 01 Dec 2015, Wayne Boyer <wayne.boyer@intel.com> wrote:
> Beginning with gen7, newer devices repetitively redefine values
> for the device info structure members. This patch simplifies the
> structure definitions by grouping member value definitions into the
> existing GEN7_FEATURES #define and into the new GEN7_LP_FEATURES
> and HSW_FEATURES #defines.
>
> Specifically, GEN_DEFAULT_PIPEOFFSETS and IVB_CURSOR_OFFSETS are
> added to GEN7_FEATURES and subsequent IVB definitions are simplified.
>
> GEN7_LP_FEATURES is created to differentiate and simplify the
> gen7 low power (LP) devices.
Not convinced on this one, maybe just go for VLV_FEATURES.
Otherwise seems fine.
BR,
Jani.
>
> HSW_FEATURES is created and used to simplify all HSW+ devices
> except for LP.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 137 ++++++++++------------------------------
> 1 file changed, 35 insertions(+), 102 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 90faa8e..5f8b0ff 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -226,125 +226,87 @@ static const struct intel_device_info intel_sandybridge_m_info = {
> #define GEN7_FEATURES \
> .gen = 7, .num_pipes = 3, \
> .need_gfx_hws = 1, .has_hotplug = 1, \
> .has_fbc = 1, \
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> - .has_llc = 1
> + .has_llc = 1, \
> + GEN_DEFAULT_PIPEOFFSETS, \
> + IVB_CURSOR_OFFSETS
>
> static const struct intel_device_info intel_ivybridge_d_info = {
> GEN7_FEATURES,
> .is_ivybridge = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_ivybridge_m_info = {
> GEN7_FEATURES,
> .is_ivybridge = 1,
> .is_mobile = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_ivybridge_q_info = {
> GEN7_FEATURES,
> .is_ivybridge = 1,
> .num_pipes = 0, /* legal, last one wins */
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> +#define GEN7_LP_FEATURES \
> + .gen = 7, .num_pipes = 2, \
> + .need_gfx_hws = 1, .has_hotplug = 1, \
> + .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> + .display_mmio_offset = VLV_DISPLAY_BASE, \
> + GEN_DEFAULT_PIPEOFFSETS, \
> + CURSOR_OFFSETS
> +
> static const struct intel_device_info intel_valleyview_m_info = {
> - GEN7_FEATURES,
> - .is_mobile = 1,
> - .num_pipes = 2,
> + GEN7_LP_FEATURES,
> .is_valleyview = 1,
> - .display_mmio_offset = VLV_DISPLAY_BASE,
> - .has_fbc = 0, /* legal, last one wins */
> - .has_llc = 0, /* legal, last one wins */
> - GEN_DEFAULT_PIPEOFFSETS,
> - CURSOR_OFFSETS,
> + .is_mobile = 1,
> };
>
> static const struct intel_device_info intel_valleyview_d_info = {
> - GEN7_FEATURES,
> - .num_pipes = 2,
> + GEN7_LP_FEATURES,
> .is_valleyview = 1,
> - .display_mmio_offset = VLV_DISPLAY_BASE,
> - .has_fbc = 0, /* legal, last one wins */
> - .has_llc = 0, /* legal, last one wins */
> - GEN_DEFAULT_PIPEOFFSETS,
> - CURSOR_OFFSETS,
> };
>
> +#define HSW_FEATURES \
> + GEN7_FEATURES, \
> + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
> + .has_ddi = 1, \
> + .has_fpga_dbg = 1
> +
> static const struct intel_device_info intel_haswell_d_info = {
> - GEN7_FEATURES,
> + HSW_FEATURES,
> .is_haswell = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_haswell_m_info = {
> - GEN7_FEATURES,
> + HSW_FEATURES,
> .is_haswell = 1,
> .is_mobile = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_broadwell_d_info = {
> - .gen = 8, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> + HSW_FEATURES,
> + .gen = 8,
> };
>
> static const struct intel_device_info intel_broadwell_m_info = {
> - .gen = 8, .is_mobile = 1, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> + HSW_FEATURES,
> + .gen = 8, .is_mobile = 1,
> };
>
> static const struct intel_device_info intel_broadwell_gt3d_info = {
> - .gen = 8, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> + HSW_FEATURES,
> + .gen = 8,
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_broadwell_gt3m_info = {
> - .gen = 8, .is_mobile = 1, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> + HSW_FEATURES,
> + .gen = 8, .is_mobile = 1,
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_cherryview_info = {
> .gen = 8, .num_pipes = 3,
> .need_gfx_hws = 1, .has_hotplug = 1,
> @@ -354,33 +316,19 @@ static const struct intel_device_info intel_cherryview_info = {
> GEN_CHV_PIPEOFFSETS,
> CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_skylake_info = {
> + HSW_FEATURES,
> .is_skylake = 1,
> - .gen = 9, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> + .gen = 9,
> };
>
> static const struct intel_device_info intel_skylake_gt3_info = {
> .is_skylake = 1,
> - .gen = 9, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> + .gen = 9,
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_broxton_info = {
> .is_preliminary = 1,
> .is_broxton = 1,
> @@ -394,37 +342,22 @@ static const struct intel_device_info intel_broxton_info = {
> GEN_DEFAULT_PIPEOFFSETS,
> IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_kabylake_info = {
> + HSW_FEATURES,
> .is_preliminary = 1,
> .is_kabylake = 1,
> .gen = 9,
> - .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_kabylake_gt3_info = {
> + HSW_FEATURES,
> .is_preliminary = 1,
> .is_kabylake = 1,
> .gen = 9,
> - .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> /*
> * Make sure any device matches here are from most specific to most
> * general. For example, since the Quanta match is based on the subsystem
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH] drm/i915: Clean up device info structure definitions
2015-12-02 12:35 ` Jani Nikula
@ 2015-12-02 21:28 ` Wayne Boyer
2015-12-04 10:24 ` Daniel Vetter
2015-12-04 18:06 ` Wayne Boyer
0 siblings, 2 replies; 7+ messages in thread
From: Wayne Boyer @ 2015-12-02 21:28 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Beginning with gen7, newer devices repetitively redefine values
for the device info structure members. This patch simplifies the
structure definitions by grouping member value definitions into the
existing GEN7_FEATURES #define and into the new GEN7_LP_FEATURES
and HSW_FEATURES #defines.
Specifically, GEN_DEFAULT_PIPEOFFSETS and IVB_CURSOR_OFFSETS are
added to GEN7_FEATURES and subsequent IVB definitions are simplified.
VLV_FEATURES is defined to differentiate and simplify the
gen7 low power (LP) devices.
HSW_FEATURES is defined and used to simplify all HSW+ devices
except for LP.
v2: Use VLV_FEATURES for the gen7 low power devices. (Jani)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 137 ++++++++++------------------------------
1 file changed, 35 insertions(+), 102 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 90faa8e..d2d7e24 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -226,125 +226,87 @@ static const struct intel_device_info intel_sandybridge_m_info = {
#define GEN7_FEATURES \
.gen = 7, .num_pipes = 3, \
.need_gfx_hws = 1, .has_hotplug = 1, \
.has_fbc = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
- .has_llc = 1
+ .has_llc = 1, \
+ GEN_DEFAULT_PIPEOFFSETS, \
+ IVB_CURSOR_OFFSETS
static const struct intel_device_info intel_ivybridge_d_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_ivybridge_m_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
.is_mobile = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_ivybridge_q_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
.num_pipes = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
+#define VLV_FEATURES \
+ .gen = 7, .num_pipes = 2, \
+ .need_gfx_hws = 1, .has_hotplug = 1, \
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
+ .display_mmio_offset = VLV_DISPLAY_BASE, \
+ GEN_DEFAULT_PIPEOFFSETS, \
+ CURSOR_OFFSETS
+
static const struct intel_device_info intel_valleyview_m_info = {
- GEN7_FEATURES,
- .is_mobile = 1,
- .num_pipes = 2,
+ VLV_FEATURES,
.is_valleyview = 1,
- .display_mmio_offset = VLV_DISPLAY_BASE,
- .has_fbc = 0, /* legal, last one wins */
- .has_llc = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- CURSOR_OFFSETS,
+ .is_mobile = 1,
};
static const struct intel_device_info intel_valleyview_d_info = {
- GEN7_FEATURES,
- .num_pipes = 2,
+ VLV_FEATURES,
.is_valleyview = 1,
- .display_mmio_offset = VLV_DISPLAY_BASE,
- .has_fbc = 0, /* legal, last one wins */
- .has_llc = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- CURSOR_OFFSETS,
};
+#define HSW_FEATURES \
+ GEN7_FEATURES, \
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
+ .has_ddi = 1, \
+ .has_fpga_dbg = 1
+
static const struct intel_device_info intel_haswell_d_info = {
- GEN7_FEATURES,
+ HSW_FEATURES,
.is_haswell = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_haswell_m_info = {
- GEN7_FEATURES,
+ HSW_FEATURES,
.is_haswell = 1,
.is_mobile = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broadwell_d_info = {
- .gen = 8, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ HSW_FEATURES,
+ .gen = 8,
};
static const struct intel_device_info intel_broadwell_m_info = {
- .gen = 8, .is_mobile = 1, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ HSW_FEATURES,
+ .gen = 8, .is_mobile = 1,
};
static const struct intel_device_info intel_broadwell_gt3d_info = {
- .gen = 8, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ HSW_FEATURES,
+ .gen = 8,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broadwell_gt3m_info = {
- .gen = 8, .is_mobile = 1, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ HSW_FEATURES,
+ .gen = 8, .is_mobile = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_cherryview_info = {
.gen = 8, .num_pipes = 3,
.need_gfx_hws = 1, .has_hotplug = 1,
@@ -354,33 +316,19 @@ static const struct intel_device_info intel_cherryview_info = {
GEN_CHV_PIPEOFFSETS,
CURSOR_OFFSETS,
};
static const struct intel_device_info intel_skylake_info = {
+ HSW_FEATURES,
.is_skylake = 1,
- .gen = 9, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ .gen = 9,
};
static const struct intel_device_info intel_skylake_gt3_info = {
.is_skylake = 1,
- .gen = 9, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ .gen = 9,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broxton_info = {
.is_preliminary = 1,
.is_broxton = 1,
@@ -394,37 +342,22 @@ static const struct intel_device_info intel_broxton_info = {
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_kabylake_info = {
+ HSW_FEATURES,
.is_preliminary = 1,
.is_kabylake = 1,
.gen = 9,
- .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_kabylake_gt3_info = {
+ HSW_FEATURES,
.is_preliminary = 1,
.is_kabylake = 1,
.gen = 9,
- .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
/*
* Make sure any device matches here are from most specific to most
* general. For example, since the Quanta match is based on the subsystem
--
2.6.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Clean up device info structure definitions
2015-12-02 21:28 ` Wayne Boyer
@ 2015-12-04 10:24 ` Daniel Vetter
2015-12-04 15:09 ` Chris Wilson
2015-12-04 18:06 ` Wayne Boyer
1 sibling, 1 reply; 7+ messages in thread
From: Daniel Vetter @ 2015-12-04 10:24 UTC (permalink / raw)
To: Wayne Boyer; +Cc: intel-gfx, Rodrigo Vivi
On Wed, Dec 02, 2015 at 01:28:14PM -0800, Wayne Boyer wrote:
> Beginning with gen7, newer devices repetitively redefine values
> for the device info structure members. This patch simplifies the
> structure definitions by grouping member value definitions into the
> existing GEN7_FEATURES #define and into the new GEN7_LP_FEATURES
> and HSW_FEATURES #defines.
>
> Specifically, GEN_DEFAULT_PIPEOFFSETS and IVB_CURSOR_OFFSETS are
> added to GEN7_FEATURES and subsequent IVB definitions are simplified.
>
> VLV_FEATURES is defined to differentiate and simplify the
> gen7 low power (LP) devices.
>
> HSW_FEATURES is defined and used to simplify all HSW+ devices
> except for LP.
>
> v2: Use VLV_FEATURES for the gen7 low power devices. (Jani)
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.c | 137 ++++++++++------------------------------
> 1 file changed, 35 insertions(+), 102 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 90faa8e..d2d7e24 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -226,125 +226,87 @@ static const struct intel_device_info intel_sandybridge_m_info = {
> #define GEN7_FEATURES \
> .gen = 7, .num_pipes = 3, \
> .need_gfx_hws = 1, .has_hotplug = 1, \
> .has_fbc = 1, \
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> - .has_llc = 1
> + .has_llc = 1, \
> + GEN_DEFAULT_PIPEOFFSETS, \
> + IVB_CURSOR_OFFSETS
>
> static const struct intel_device_info intel_ivybridge_d_info = {
> GEN7_FEATURES,
> .is_ivybridge = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_ivybridge_m_info = {
> GEN7_FEATURES,
> .is_ivybridge = 1,
> .is_mobile = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_ivybridge_q_info = {
> GEN7_FEATURES,
> .is_ivybridge = 1,
> .num_pipes = 0, /* legal, last one wins */
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> +#define VLV_FEATURES \
> + .gen = 7, .num_pipes = 2, \
> + .need_gfx_hws = 1, .has_hotplug = 1, \
> + .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> + .display_mmio_offset = VLV_DISPLAY_BASE, \
> + GEN_DEFAULT_PIPEOFFSETS, \
> + CURSOR_OFFSETS
> +
> static const struct intel_device_info intel_valleyview_m_info = {
> - GEN7_FEATURES,
> - .is_mobile = 1,
> - .num_pipes = 2,
> + VLV_FEATURES,
> .is_valleyview = 1,
> - .display_mmio_offset = VLV_DISPLAY_BASE,
> - .has_fbc = 0, /* legal, last one wins */
> - .has_llc = 0, /* legal, last one wins */
> - GEN_DEFAULT_PIPEOFFSETS,
> - CURSOR_OFFSETS,
> + .is_mobile = 1,
> };
>
> static const struct intel_device_info intel_valleyview_d_info = {
> - GEN7_FEATURES,
> - .num_pipes = 2,
> + VLV_FEATURES,
> .is_valleyview = 1,
> - .display_mmio_offset = VLV_DISPLAY_BASE,
> - .has_fbc = 0, /* legal, last one wins */
> - .has_llc = 0, /* legal, last one wins */
> - GEN_DEFAULT_PIPEOFFSETS,
> - CURSOR_OFFSETS,
> };
>
> +#define HSW_FEATURES \
> + GEN7_FEATURES, \
> + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
> + .has_ddi = 1, \
> + .has_fpga_dbg = 1
> +
> static const struct intel_device_info intel_haswell_d_info = {
> - GEN7_FEATURES,
> + HSW_FEATURES,
> .is_haswell = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_haswell_m_info = {
> - GEN7_FEATURES,
> + HSW_FEATURES,
> .is_haswell = 1,
> .is_mobile = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_broadwell_d_info = {
> - .gen = 8, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> + HSW_FEATURES,
> + .gen = 8,
> };
>
> static const struct intel_device_info intel_broadwell_m_info = {
> - .gen = 8, .is_mobile = 1, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> + HSW_FEATURES,
> + .gen = 8, .is_mobile = 1,
> };
>
> static const struct intel_device_info intel_broadwell_gt3d_info = {
> - .gen = 8, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> + HSW_FEATURES,
> + .gen = 8,
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_broadwell_gt3m_info = {
> - .gen = 8, .is_mobile = 1, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> + HSW_FEATURES,
> + .gen = 8, .is_mobile = 1,
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_cherryview_info = {
> .gen = 8, .num_pipes = 3,
> .need_gfx_hws = 1, .has_hotplug = 1,
> @@ -354,33 +316,19 @@ static const struct intel_device_info intel_cherryview_info = {
> GEN_CHV_PIPEOFFSETS,
> CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_skylake_info = {
> + HSW_FEATURES,
> .is_skylake = 1,
> - .gen = 9, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> + .gen = 9,
> };
>
> static const struct intel_device_info intel_skylake_gt3_info = {
> .is_skylake = 1,
> - .gen = 9, .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> + .gen = 9,
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_broxton_info = {
> .is_preliminary = 1,
> .is_broxton = 1,
> @@ -394,37 +342,22 @@ static const struct intel_device_info intel_broxton_info = {
> GEN_DEFAULT_PIPEOFFSETS,
> IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_kabylake_info = {
> + HSW_FEATURES,
> .is_preliminary = 1,
> .is_kabylake = 1,
> .gen = 9,
> - .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> static const struct intel_device_info intel_kabylake_gt3_info = {
> + HSW_FEATURES,
> .is_preliminary = 1,
> .is_kabylake = 1,
> .gen = 9,
> - .num_pipes = 3,
> - .need_gfx_hws = 1, .has_hotplug = 1,
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> - .has_llc = 1,
> - .has_ddi = 1,
> - .has_fpga_dbg = 1,
> - .has_fbc = 1,
> - GEN_DEFAULT_PIPEOFFSETS,
> - IVB_CURSOR_OFFSETS,
> };
>
> /*
> * Make sure any device matches here are from most specific to most
> * general. For example, since the Quanta match is based on the subsystem
> --
> 2.6.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Clean up device info structure definitions
2015-12-04 10:24 ` Daniel Vetter
@ 2015-12-04 15:09 ` Chris Wilson
2015-12-04 17:30 ` Wayne Boyer
0 siblings, 1 reply; 7+ messages in thread
From: Chris Wilson @ 2015-12-04 15:09 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx, Rodrigo Vivi
On Fri, Dec 04, 2015 at 11:24:39AM +0100, Daniel Vetter wrote:
> On Wed, Dec 02, 2015 at 01:28:14PM -0800, Wayne Boyer wrote:
> > Beginning with gen7, newer devices repetitively redefine values
> > for the device info structure members. This patch simplifies the
> > structure definitions by grouping member value definitions into the
> > existing GEN7_FEATURES #define and into the new GEN7_LP_FEATURES
> > and HSW_FEATURES #defines.
> >
> > Specifically, GEN_DEFAULT_PIPEOFFSETS and IVB_CURSOR_OFFSETS are
> > added to GEN7_FEATURES and subsequent IVB definitions are simplified.
> >
> > VLV_FEATURES is defined to differentiate and simplify the
> > gen7 low power (LP) devices.
> >
> > HSW_FEATURES is defined and used to simplify all HSW+ devices
> > except for LP.
> >
> > v2: Use VLV_FEATURES for the gen7 low power devices. (Jani)
> >
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>
>
> Queued for -next, thanks for the patch.
>
> > static const struct intel_device_info intel_skylake_info = {
> > + HSW_FEATURES,
> > .is_skylake = 1,
> > - .gen = 9, .num_pipes = 3,
> > - .need_gfx_hws = 1, .has_hotplug = 1,
> > - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> > - .has_llc = 1,
> > - .has_ddi = 1,
> > - .has_fpga_dbg = 1,
> > - .has_fbc = 1,
> > - GEN_DEFAULT_PIPEOFFSETS,
> > - IVB_CURSOR_OFFSETS,
> > + .gen = 9,
> > };
> >
> > static const struct intel_device_info intel_skylake_gt3_info = {
> > .is_skylake = 1,
> > - .gen = 9, .num_pipes = 3,
> > - .need_gfx_hws = 1, .has_hotplug = 1,
> > + .gen = 9,
> > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> > - .has_llc = 1,
> > - .has_ddi = 1,
> > - .has_fpga_dbg = 1,
> > - .has_fbc = 1,
> > - GEN_DEFAULT_PIPEOFFSETS,
> > - IVB_CURSOR_OFFSETS,
> > };
Ooops.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH] drm/i915: Clean up device info structure definitions
2015-12-04 15:09 ` Chris Wilson
@ 2015-12-04 17:30 ` Wayne Boyer
0 siblings, 0 replies; 7+ messages in thread
From: Wayne Boyer @ 2015-12-04 17:30 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Beginning with gen7, newer devices repetitively redefine values
for the device info structure members. This patch simplifies the
structure definitions by grouping member value definitions into the
existing GEN7_FEATURES #define and into the new GEN7_LP_FEATURES
and HSW_FEATURES #defines.
Specifically, GEN_DEFAULT_PIPEOFFSETS and IVB_CURSOR_OFFSETS are
added to GEN7_FEATURES and subsequent IVB definitions are simplified.
VLV_FEATURES is defined to differentiate and simplify the
gen7 low power (LP) devices.
HSW_FEATURES is defined and used to simplify all HSW+ devices
except for LP.
v2: Use VLV_FEATURES for the gen7 low power devices. (Jani)
v3: Include HSW_FEATURES definition in intel_skylake_gt3_info. (Chris)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 138 +++++++++++-----------------------------
1 file changed, 36 insertions(+), 102 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 90faa8e..46ac664 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -226,125 +226,87 @@ static const struct intel_device_info intel_sandybridge_m_info = {
#define GEN7_FEATURES \
.gen = 7, .num_pipes = 3, \
.need_gfx_hws = 1, .has_hotplug = 1, \
.has_fbc = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
- .has_llc = 1
+ .has_llc = 1, \
+ GEN_DEFAULT_PIPEOFFSETS, \
+ IVB_CURSOR_OFFSETS
static const struct intel_device_info intel_ivybridge_d_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_ivybridge_m_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
.is_mobile = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_ivybridge_q_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
.num_pipes = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
+#define VLV_FEATURES \
+ .gen = 7, .num_pipes = 2, \
+ .need_gfx_hws = 1, .has_hotplug = 1, \
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
+ .display_mmio_offset = VLV_DISPLAY_BASE, \
+ GEN_DEFAULT_PIPEOFFSETS, \
+ CURSOR_OFFSETS
+
static const struct intel_device_info intel_valleyview_m_info = {
- GEN7_FEATURES,
- .is_mobile = 1,
- .num_pipes = 2,
+ VLV_FEATURES,
.is_valleyview = 1,
- .display_mmio_offset = VLV_DISPLAY_BASE,
- .has_fbc = 0, /* legal, last one wins */
- .has_llc = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- CURSOR_OFFSETS,
+ .is_mobile = 1,
};
static const struct intel_device_info intel_valleyview_d_info = {
- GEN7_FEATURES,
- .num_pipes = 2,
+ VLV_FEATURES,
.is_valleyview = 1,
- .display_mmio_offset = VLV_DISPLAY_BASE,
- .has_fbc = 0, /* legal, last one wins */
- .has_llc = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- CURSOR_OFFSETS,
};
+#define HSW_FEATURES \
+ GEN7_FEATURES, \
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
+ .has_ddi = 1, \
+ .has_fpga_dbg = 1
+
static const struct intel_device_info intel_haswell_d_info = {
- GEN7_FEATURES,
+ HSW_FEATURES,
.is_haswell = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_haswell_m_info = {
- GEN7_FEATURES,
+ HSW_FEATURES,
.is_haswell = 1,
.is_mobile = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broadwell_d_info = {
- .gen = 8, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ HSW_FEATURES,
+ .gen = 8,
};
static const struct intel_device_info intel_broadwell_m_info = {
- .gen = 8, .is_mobile = 1, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ HSW_FEATURES,
+ .gen = 8, .is_mobile = 1,
};
static const struct intel_device_info intel_broadwell_gt3d_info = {
- .gen = 8, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ HSW_FEATURES,
+ .gen = 8,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broadwell_gt3m_info = {
- .gen = 8, .is_mobile = 1, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ HSW_FEATURES,
+ .gen = 8, .is_mobile = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_cherryview_info = {
.gen = 8, .num_pipes = 3,
.need_gfx_hws = 1, .has_hotplug = 1,
@@ -354,33 +316,20 @@ static const struct intel_device_info intel_cherryview_info = {
GEN_CHV_PIPEOFFSETS,
CURSOR_OFFSETS,
};
static const struct intel_device_info intel_skylake_info = {
+ HSW_FEATURES,
.is_skylake = 1,
- .gen = 9, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ .gen = 9,
};
static const struct intel_device_info intel_skylake_gt3_info = {
+ HSW_FEATURES,
.is_skylake = 1,
- .gen = 9, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ .gen = 9,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broxton_info = {
.is_preliminary = 1,
.is_broxton = 1,
@@ -394,37 +343,22 @@ static const struct intel_device_info intel_broxton_info = {
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_kabylake_info = {
+ HSW_FEATURES,
.is_preliminary = 1,
.is_kabylake = 1,
.gen = 9,
- .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_kabylake_gt3_info = {
+ HSW_FEATURES,
.is_preliminary = 1,
.is_kabylake = 1,
.gen = 9,
- .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
/*
* Make sure any device matches here are from most specific to most
* general. For example, since the Quanta match is based on the subsystem
--
2.6.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH] drm/i915: Clean up device info structure definitions
2015-12-02 21:28 ` Wayne Boyer
2015-12-04 10:24 ` Daniel Vetter
@ 2015-12-04 18:06 ` Wayne Boyer
1 sibling, 0 replies; 7+ messages in thread
From: Wayne Boyer @ 2015-12-04 18:06 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Beginning with gen7, newer devices repetitively redefine values
for the device info structure members. This patch simplifies the
structure definitions by grouping member value definitions into the
existing GEN7_FEATURES #define and into the new VLV_FEATURES and
HSW_FEATURES #defines.
Specifically, GEN_DEFAULT_PIPEOFFSETS and IVB_CURSOR_OFFSETS are
added to GEN7_FEATURES and subsequent IVB definitions are simplified.
VLV_FEATURES is defined to differentiate and simplify the
gen7 low power (LP) devices.
HSW_FEATURES is defined and used to simplify all HSW+ devices
except for LP.
v2: Use VLV_FEATURES for the gen7 low power devices. (Jani)
v3: Include HSW_FEATURES definition in intel_skylake_gt3_info. (Chris)
v4: Fix commit message.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 138 +++++++++++-----------------------------
1 file changed, 36 insertions(+), 102 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 90faa8e..46ac664 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -226,125 +226,87 @@ static const struct intel_device_info intel_sandybridge_m_info = {
#define GEN7_FEATURES \
.gen = 7, .num_pipes = 3, \
.need_gfx_hws = 1, .has_hotplug = 1, \
.has_fbc = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
- .has_llc = 1
+ .has_llc = 1, \
+ GEN_DEFAULT_PIPEOFFSETS, \
+ IVB_CURSOR_OFFSETS
static const struct intel_device_info intel_ivybridge_d_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_ivybridge_m_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
.is_mobile = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_ivybridge_q_info = {
GEN7_FEATURES,
.is_ivybridge = 1,
.num_pipes = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
+#define VLV_FEATURES \
+ .gen = 7, .num_pipes = 2, \
+ .need_gfx_hws = 1, .has_hotplug = 1, \
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
+ .display_mmio_offset = VLV_DISPLAY_BASE, \
+ GEN_DEFAULT_PIPEOFFSETS, \
+ CURSOR_OFFSETS
+
static const struct intel_device_info intel_valleyview_m_info = {
- GEN7_FEATURES,
- .is_mobile = 1,
- .num_pipes = 2,
+ VLV_FEATURES,
.is_valleyview = 1,
- .display_mmio_offset = VLV_DISPLAY_BASE,
- .has_fbc = 0, /* legal, last one wins */
- .has_llc = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- CURSOR_OFFSETS,
+ .is_mobile = 1,
};
static const struct intel_device_info intel_valleyview_d_info = {
- GEN7_FEATURES,
- .num_pipes = 2,
+ VLV_FEATURES,
.is_valleyview = 1,
- .display_mmio_offset = VLV_DISPLAY_BASE,
- .has_fbc = 0, /* legal, last one wins */
- .has_llc = 0, /* legal, last one wins */
- GEN_DEFAULT_PIPEOFFSETS,
- CURSOR_OFFSETS,
};
+#define HSW_FEATURES \
+ GEN7_FEATURES, \
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
+ .has_ddi = 1, \
+ .has_fpga_dbg = 1
+
static const struct intel_device_info intel_haswell_d_info = {
- GEN7_FEATURES,
+ HSW_FEATURES,
.is_haswell = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_haswell_m_info = {
- GEN7_FEATURES,
+ HSW_FEATURES,
.is_haswell = 1,
.is_mobile = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broadwell_d_info = {
- .gen = 8, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ HSW_FEATURES,
+ .gen = 8,
};
static const struct intel_device_info intel_broadwell_m_info = {
- .gen = 8, .is_mobile = 1, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ HSW_FEATURES,
+ .gen = 8, .is_mobile = 1,
};
static const struct intel_device_info intel_broadwell_gt3d_info = {
- .gen = 8, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ HSW_FEATURES,
+ .gen = 8,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broadwell_gt3m_info = {
- .gen = 8, .is_mobile = 1, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ HSW_FEATURES,
+ .gen = 8, .is_mobile = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_cherryview_info = {
.gen = 8, .num_pipes = 3,
.need_gfx_hws = 1, .has_hotplug = 1,
@@ -354,33 +316,20 @@ static const struct intel_device_info intel_cherryview_info = {
GEN_CHV_PIPEOFFSETS,
CURSOR_OFFSETS,
};
static const struct intel_device_info intel_skylake_info = {
+ HSW_FEATURES,
.is_skylake = 1,
- .gen = 9, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
+ .gen = 9,
};
static const struct intel_device_info intel_skylake_gt3_info = {
+ HSW_FEATURES,
.is_skylake = 1,
- .gen = 9, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ .gen = 9,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_broxton_info = {
.is_preliminary = 1,
.is_broxton = 1,
@@ -394,37 +343,22 @@ static const struct intel_device_info intel_broxton_info = {
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_kabylake_info = {
+ HSW_FEATURES,
.is_preliminary = 1,
.is_kabylake = 1,
.gen = 9,
- .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
static const struct intel_device_info intel_kabylake_gt3_info = {
+ HSW_FEATURES,
.is_preliminary = 1,
.is_kabylake = 1,
.gen = 9,
- .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- .has_llc = 1,
- .has_ddi = 1,
- .has_fpga_dbg = 1,
- .has_fbc = 1,
- GEN_DEFAULT_PIPEOFFSETS,
- IVB_CURSOR_OFFSETS,
};
/*
* Make sure any device matches here are from most specific to most
* general. For example, since the Quanta match is based on the subsystem
--
2.6.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2015-12-04 18:06 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2015-12-01 19:34 [PATCH] drm/i915: Clean up device info structure definitions Wayne Boyer
2015-12-02 12:35 ` Jani Nikula
2015-12-02 21:28 ` Wayne Boyer
2015-12-04 10:24 ` Daniel Vetter
2015-12-04 15:09 ` Chris Wilson
2015-12-04 17:30 ` Wayne Boyer
2015-12-04 18:06 ` Wayne Boyer
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