From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Arun Siluvery" <arun.siluvery@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH 04/12] drm/i915/gen9: Merge HALF_SLICE_CHICKEN3 WA
Date: Mon, 28 Sep 2015 11:47:06 +0300 [thread overview]
Message-ID: <87k2rbkk1h.fsf@intel.com> (raw)
In-Reply-To: <20150925171218.GY26517@intel.com>
On Fri, 25 Sep 2015, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Sep 25, 2015 at 02:33:38PM +0100, Arun Siluvery wrote:
>> Merge WaDisableSamplerPowerBypassForSOPingPong and another WA which has no name
>> as they are part of same register. This will save an entry in WA array.
>>
>> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_ringbuffer.c | 18 ++++++++----------
>> 1 file changed, 8 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index ad16ef4..963b3ca 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -914,9 +914,14 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
>> WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
>> PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE);
>>
>> - /* Syncing dependencies between camera and graphics:skl,bxt */
>> - WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
>> - GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC);
>> + /* WA: Syncing dependencies between camera and graphics:skl,bxt */
>> + /* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt */
>> + tmp = GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC;
>> + if (IS_SKYLAKE(dev) ||
>> + (IS_BROXTON(dev) && INTEL_REVID(dev) <= BXT_REVID_B0)) {
>> + tmp |= GEN8_SAMPLER_POWER_BYPASS_DIS;
>> + }
>> + WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3, tmp);
>
> I really dislike these platform+stepping checks in the shared codepath.
> If there's any difference between the platforms, IMO the w/a should go into
> the per-platform function.
Agreed, also on a more generic level than these specific functions.
BR,
Jani.
>
>>
>> if ((IS_SKYLAKE(dev) && (INTEL_REVID(dev) == SKL_REVID_A0 ||
>> INTEL_REVID(dev) == SKL_REVID_B0)) ||
>> @@ -967,13 +972,6 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
>> tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE;
>> WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp);
>>
>> - /* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt */
>> - if (IS_SKYLAKE(dev) ||
>> - (IS_BROXTON(dev) && INTEL_REVID(dev) <= BXT_REVID_B0)) {
>> - WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
>> - GEN8_SAMPLER_POWER_BYPASS_DIS);
>> - }
>> -
>> /* WaDisableSTUnitPowerOptimization:skl,bxt */
>> WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
>>
>> --
>> 1.9.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-09-28 8:43 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-25 13:33 [PATCH 00/12] Gen9: Changes to add/merge/update/remove WA Arun Siluvery
2015-09-25 13:33 ` [PATCH 01/12] drm/i915/gen9: Handle error returned by gen9_init_workarounds Arun Siluvery
2015-09-25 17:47 ` Ville Syrjälä
2015-09-28 13:55 ` Daniel Vetter
2015-09-25 13:33 ` [PATCH 02/12] drm/i915/gen9: Add WaOCLCoherentLineFlush Arun Siluvery
2015-09-25 17:09 ` Ville Syrjälä
2015-09-28 15:51 ` Arun Siluvery
2015-09-28 16:02 ` Ville Syrjälä
2015-09-28 16:35 ` Arun Siluvery
2015-09-25 13:33 ` [PATCH 03/12] drm/i915/gen9: Merge two WA as they part of same register Arun Siluvery
2015-09-25 17:47 ` Ville Syrjälä
2015-09-28 13:56 ` Daniel Vetter
2015-09-25 13:33 ` [PATCH 04/12] drm/i915/gen9: Merge HALF_SLICE_CHICKEN3 WA Arun Siluvery
2015-09-25 17:12 ` Ville Syrjälä
2015-09-28 8:47 ` Jani Nikula [this message]
2015-09-28 13:56 ` Daniel Vetter
2015-09-25 13:33 ` [PATCH 05/12] drm/i915/bxt: update WaSetHDCunitClckGatingDisable Arun Siluvery
2015-09-25 17:32 ` Ville Syrjälä
2015-09-25 13:33 ` [PATCH 06/12] drm/i915/bxt: Add WaStoreMultiplePTEenable name Arun Siluvery
2015-09-25 17:34 ` Ville Syrjälä
2015-09-28 13:57 ` Daniel Vetter
2015-09-25 13:33 ` [PATCH 07/12] drm/i915/bxt: Update stepping check for WaDisableSDEUnitClockGating Arun Siluvery
2015-09-25 17:17 ` Ville Syrjälä
2015-09-28 11:06 ` Imre Deak
2015-09-28 11:09 ` Arun Siluvery
2015-09-25 13:33 ` [PATCH 08/12] drm/i915/skl: Remove WaDisableSDEUnitClockGating Arun Siluvery
2015-09-25 17:39 ` Ville Syrjälä
2015-09-28 13:58 ` Daniel Vetter
2015-09-25 13:33 ` [PATCH 09/12] drm/i915/skl: Remove WaSetGAPSunitClckGateDisable Arun Siluvery
2015-09-25 17:43 ` Ville Syrjälä
2015-09-25 13:33 ` [PATCH 10/12] drm/i915/skl: Remove WaDisableVFUnitClockGating Arun Siluvery
2015-09-25 17:45 ` Ville Syrjälä
2015-09-28 14:01 ` Daniel Vetter
2015-09-25 13:33 ` [PATCH 11/12] drm/i915/skl: Remove WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken Arun Siluvery
2015-09-25 18:34 ` Ville Syrjälä
2015-09-25 18:43 ` Ville Syrjälä
2015-09-25 21:39 ` Arun Siluvery
2015-09-25 13:33 ` [PATCH 12/12] drm/i915:skl: Remove WaDisablePowerCompilerClockGating Arun Siluvery
2015-09-25 17:24 ` Ville Syrjälä
2015-09-28 11:21 ` [PATCH 00/12] Gen9: Changes to add/merge/update/remove WA Arun Siluvery
2015-09-28 14:03 ` Daniel Vetter
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