[PATCH 1/2] drm/i915: Invert the mask and val arguments in wa_add() and WA_REG()

[PATCH 1/2] drm/i915: Invert the mask and val arguments in wa_add() and WA_REG()

[Damien Lespiau]

While trying to unify the order of those arguments throughout the
driver, Daniel noticed what we were inverting them in this part of the
code.

Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 9deb152..4f63c39 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -711,7 +711,7 @@ static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
 }
 
 static int wa_add(struct drm_i915_private *dev_priv,
-		  const u32 addr, const u32 val, const u32 mask)
+		  const u32 addr, const u32 mask, const u32 val)
 {
 	const u32 idx = dev_priv->workarounds.count;
 
@@ -727,25 +727,25 @@ static int wa_add(struct drm_i915_private *dev_priv,
 	return 0;
 }
 
-#define WA_REG(addr, val, mask) { \
-		const int r = wa_add(dev_priv, (addr), (val), (mask)); \
+#define WA_REG(addr, mask, val) { \
+		const int r = wa_add(dev_priv, (addr), (mask), (val)); \
 		if (r) \
 			return r; \
 	}
 
 #define WA_SET_BIT_MASKED(addr, mask) \
-	WA_REG(addr, _MASKED_BIT_ENABLE(mask), (mask) & 0xffff)
+	WA_REG(addr, (mask) & 0xffff, _MASKED_BIT_ENABLE(mask))
 
 #define WA_CLR_BIT_MASKED(addr, mask) \
-	WA_REG(addr, _MASKED_BIT_DISABLE(mask), (mask) & 0xffff)
+	WA_REG(addr, (mask) & 0xffff, _MASKED_BIT_DISABLE(mask))
 
 #define WA_SET_FIELD_MASKED(addr, mask, value) \
-	WA_REG(addr, _MASKED_FIELD(mask, value), mask)
+	WA_REG(addr, mask, _MASKED_FIELD(mask, value))
 
-#define WA_SET_BIT(addr, mask) WA_REG(addr, I915_READ(addr) | (mask), mask)
-#define WA_CLR_BIT(addr, mask) WA_REG(addr, I915_READ(addr) & ~(mask), mask)
+#define WA_SET_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) | (mask))
+#define WA_CLR_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) & ~(mask))
 
-#define WA_WRITE(addr, val) WA_REG(addr, val, 0xffffffff)
+#define WA_WRITE(addr, val) WA_REG(addr, 0xffffffff, val)
 
 static int bdw_init_workarounds(struct intel_engine_cs *ring)
 {
-- 
1.8.3.1

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[PATCH 2/2] drm/i915: Remove '& 0xffff' from the mask given to WA_REG()

[Damien Lespiau]

We may be hidding bugs by doing that, so let remove it and have the
actual mask value shine through, for better or worse.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 4f63c39..c715ef0 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -734,10 +734,10 @@ static int wa_add(struct drm_i915_private *dev_priv,
 	}
 
 #define WA_SET_BIT_MASKED(addr, mask) \
-	WA_REG(addr, (mask) & 0xffff, _MASKED_BIT_ENABLE(mask))
+	WA_REG(addr, (mask), _MASKED_BIT_ENABLE(mask))
 
 #define WA_CLR_BIT_MASKED(addr, mask) \
-	WA_REG(addr, (mask) & 0xffff, _MASKED_BIT_DISABLE(mask))
+	WA_REG(addr, (mask), _MASKED_BIT_DISABLE(mask))
 
 #define WA_SET_FIELD_MASKED(addr, mask, value) \
 	WA_REG(addr, mask, _MASKED_FIELD(mask, value))
-- 
1.8.3.1

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Re: [PATCH 2/2] drm/i915: Remove '& 0xffff' from the mask given to WA_REG()

[Jani Nikula]

On Mon, 08 Dec 2014, Damien Lespiau <damien.lespiau@intel.com> wrote:
> We may be hidding bugs by doing that, so let remove it and have the
> actual mask value shine through, for better or worse.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Pushed these two to drm-intel-next-fixes, thanks for the patches.

BR,
Jani.



> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 4f63c39..c715ef0 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -734,10 +734,10 @@ static int wa_add(struct drm_i915_private *dev_priv,
>  	}
>  
>  #define WA_SET_BIT_MASKED(addr, mask) \
> -	WA_REG(addr, (mask) & 0xffff, _MASKED_BIT_ENABLE(mask))
> +	WA_REG(addr, (mask), _MASKED_BIT_ENABLE(mask))
>  
>  #define WA_CLR_BIT_MASKED(addr, mask) \
> -	WA_REG(addr, (mask) & 0xffff, _MASKED_BIT_DISABLE(mask))
> +	WA_REG(addr, (mask), _MASKED_BIT_DISABLE(mask))
>  
>  #define WA_SET_FIELD_MASKED(addr, mask, value) \
>  	WA_REG(addr, mask, _MASKED_FIELD(mask, value))
> -- 
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
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