Re: [PATCH 67/89] drm/i915/skl: Provide skl-specific pll hw state cross-checking

Paulo Zanoni
2014-09-23T18:07:52Z

2014-09-04 8:27 GMT-03:00 Damien Lespiau <damien.lespiau@intel.com>:
> v2: rebase on top of the hw state flattening.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6e71250..0a4dd00 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10775,6 +10775,9 @@ intel_pipe_config_compare(struct drm_device *dev,
> PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
> PIPE_CONF_CHECK_X(dpll_hw_state.fp1);
> PIPE_CONF_CHECK_X(dpll_hw_state.wrpll);
> + PIPE_CONF_CHECK_X(dpll_hw_state.ctrl1);
> + PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr1);
> + PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr2);
>
> if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5)
> PIPE_CONF_CHECK_I(pipe_bpp);
> --
> 1.8.3.1
>
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--
Paulo Zanoni