From: Jani Nikula <jani.nikula@linux.intel.com>
To: Damien Lespiau <damien.lespiau@intel.com>, Tom.O'Rourke@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/chv: WaDisablePwrmtrEvent:chv on CHV only
Date: Tue, 10 Jun 2014 18:30:54 +0300 [thread overview]
Message-ID: <87k38ou6hd.fsf@intel.com> (raw)
In-Reply-To: <20140609173238.GA27756@strange.amr.corp.intel.com>
On Mon, 09 Jun 2014, Damien Lespiau <damien.lespiau@intel.com> wrote:
> On Mon, Jun 09, 2014 at 10:06:49AM -0700, Tom.O'Rourke@intel.com wrote:
>> From: Tom O'Rourke <Tom.O'Rourke@intel.com>
>>
>> In gen8_enable_rps, don't write CHV registers unless IS_CHERRYVIEW.
>>
>> Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
>
> A lovely catch.
Sadly gen8_enable_rps does not get called on chv, so the fix is wrong.
BR,
Jani.
>
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
>
> --
> Damien
>
>> ---
>> drivers/gpu/drm/i915/intel_pm.c | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index d9c5918..3d3e402 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -3522,8 +3522,10 @@ static void gen8_enable_rps(struct drm_device *dev)
>> I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
>>
>> /* WaDisablePwrmtrEvent:chv (pre-production hw) */
>> - I915_WRITE(0xA80C, I915_READ(0xA80C) & 0x00ffffff);
>> - I915_WRITE(0xA810, I915_READ(0xA810) & 0xffffff00);
>> + if (IS_CHERRYVIEW(dev)) {
>> + I915_WRITE(0xA80C, I915_READ(0xA80C) & 0x00ffffff);
>> + I915_WRITE(0xA810, I915_READ(0xA810) & 0xffffff00);
>> + }
>>
>> /* 5: Enable RPS */
>> I915_WRITE(GEN6_RP_CONTROL,
>> --
>> 1.7.9.5
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
next prev parent reply other threads:[~2014-06-10 15:31 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-09 17:06 [PATCH] drm/i915/chv: WaDisablePwrmtrEvent:chv on CHV only Tom.O'Rourke
2014-06-09 17:32 ` Damien Lespiau
2014-06-10 15:30 ` Jani Nikula [this message]
2014-06-10 15:34 ` Jani Nikula
2014-06-10 17:16 ` Ville Syrjälä
2014-06-10 18:17 ` Jani Nikula
2014-06-10 19:03 ` O'Rourke, Tom
2014-06-10 19:15 ` Ville Syrjälä
2014-06-10 23:26 ` [PATCH] drm/i915/chv: Fix "drm/i915/chv: Add a bunch of pre production workarounds" Tom.O'Rourke
2014-06-12 8:20 ` Ville Syrjälä
2014-06-12 10:35 ` Daniel Vetter
2014-06-12 10:33 ` [PATCH] drm/i915/chv: WaDisablePwrmtrEvent:chv on CHV only Jani Nikula
2014-06-12 12:42 ` Daniel Vetter
2014-06-13 8:35 ` [PATCH] drm/i915/bdw: remove erroneous chv specific workarounds from bdw code Jani Nikula
2014-06-13 8:53 ` Jani Nikula
2014-06-13 15:55 ` O'Rourke, Tom
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