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31 Mar 2020 06:08:19 -0700 Received: by gaia.fi.intel.com (Postfix, from userid 1000) id DF3035C0D7B; Tue, 31 Mar 2020 16:06:41 +0300 (EEST) From: Mika Kuoppala To: Chris Wilson , intel-gfx@lists.freedesktop.org In-Reply-To: <20200331120502.14713-1-chris@chris-wilson.co.uk> References: <20200331120502.14713-1-chris@chris-wilson.co.uk> Date: Tue, 31 Mar 2020 16:06:41 +0300 Message-ID: <87lfngptb2.fsf@gaia.fi.intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Include a few tracek for timeslicing X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Wilson Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Chris Wilson writes: > Add a few telltales to see when timeslicing is being enabled. > > Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 20 +++++++++++++++++--- > drivers/gpu/drm/i915/i915_scheduler.c | 6 ++++++ > 2 files changed, 23 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 744737e57d1d..55bf3cdf3b38 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -1814,16 +1814,25 @@ active_timeslice(const struct intel_engine_cs *engine) > > static void set_timeslice(struct intel_engine_cs *engine) > { > + unsigned long duration; > + > if (!intel_engine_has_timeslices(engine)) > return; > > - set_timer_ms(&engine->execlists.timer, active_timeslice(engine)); > + duration = active_timeslice(engine); > + ENGINE_TRACE(engine, "bump timeslicing, interval:%lu", duration); > + > + set_timer_ms(&engine->execlists.timer, duration); > } > > static void start_timeslice(struct intel_engine_cs *engine) > { > struct intel_engine_execlists *execlists = &engine->execlists; > - int prio = queue_prio(execlists); > + const int prio = queue_prio(execlists); > + unsigned long duration; > + > + if (!intel_engine_has_timeslices(engine)) > + return; > > WRITE_ONCE(execlists->switch_priority_hint, prio); > if (prio == INT_MIN) > @@ -1832,7 +1841,12 @@ static void start_timeslice(struct intel_engine_cs *engine) > if (timer_pending(&execlists->timer)) > return; > > - set_timer_ms(&execlists->timer, timeslice(engine)); > + duration = timeslice(engine); > + ENGINE_TRACE(engine, > + "start timeslicing, prio:%d, interval:%lu", > + prio, duration); > + > + set_timer_ms(&execlists->timer, duration); > } > > static void record_preemption(struct intel_engine_execlists *execlists) > diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c > index 68b06a7ba667..065176cb0258 100644 > --- a/drivers/gpu/drm/i915/i915_scheduler.c > +++ b/drivers/gpu/drm/i915/i915_scheduler.c > @@ -209,6 +209,12 @@ static void kick_submission(struct intel_engine_cs *engine, > if (!inflight) > goto unlock; > > + ENGINE_TRACE(engine, > + "bumping queue-priority-hint:%d for rq:%llx:%lld, inflight:%llx:%lld prio %d\n", > + prio, > + rq->fence.context, rq->fence.seqno, > + inflight->fence.context, inflight->fence.seqno, > + inflight->sched.attr.priority); > engine->execlists.queue_priority_hint = prio; > > /* > -- > 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx