From: Jani Nikula <jani.nikula@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL
Date: Fri, 09 Mar 2018 12:31:44 +0200 [thread overview]
Message-ID: <87lgf1pmjz.fsf@intel.com> (raw)
In-Reply-To: <20180306120828.GE5453@intel.com>
On Tue, 06 Mar 2018, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Mar 06, 2018 at 12:41:55PM +0200, Jani Nikula wrote:
>> We don't want to preserve the DDI A 4 lane bit on ICL.
>>
>> Fixes: 3d2011cfa41f ("drm/i915/icl: remove port A/E lane sharing limitation.")
>> Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
>> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pushed, thanks for the review.
The one CI warning is unrelated.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/intel_ddi.c | 9 ++++++---
>> 1 file changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
>> index bfdaa5d86861..66417dd24bfc 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -2932,9 +2932,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>> intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
>> intel_encoder->cloneable = 0;
>>
>> - intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
>> - (DDI_BUF_PORT_REVERSAL |
>> - DDI_A_4_LANES);
>> + if (INTEL_GEN(dev_priv) >= 11)
>> + intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
>> + DDI_BUF_PORT_REVERSAL;
>> + else
>> + intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
>> + (DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
>> intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
>> intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);
>>
>> --
>> 2.11.0
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2018-03-09 10:30 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-06 10:41 [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL Jani Nikula
2018-03-06 11:03 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-03-06 12:08 ` [PATCH] " Ville Syrjälä
2018-03-09 10:31 ` Jani Nikula [this message]
2018-03-06 14:42 ` Paulo Zanoni
2018-03-07 7:50 ` Jani Nikula
2018-03-06 14:47 ` ✗ Fi.CI.IGT: warning for " Patchwork
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