From: Francisco Jerez <currojerez@riseup.net>
To: Jordan Justen <jordan.l.justen@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/5] drm/i915: Move Haswell registers to separate whitelist table
Date: Tue, 08 Mar 2016 14:05:29 -0800 [thread overview]
Message-ID: <87lh5sfwwm.fsf@riseup.net> (raw)
In-Reply-To: <1457335830-30923-4-git-send-email-jordan.l.justen@intel.com>
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Jordan Justen <jordan.l.justen@intel.com> writes:
> Now that we can whitelist registers only on Haswell, move HSW_SCRATCH1
> and HSW_ROW_CHICKEN3 into a separate Haswell only table.
>
> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index 46ea40b..ba01836 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -472,6 +472,9 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = {
> REG32(GEN7_L3SQCREG1),
> REG32(GEN7_L3CNTLREG2),
> REG32(GEN7_L3CNTLREG3),
> +};
> +
> +static const struct drm_i915_reg_descriptor hsw_render_regs[] = {
> REG32(HSW_SCRATCH1,
> .mask = ~HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE,
> .value = 0),
> @@ -519,6 +522,7 @@ static const struct drm_i915_reg_table ivb_blt_reg_tables[] = {
>
> static const struct drm_i915_reg_table hsw_render_reg_tables[] = {
> { gen7_render_regs, ARRAY_SIZE(gen7_render_regs), false },
> + { hsw_render_regs, ARRAY_SIZE(hsw_render_regs), false },
> { hsw_master_regs, ARRAY_SIZE(hsw_master_regs), true },
> };
>
> --
> 2.7.0
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next prev parent reply other threads:[~2016-03-08 22:05 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-07 7:30 [PATCH 0/5] Haswell Command Parser updates for Vulkan Jordan Justen
2016-03-07 7:30 ` [PATCH 1/5] drm/i915: Add TIMESTAMP to register whitelist Jordan Justen
2016-03-08 22:06 ` Francisco Jerez
2016-03-07 7:30 ` [PATCH 2/5] drm/i915: Use an array of register tables in command parser Jordan Justen
2016-03-16 23:33 ` Francisco Jerez
2016-03-07 7:30 ` [PATCH 3/5] drm/i915: Move Haswell registers to separate whitelist table Jordan Justen
2016-03-08 22:05 ` Francisco Jerez [this message]
2016-03-07 7:30 ` [PATCH 4/5] drm/i915: Add Haswell CS GPR registers to whitelist Jordan Justen
2016-03-08 22:06 ` Francisco Jerez
2016-03-07 7:30 ` [PATCH 5/5] drm/i915: Bump command parser version for new whitelisted registers Jordan Justen
2016-03-08 22:07 ` Francisco Jerez
2016-03-21 9:03 ` Daniel Vetter
2016-03-07 12:27 ` ✗ Fi.CI.BAT: failure for Haswell Command Parser updates for Vulkan Patchwork
2016-03-21 8:53 ` Daniel Vetter
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