From: Jani Nikula <jani.nikula@linux.intel.com>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 09/11] drm/i915: Use g4x_get_aux_clock_divider() for VLV/CHV
Date: Tue, 01 Dec 2015 14:49:42 +0200 [thread overview]
Message-ID: <87lh9e49ll.fsf@intel.com> (raw)
In-Reply-To: <1448893432-6978-10-git-send-email-ville.syrjala@linux.intel.com>
On Mon, 30 Nov 2015, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> With the hrawclk frequency cached in dev_priv, we can simply use
> g4x_get_aux_clock_divider() for VLV/CHV.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 7 -------
> 1 file changed, 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 06afcc101a2c..39a1689bac7d 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -721,11 +721,6 @@ static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
> }
> }
>
> -static uint32_t vlv_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
> -{
> - return index ? 0 : 100;
> -}
> -
> static uint32_t skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
> {
> /*
> @@ -5823,8 +5818,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> /* intel_dp vfuncs */
> if (INTEL_INFO(dev)->gen >= 9)
> intel_dp->get_aux_clock_divider = skl_get_aux_clock_divider;
> - else if (IS_VALLEYVIEW(dev))
> - intel_dp->get_aux_clock_divider = vlv_get_aux_clock_divider;
> else if (IS_HASWELL(dev) || IS_BROADWELL(dev))
> intel_dp->get_aux_clock_divider = hsw_get_aux_clock_divider;
> else if (HAS_PCH_SPLIT(dev))
--
Jani Nikula, Intel Open Source Technology Center
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next prev parent reply other threads:[~2015-12-01 12:45 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-30 14:23 [PATCH 00/11] drm/i915: rawclk/cdclk stuff ville.syrjala
2015-11-30 14:23 ` [PATCH 01/11] drm/i915: Fix VBT backlight Hz to PWM conversion for PNV ville.syrjala
2015-12-01 12:19 ` Jani Nikula
2015-11-30 14:23 ` [PATCH 02/11] drm/i915: Fix vbt PWM max setup for CTG ville.syrjala
2015-12-01 12:21 ` Jani Nikula
2015-12-01 12:28 ` Ville Syrjälä
2015-12-01 12:30 ` Jani Nikula
2015-12-04 9:37 ` Daniel Vetter
2015-11-30 14:23 ` [PATCH 03/11] drm/i915: Add HAS_PCH_LPT_H() ville.syrjala
2015-12-01 12:23 ` Jani Nikula
2015-11-30 14:23 ` [PATCH 04/11] drm/i915: Kill duplicated PNV .get_display_clock_speed() assignment ville.syrjala
2015-12-01 8:48 ` Daniel Vetter
2015-12-01 12:23 ` Jani Nikula
2015-11-30 14:23 ` [PATCH 05/11] drm/i915: Round the AUX clock divider to closest on all platforms ville.syrjala
2015-12-01 12:34 ` Jani Nikula
2015-11-30 14:23 ` [PATCH 06/11] drm/i915: Use cached cdclk_freq for PWM calculations ville.syrjala
2015-12-01 12:37 ` Jani Nikula
2015-12-02 9:29 ` Ville Syrjälä
2015-11-30 14:23 ` [PATCH 07/11] drm/i915: Store rawclk_freq in dev_priv ville.syrjala
2015-12-01 12:47 ` Jani Nikula
2015-12-01 13:25 ` Ville Syrjälä
2015-12-01 15:43 ` Jani Nikula
2016-01-12 17:47 ` Ville Syrjälä
2015-11-30 14:23 ` [PATCH 08/11] drm/i915: Rename s/i9xx/g4x/ in DP code ville.syrjala
2015-12-01 12:39 ` Jani Nikula
2015-11-30 14:23 ` [PATCH 09/11] drm/i915: Use g4x_get_aux_clock_divider() for VLV/CHV ville.syrjala
2015-12-01 12:49 ` Jani Nikula [this message]
2015-11-30 14:23 ` [PATCH 10/11] drm/i915: Read out hrawclk from CCK on vlv/chv ville.syrjala
2015-11-30 14:23 ` [PATCH 11/11] drm/i915: Clean up .get_aux_clock_divider() functions ville.syrjala
2015-12-01 12:56 ` Jani Nikula
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