From mboxrd@z Thu Jan  1 00:00:00 1970
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Subject: Re: [PATCH 1/7] drm/i915: Read guaranteed freq
	for	valleyview
Date: Fri, 11 Jul 2014 17:42:48 +0300
Message-ID: <87lhs0j6s7.fsf@gaia.fi.intel.com>
References: <1404978387-28180-1-git-send-email-deepak.s@linux.intel.com>
 <1404978387-28180-2-git-send-email-deepak.s@linux.intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces@lists.freedesktop.org>
Received: from mga01.intel.com (mga01.intel.com [192.55.52.88])
 by gabe.freedesktop.org (Postfix) with ESMTP id 781026E01F
 for <intel-gfx@lists.freedesktop.org>; Fri, 11 Jul 2014 07:43:25 -0700 (PDT)
In-Reply-To: <1404978387-28180-2-git-send-email-deepak.s@linux.intel.com>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
To: deepak.s@linux.intel.com, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

deepak.s@linux.intel.com writes:

> From: Deepak S <deepak.s@linux.intel.com>
>
> Reading RP1 for valleyview to help us enable "pm_rps" i-g-t testcase
> execution.
>
> Signed-off-by: Deepak S <deepak.s@linux.intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d1af641..b8e7afc 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3816,6 +3816,17 @@ int cherryview_rps_min_freq(struct drm_i915_private *dev_priv)
>  	return rpn;
>  }
>  
> +int valleyview_rps_guar_freq(struct drm_i915_private *dev_priv)
> +{
> +	u32 val, rp1;
> +
> +	val = vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FREQ_FUSE);
> +
> +	rp1 = (val & FB_GFX_FGUARANTEED_FREQ_FUSE_MASK) >> FB_GFX_FGUARANTEED_FREQ_FUSE_SHIFT;
> +
> +	return rp1;
> +}
> +
>  int valleyview_rps_max_freq(struct drm_i915_private *dev_priv)
>  {
>  	u32 val, rp0;
> @@ -3958,6 +3969,11 @@ static void valleyview_init_gt_powersave(struct drm_device *dev)
>  			 vlv_gpu_freq(dev_priv, dev_priv->rps.efficient_freq),
>  			 dev_priv->rps.efficient_freq);
>  
> +	dev_priv->rps.rp1_freq = valleyview_rps_guar_freq(dev_priv);
> +	DRM_DEBUG_DRIVER("RP1(Guar Freq) GPU freq: %d MHz (%u)\n",
> +			 vlv_gpu_freq(dev_priv, dev_priv->rps.rp1_freq),
> +			 dev_priv->rps.rp1_freq);
> +
>  	dev_priv->rps.min_freq = valleyview_rps_min_freq(dev_priv);
>  	DRM_DEBUG_DRIVER("min GPU freq: %d MHz (%u)\n",
>  			 vlv_gpu_freq(dev_priv, dev_priv->rps.min_freq),
> -- 
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx