[PATCH] drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

[PATCH] drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

[Jani Nikula]

Abstract the rather self-contained piece of code from i915_drv.[ch]. No
functional changes.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile    |   1 +
 drivers/gpu/drm/i915/i915_drv.c  | 194 -----------------------------
 drivers/gpu/drm/i915/i915_drv.h  |  60 +--------
 drivers/gpu/drm/i915/intel_pch.c | 201 +++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_pch.h |  73 +++++++++++
 5 files changed, 276 insertions(+), 253 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_pch.c
 create mode 100644 drivers/gpu/drm/i915/intel_pch.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 8fe157f71617..7f710415a525 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -48,6 +48,7 @@ i915-y += i915_drv.o \
 	  i915_sysfs.o \
 	  intel_csr.o \
 	  intel_device_info.o \
+	  intel_pch.o \
 	  intel_pm.o \
 	  intel_runtime_pm.o \
 	  intel_sideband.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 535209ee4741..5807c1a0dab1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -150,200 +150,6 @@ __i915_printk(struct drm_i915_private *dev_priv, const char *level,
 	}
 }
 
-/* Map PCH device id to PCH type, or PCH_NONE if unknown. */
-static enum intel_pch
-intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
-{
-	switch (id) {
-	case INTEL_PCH_IBX_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
-		WARN_ON(!IS_GEN(dev_priv, 5));
-		return PCH_IBX;
-	case INTEL_PCH_CPT_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found CougarPoint PCH\n");
-		WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
-		return PCH_CPT;
-	case INTEL_PCH_PPT_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found PantherPoint PCH\n");
-		WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
-		/* PantherPoint is CPT compatible */
-		return PCH_CPT;
-	case INTEL_PCH_LPT_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found LynxPoint PCH\n");
-		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
-		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
-		return PCH_LPT;
-	case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
-		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
-		WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
-		return PCH_LPT;
-	case INTEL_PCH_WPT_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found WildcatPoint PCH\n");
-		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
-		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
-		/* WildcatPoint is LPT compatible */
-		return PCH_LPT;
-	case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n");
-		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
-		WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
-		/* WildcatPoint is LPT compatible */
-		return PCH_LPT;
-	case INTEL_PCH_SPT_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
-		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
-		return PCH_SPT;
-	case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
-		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
-		return PCH_SPT;
-	case INTEL_PCH_KBP_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n");
-		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
-			!IS_COFFEELAKE(dev_priv));
-		/* KBP is SPT compatible */
-		return PCH_SPT;
-	case INTEL_PCH_CNP_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n");
-		WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
-		return PCH_CNP;
-	case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
-		WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
-		return PCH_CNP;
-	case INTEL_PCH_CMP_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n");
-		WARN_ON(!IS_COFFEELAKE(dev_priv));
-		/* CometPoint is CNP Compatible */
-		return PCH_CNP;
-	case INTEL_PCH_ICP_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found Ice Lake PCH\n");
-		WARN_ON(!IS_ICELAKE(dev_priv));
-		return PCH_ICP;
-	case INTEL_PCH_MCC_DEVICE_ID_TYPE:
-	case INTEL_PCH_MCC2_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
-		WARN_ON(!IS_ELKHARTLAKE(dev_priv));
-		return PCH_MCC;
-	case INTEL_PCH_TGP_DEVICE_ID_TYPE:
-		DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
-		WARN_ON(!IS_TIGERLAKE(dev_priv));
-		return PCH_TGP;
-	default:
-		return PCH_NONE;
-	}
-}
-
-static bool intel_is_virt_pch(unsigned short id,
-			      unsigned short svendor, unsigned short sdevice)
-{
-	return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
-		id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
-		(id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
-		 svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
-		 sdevice == PCI_SUBDEVICE_ID_QEMU));
-}
-
-static unsigned short
-intel_virt_detect_pch(const struct drm_i915_private *dev_priv)
-{
-	unsigned short id = 0;
-
-	/*
-	 * In a virtualized passthrough environment we can be in a
-	 * setup where the ISA bridge is not able to be passed through.
-	 * In this case, a south bridge can be emulated and we have to
-	 * make an educated guess as to which PCH is really there.
-	 */
-
-	if (IS_TIGERLAKE(dev_priv))
-		id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
-	else if (IS_ELKHARTLAKE(dev_priv))
-		id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
-	else if (IS_ICELAKE(dev_priv))
-		id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
-	else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
-		id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
-	else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
-		id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
-	else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
-		id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
-	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
-		id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
-	else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
-		id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
-	else if (IS_GEN(dev_priv, 5))
-		id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
-
-	if (id)
-		DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id);
-	else
-		DRM_DEBUG_KMS("Assuming no PCH\n");
-
-	return id;
-}
-
-static void intel_detect_pch(struct drm_i915_private *dev_priv)
-{
-	struct pci_dev *pch = NULL;
-
-	/*
-	 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
-	 * make graphics device passthrough work easy for VMM, that only
-	 * need to expose ISA bridge to let driver know the real hardware
-	 * underneath. This is a requirement from virtualization team.
-	 *
-	 * In some virtualized environments (e.g. XEN), there is irrelevant
-	 * ISA bridge in the system. To work reliably, we should scan trhough
-	 * all the ISA bridge devices and check for the first match, instead
-	 * of only checking the first one.
-	 */
-	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
-		unsigned short id;
-		enum intel_pch pch_type;
-
-		if (pch->vendor != PCI_VENDOR_ID_INTEL)
-			continue;
-
-		id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
-
-		pch_type = intel_pch_type(dev_priv, id);
-		if (pch_type != PCH_NONE) {
-			dev_priv->pch_type = pch_type;
-			dev_priv->pch_id = id;
-			break;
-		} else if (intel_is_virt_pch(id, pch->subsystem_vendor,
-					 pch->subsystem_device)) {
-			id = intel_virt_detect_pch(dev_priv);
-			pch_type = intel_pch_type(dev_priv, id);
-
-			/* Sanity check virtual PCH id */
-			if (WARN_ON(id && pch_type == PCH_NONE))
-				id = 0;
-
-			dev_priv->pch_type = pch_type;
-			dev_priv->pch_id = id;
-			break;
-		}
-	}
-
-	/*
-	 * Use PCH_NOP (PCH but no South Display) for PCH platforms without
-	 * display.
-	 */
-	if (pch && !HAS_DISPLAY(dev_priv)) {
-		DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
-		dev_priv->pch_type = PCH_NOP;
-		dev_priv->pch_id = 0;
-	}
-
-	if (!pch)
-		DRM_DEBUG_KMS("No PCH found.\n");
-
-	pci_dev_put(pch);
-}
-
 static int i915_getparam_ioctl(struct drm_device *dev, void *data,
 			       struct drm_file *file_priv)
 {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7d424ddd3523..43b0d149d114 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -77,6 +77,7 @@
 #include "gt/uc/intel_uc.h"
 
 #include "intel_device_info.h"
+#include "intel_pch.h"
 #include "intel_runtime_pm.h"
 #include "intel_uncore.h"
 #include "intel_wakeref.h"
@@ -528,25 +529,6 @@ struct i915_psr {
 	u16 su_x_granularity;
 };
 
-/*
- * Sorted by south display engine compatibility.
- * If the new PCH comes with a south display engine that is not
- * inherited from the latest item, please do not add it to the
- * end. Instead, add it right after its "parent" PCH.
- */
-enum intel_pch {
-	PCH_NOP = -1,	/* PCH without south display */
-	PCH_NONE = 0,	/* No PCH present */
-	PCH_IBX,	/* Ibexpeak PCH */
-	PCH_CPT,	/* Cougarpoint/Pantherpoint PCH */
-	PCH_LPT,	/* Lynxpoint/Wildcatpoint PCH */
-	PCH_SPT,        /* Sunrisepoint/Kaby Lake PCH */
-	PCH_CNP,        /* Cannon/Comet Lake PCH */
-	PCH_ICP,	/* Ice Lake PCH */
-	PCH_MCC,        /* Mule Creek Canyon PCH */
-	PCH_TGP,	/* Tiger Lake PCH */
-};
-
 #define QUIRK_LVDS_SSC_DISABLE (1<<1)
 #define QUIRK_INVERT_BRIGHTNESS (1<<2)
 #define QUIRK_BACKLIGHT_PRESENT (1<<3)
@@ -2291,46 +2273,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)	(INTEL_INFO(dev_priv)->has_global_mocs)
 
-#define INTEL_PCH_DEVICE_ID_MASK		0xff80
-#define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
-#define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00
-#define INTEL_PCH_PPT_DEVICE_ID_TYPE		0x1e00
-#define INTEL_PCH_LPT_DEVICE_ID_TYPE		0x8c00
-#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE		0x9c00
-#define INTEL_PCH_WPT_DEVICE_ID_TYPE		0x8c80
-#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE		0x9c80
-#define INTEL_PCH_SPT_DEVICE_ID_TYPE		0xA100
-#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE		0x9D00
-#define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA280
-#define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA300
-#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE		0x9D80
-#define INTEL_PCH_CMP_DEVICE_ID_TYPE		0x0280
-#define INTEL_PCH_ICP_DEVICE_ID_TYPE		0x3480
-#define INTEL_PCH_MCC_DEVICE_ID_TYPE		0x4B00
-#define INTEL_PCH_MCC2_DEVICE_ID_TYPE		0x3880
-#define INTEL_PCH_TGP_DEVICE_ID_TYPE		0xA080
-#define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100
-#define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000
-#define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35 has 2918 */
-
-#define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
-#define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id)
-#define HAS_PCH_MCC(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_MCC)
-#define HAS_PCH_TGP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_TGP)
-#define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP)
-#define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
-#define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
-#define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT)
-#define HAS_PCH_LPT_LP(dev_priv) \
-	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE || \
-	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_LP_DEVICE_ID_TYPE)
-#define HAS_PCH_LPT_H(dev_priv) \
-	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_DEVICE_ID_TYPE || \
-	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_DEVICE_ID_TYPE)
-#define HAS_PCH_CPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CPT)
-#define HAS_PCH_IBX(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_IBX)
-#define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP)
-#define HAS_PCH_SPLIT(dev_priv) (INTEL_PCH_TYPE(dev_priv) != PCH_NONE)
 
 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
 
diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
new file mode 100644
index 000000000000..fa864d8f2b73
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_pch.c
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2019 Intel Corporation.
+ */
+
+#include "i915_drv.h"
+#include "intel_pch.h"
+
+/* Map PCH device id to PCH type, or PCH_NONE if unknown. */
+static enum intel_pch
+intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
+{
+	switch (id) {
+	case INTEL_PCH_IBX_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
+		WARN_ON(!IS_GEN(dev_priv, 5));
+		return PCH_IBX;
+	case INTEL_PCH_CPT_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found CougarPoint PCH\n");
+		WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
+		return PCH_CPT;
+	case INTEL_PCH_PPT_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found PantherPoint PCH\n");
+		WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
+		/* PantherPoint is CPT compatible */
+		return PCH_CPT;
+	case INTEL_PCH_LPT_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found LynxPoint PCH\n");
+		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
+		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
+		return PCH_LPT;
+	case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
+		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
+		WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
+		return PCH_LPT;
+	case INTEL_PCH_WPT_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found WildcatPoint PCH\n");
+		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
+		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
+		/* WildcatPoint is LPT compatible */
+		return PCH_LPT;
+	case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n");
+		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
+		WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
+		/* WildcatPoint is LPT compatible */
+		return PCH_LPT;
+	case INTEL_PCH_SPT_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
+		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
+		return PCH_SPT;
+	case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
+		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
+		return PCH_SPT;
+	case INTEL_PCH_KBP_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n");
+		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
+			!IS_COFFEELAKE(dev_priv));
+		/* KBP is SPT compatible */
+		return PCH_SPT;
+	case INTEL_PCH_CNP_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n");
+		WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
+		return PCH_CNP;
+	case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
+		WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
+		return PCH_CNP;
+	case INTEL_PCH_CMP_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n");
+		WARN_ON(!IS_COFFEELAKE(dev_priv));
+		/* CometPoint is CNP Compatible */
+		return PCH_CNP;
+	case INTEL_PCH_ICP_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found Ice Lake PCH\n");
+		WARN_ON(!IS_ICELAKE(dev_priv));
+		return PCH_ICP;
+	case INTEL_PCH_MCC_DEVICE_ID_TYPE:
+	case INTEL_PCH_MCC2_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
+		WARN_ON(!IS_ELKHARTLAKE(dev_priv));
+		return PCH_MCC;
+	case INTEL_PCH_TGP_DEVICE_ID_TYPE:
+		DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
+		WARN_ON(!IS_TIGERLAKE(dev_priv));
+		return PCH_TGP;
+	default:
+		return PCH_NONE;
+	}
+}
+
+static bool intel_is_virt_pch(unsigned short id,
+			      unsigned short svendor, unsigned short sdevice)
+{
+	return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
+		id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
+		(id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
+		 svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
+		 sdevice == PCI_SUBDEVICE_ID_QEMU));
+}
+
+static unsigned short
+intel_virt_detect_pch(const struct drm_i915_private *dev_priv)
+{
+	unsigned short id = 0;
+
+	/*
+	 * In a virtualized passthrough environment we can be in a
+	 * setup where the ISA bridge is not able to be passed through.
+	 * In this case, a south bridge can be emulated and we have to
+	 * make an educated guess as to which PCH is really there.
+	 */
+
+	if (IS_TIGERLAKE(dev_priv))
+		id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
+	else if (IS_ELKHARTLAKE(dev_priv))
+		id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
+	else if (IS_ICELAKE(dev_priv))
+		id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
+	else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
+		id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
+	else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
+		id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
+	else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
+		id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
+	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
+		id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
+	else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
+		id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
+	else if (IS_GEN(dev_priv, 5))
+		id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
+
+	if (id)
+		DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id);
+	else
+		DRM_DEBUG_KMS("Assuming no PCH\n");
+
+	return id;
+}
+
+void intel_detect_pch(struct drm_i915_private *dev_priv)
+{
+	struct pci_dev *pch = NULL;
+
+	/*
+	 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
+	 * make graphics device passthrough work easy for VMM, that only
+	 * need to expose ISA bridge to let driver know the real hardware
+	 * underneath. This is a requirement from virtualization team.
+	 *
+	 * In some virtualized environments (e.g. XEN), there is irrelevant
+	 * ISA bridge in the system. To work reliably, we should scan trhough
+	 * all the ISA bridge devices and check for the first match, instead
+	 * of only checking the first one.
+	 */
+	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
+		unsigned short id;
+		enum intel_pch pch_type;
+
+		if (pch->vendor != PCI_VENDOR_ID_INTEL)
+			continue;
+
+		id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
+
+		pch_type = intel_pch_type(dev_priv, id);
+		if (pch_type != PCH_NONE) {
+			dev_priv->pch_type = pch_type;
+			dev_priv->pch_id = id;
+			break;
+		} else if (intel_is_virt_pch(id, pch->subsystem_vendor,
+					     pch->subsystem_device)) {
+			id = intel_virt_detect_pch(dev_priv);
+			pch_type = intel_pch_type(dev_priv, id);
+
+			/* Sanity check virtual PCH id */
+			if (WARN_ON(id && pch_type == PCH_NONE))
+				id = 0;
+
+			dev_priv->pch_type = pch_type;
+			dev_priv->pch_id = id;
+			break;
+		}
+	}
+
+	/*
+	 * Use PCH_NOP (PCH but no South Display) for PCH platforms without
+	 * display.
+	 */
+	if (pch && !HAS_DISPLAY(dev_priv)) {
+		DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
+		dev_priv->pch_type = PCH_NOP;
+		dev_priv->pch_id = 0;
+	}
+
+	if (!pch)
+		DRM_DEBUG_KMS("No PCH found.\n");
+
+	pci_dev_put(pch);
+}
diff --git a/drivers/gpu/drm/i915/intel_pch.h b/drivers/gpu/drm/i915/intel_pch.h
new file mode 100644
index 000000000000..e6a2d65f19c6
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_pch.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright 2019 Intel Corporation.
+ */
+
+#ifndef __INTEL_PCH__
+#define __INTEL_PCH__
+
+struct drm_i915_private;
+
+/*
+ * Sorted by south display engine compatibility.
+ * If the new PCH comes with a south display engine that is not
+ * inherited from the latest item, please do not add it to the
+ * end. Instead, add it right after its "parent" PCH.
+ */
+enum intel_pch {
+	PCH_NOP = -1,	/* PCH without south display */
+	PCH_NONE = 0,	/* No PCH present */
+	PCH_IBX,	/* Ibexpeak PCH */
+	PCH_CPT,	/* Cougarpoint/Pantherpoint PCH */
+	PCH_LPT,	/* Lynxpoint/Wildcatpoint PCH */
+	PCH_SPT,        /* Sunrisepoint/Kaby Lake PCH */
+	PCH_CNP,        /* Cannon/Comet Lake PCH */
+	PCH_ICP,	/* Ice Lake PCH */
+	PCH_MCC,        /* Mule Creek Canyon PCH */
+	PCH_TGP,	/* Tiger Lake PCH */
+};
+
+#define INTEL_PCH_DEVICE_ID_MASK		0xff80
+#define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
+#define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00
+#define INTEL_PCH_PPT_DEVICE_ID_TYPE		0x1e00
+#define INTEL_PCH_LPT_DEVICE_ID_TYPE		0x8c00
+#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE		0x9c00
+#define INTEL_PCH_WPT_DEVICE_ID_TYPE		0x8c80
+#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE		0x9c80
+#define INTEL_PCH_SPT_DEVICE_ID_TYPE		0xA100
+#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE		0x9D00
+#define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA280
+#define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA300
+#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE		0x9D80
+#define INTEL_PCH_CMP_DEVICE_ID_TYPE		0x0280
+#define INTEL_PCH_ICP_DEVICE_ID_TYPE		0x3480
+#define INTEL_PCH_MCC_DEVICE_ID_TYPE		0x4B00
+#define INTEL_PCH_MCC2_DEVICE_ID_TYPE		0x3880
+#define INTEL_PCH_TGP_DEVICE_ID_TYPE		0xA080
+#define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100
+#define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000
+#define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35 has 2918 */
+
+#define INTEL_PCH_TYPE(dev_priv)		((dev_priv)->pch_type)
+#define INTEL_PCH_ID(dev_priv)			((dev_priv)->pch_id)
+#define HAS_PCH_MCC(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_MCC)
+#define HAS_PCH_TGP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_TGP)
+#define HAS_PCH_ICP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_ICP)
+#define HAS_PCH_CNP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
+#define HAS_PCH_SPT(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
+#define HAS_PCH_LPT(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_LPT)
+#define HAS_PCH_LPT_LP(dev_priv) \
+	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE || \
+	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_LP_DEVICE_ID_TYPE)
+#define HAS_PCH_LPT_H(dev_priv) \
+	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_DEVICE_ID_TYPE || \
+	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_DEVICE_ID_TYPE)
+#define HAS_PCH_CPT(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_CPT)
+#define HAS_PCH_IBX(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_IBX)
+#define HAS_PCH_NOP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_NOP)
+#define HAS_PCH_SPLIT(dev_priv)			(INTEL_PCH_TYPE(dev_priv) != PCH_NONE)
+
+void intel_detect_pch(struct drm_i915_private *dev_priv);
+
+#endif /* __INTEL_PCH__ */
-- 
2.20.1

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✗ Fi.CI.CHECKPATCH: warning for drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

[Patchwork]

== Series Details ==

Series: drm/i915: split out intel_pch.[ch] from i915_drv.[ch]
URL   : https://patchwork.freedesktop.org/series/64833/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
07241392f28e drm/i915: split out intel_pch.[ch] from i915_drv.[ch]
-:319: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#319: 
new file mode 100644

-:590: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#590: FILE: drivers/gpu/drm/i915/intel_pch.h:60:
+#define HAS_PCH_LPT_LP(dev_priv) \
+	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE || \
+	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_LP_DEVICE_ID_TYPE)

-:593: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#593: FILE: drivers/gpu/drm/i915/intel_pch.h:63:
+#define HAS_PCH_LPT_H(dev_priv) \
+	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_DEVICE_ID_TYPE || \
+	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_DEVICE_ID_TYPE)

total: 0 errors, 1 warnings, 2 checks, 559 lines checked

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✓ Fi.CI.BAT: success for drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

[Patchwork]

== Series Details ==

Series: drm/i915: split out intel_pch.[ch] from i915_drv.[ch]
URL   : https://patchwork.freedesktop.org/series/64833/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6646 -> Patchwork_13899
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/

Known issues
------------

  Here are the changes found in Patchwork_13899 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_ringfill@basic-default-interruptible:
    - fi-icl-u3:          [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/fi-icl-u3/igt@gem_ringfill@basic-default-interruptible.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/fi-icl-u3/igt@gem_ringfill@basic-default-interruptible.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [PASS][5] -> [DMESG-WARN][6] ([fdo#102614])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_ctx_param@basic:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/fi-icl-u3/igt@gem_ctx_param@basic.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/fi-icl-u3/igt@gem_ctx_param@basic.html

  * igt@kms_busy@basic-flip-a:
    - fi-kbl-7567u:       [SKIP][9] ([fdo#109271] / [fdo#109278]) -> [PASS][10] +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278


Participating hosts (55 -> 47)
------------------------------

  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6646 -> Patchwork_13899

  CI-20190529: 20190529
  CI_DRM_6646: 9345af1901748aeaed19ac13bf7ec4fb3336fc29 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5125: 35d81d01b1599b4bc4df0e09e25f6f531eed4f8a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13899: 07241392f28e63f31bcbc653533102e8230a6148 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

07241392f28e drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/
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Re: [PATCH] drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

[Chris Wilson]

Quoting Jani Nikula (2019-08-07 13:04:15)
> Abstract the rather self-contained piece of code from i915_drv.[ch]. No
> functional changes.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Makes sense, and looks to be a straightforward move.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH] drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

[Rodrigo Vivi]

On Wed, Aug 07, 2019 at 03:04:15PM +0300, Jani Nikula wrote:
> Abstract the rather self-contained piece of code from i915_drv.[ch]. No
> functional changes.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/Makefile    |   1 +
>  drivers/gpu/drm/i915/i915_drv.c  | 194 -----------------------------
>  drivers/gpu/drm/i915/i915_drv.h  |  60 +--------
>  drivers/gpu/drm/i915/intel_pch.c | 201 +++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_pch.h |  73 +++++++++++
>  5 files changed, 276 insertions(+), 253 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_pch.c
>  create mode 100644 drivers/gpu/drm/i915/intel_pch.h
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 8fe157f71617..7f710415a525 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -48,6 +48,7 @@ i915-y += i915_drv.o \
>  	  i915_sysfs.o \
>  	  intel_csr.o \
>  	  intel_device_info.o \
> +	  intel_pch.o \
>  	  intel_pm.o \
>  	  intel_runtime_pm.o \
>  	  intel_sideband.o \
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 535209ee4741..5807c1a0dab1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -150,200 +150,6 @@ __i915_printk(struct drm_i915_private *dev_priv, const char *level,
>  	}
>  }
>  
> -/* Map PCH device id to PCH type, or PCH_NONE if unknown. */
> -static enum intel_pch
> -intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
> -{
> -	switch (id) {
> -	case INTEL_PCH_IBX_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
> -		WARN_ON(!IS_GEN(dev_priv, 5));
> -		return PCH_IBX;
> -	case INTEL_PCH_CPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found CougarPoint PCH\n");
> -		WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
> -		return PCH_CPT;
> -	case INTEL_PCH_PPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found PantherPoint PCH\n");
> -		WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
> -		/* PantherPoint is CPT compatible */
> -		return PCH_CPT;
> -	case INTEL_PCH_LPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found LynxPoint PCH\n");
> -		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
> -		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
> -		return PCH_LPT;
> -	case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
> -		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
> -		WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
> -		return PCH_LPT;
> -	case INTEL_PCH_WPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found WildcatPoint PCH\n");
> -		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
> -		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
> -		/* WildcatPoint is LPT compatible */
> -		return PCH_LPT;
> -	case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n");
> -		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
> -		WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
> -		/* WildcatPoint is LPT compatible */
> -		return PCH_LPT;
> -	case INTEL_PCH_SPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
> -		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
> -		return PCH_SPT;
> -	case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
> -		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
> -		return PCH_SPT;
> -	case INTEL_PCH_KBP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n");
> -		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
> -			!IS_COFFEELAKE(dev_priv));
> -		/* KBP is SPT compatible */
> -		return PCH_SPT;
> -	case INTEL_PCH_CNP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n");
> -		WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
> -		return PCH_CNP;
> -	case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
> -		WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
> -		return PCH_CNP;
> -	case INTEL_PCH_CMP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n");
> -		WARN_ON(!IS_COFFEELAKE(dev_priv));
> -		/* CometPoint is CNP Compatible */
> -		return PCH_CNP;
> -	case INTEL_PCH_ICP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Ice Lake PCH\n");
> -		WARN_ON(!IS_ICELAKE(dev_priv));
> -		return PCH_ICP;
> -	case INTEL_PCH_MCC_DEVICE_ID_TYPE:
> -	case INTEL_PCH_MCC2_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
> -		WARN_ON(!IS_ELKHARTLAKE(dev_priv));
> -		return PCH_MCC;
> -	case INTEL_PCH_TGP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
> -		WARN_ON(!IS_TIGERLAKE(dev_priv));
> -		return PCH_TGP;
> -	default:
> -		return PCH_NONE;
> -	}
> -}
> -
> -static bool intel_is_virt_pch(unsigned short id,
> -			      unsigned short svendor, unsigned short sdevice)
> -{
> -	return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
> -		id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
> -		(id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
> -		 svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
> -		 sdevice == PCI_SUBDEVICE_ID_QEMU));
> -}
> -
> -static unsigned short
> -intel_virt_detect_pch(const struct drm_i915_private *dev_priv)
> -{
> -	unsigned short id = 0;
> -
> -	/*
> -	 * In a virtualized passthrough environment we can be in a
> -	 * setup where the ISA bridge is not able to be passed through.
> -	 * In this case, a south bridge can be emulated and we have to
> -	 * make an educated guess as to which PCH is really there.
> -	 */
> -
> -	if (IS_TIGERLAKE(dev_priv))
> -		id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
> -	else if (IS_ELKHARTLAKE(dev_priv))
> -		id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
> -	else if (IS_ICELAKE(dev_priv))
> -		id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
> -	else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
> -		id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
> -	else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
> -		id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
> -	else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
> -		id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
> -	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> -		id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
> -	else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
> -		id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
> -	else if (IS_GEN(dev_priv, 5))
> -		id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
> -
> -	if (id)
> -		DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id);
> -	else
> -		DRM_DEBUG_KMS("Assuming no PCH\n");
> -
> -	return id;
> -}
> -
> -static void intel_detect_pch(struct drm_i915_private *dev_priv)
> -{
> -	struct pci_dev *pch = NULL;
> -
> -	/*
> -	 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
> -	 * make graphics device passthrough work easy for VMM, that only
> -	 * need to expose ISA bridge to let driver know the real hardware
> -	 * underneath. This is a requirement from virtualization team.
> -	 *
> -	 * In some virtualized environments (e.g. XEN), there is irrelevant
> -	 * ISA bridge in the system. To work reliably, we should scan trhough
> -	 * all the ISA bridge devices and check for the first match, instead
> -	 * of only checking the first one.
> -	 */
> -	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
> -		unsigned short id;
> -		enum intel_pch pch_type;
> -
> -		if (pch->vendor != PCI_VENDOR_ID_INTEL)
> -			continue;
> -
> -		id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
> -
> -		pch_type = intel_pch_type(dev_priv, id);
> -		if (pch_type != PCH_NONE) {
> -			dev_priv->pch_type = pch_type;
> -			dev_priv->pch_id = id;
> -			break;
> -		} else if (intel_is_virt_pch(id, pch->subsystem_vendor,
> -					 pch->subsystem_device)) {
> -			id = intel_virt_detect_pch(dev_priv);
> -			pch_type = intel_pch_type(dev_priv, id);
> -
> -			/* Sanity check virtual PCH id */
> -			if (WARN_ON(id && pch_type == PCH_NONE))
> -				id = 0;
> -
> -			dev_priv->pch_type = pch_type;
> -			dev_priv->pch_id = id;
> -			break;
> -		}
> -	}
> -
> -	/*
> -	 * Use PCH_NOP (PCH but no South Display) for PCH platforms without
> -	 * display.
> -	 */
> -	if (pch && !HAS_DISPLAY(dev_priv)) {
> -		DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
> -		dev_priv->pch_type = PCH_NOP;
> -		dev_priv->pch_id = 0;
> -	}
> -
> -	if (!pch)
> -		DRM_DEBUG_KMS("No PCH found.\n");
> -
> -	pci_dev_put(pch);
> -}
> -
>  static int i915_getparam_ioctl(struct drm_device *dev, void *data,
>  			       struct drm_file *file_priv)
>  {
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7d424ddd3523..43b0d149d114 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -77,6 +77,7 @@
>  #include "gt/uc/intel_uc.h"
>  
>  #include "intel_device_info.h"
> +#include "intel_pch.h"
>  #include "intel_runtime_pm.h"
>  #include "intel_uncore.h"
>  #include "intel_wakeref.h"
> @@ -528,25 +529,6 @@ struct i915_psr {
>  	u16 su_x_granularity;
>  };
>  
> -/*
> - * Sorted by south display engine compatibility.
> - * If the new PCH comes with a south display engine that is not
> - * inherited from the latest item, please do not add it to the
> - * end. Instead, add it right after its "parent" PCH.
> - */
> -enum intel_pch {
> -	PCH_NOP = -1,	/* PCH without south display */
> -	PCH_NONE = 0,	/* No PCH present */
> -	PCH_IBX,	/* Ibexpeak PCH */
> -	PCH_CPT,	/* Cougarpoint/Pantherpoint PCH */
> -	PCH_LPT,	/* Lynxpoint/Wildcatpoint PCH */
> -	PCH_SPT,        /* Sunrisepoint/Kaby Lake PCH */
> -	PCH_CNP,        /* Cannon/Comet Lake PCH */
> -	PCH_ICP,	/* Ice Lake PCH */
> -	PCH_MCC,        /* Mule Creek Canyon PCH */
> -	PCH_TGP,	/* Tiger Lake PCH */
> -};
> -
>  #define QUIRK_LVDS_SSC_DISABLE (1<<1)
>  #define QUIRK_INVERT_BRIGHTNESS (1<<2)
>  #define QUIRK_BACKLIGHT_PRESENT (1<<3)
> @@ -2291,46 +2273,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  
>  #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)	(INTEL_INFO(dev_priv)->has_global_mocs)
>  
> -#define INTEL_PCH_DEVICE_ID_MASK		0xff80
> -#define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
> -#define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00
> -#define INTEL_PCH_PPT_DEVICE_ID_TYPE		0x1e00
> -#define INTEL_PCH_LPT_DEVICE_ID_TYPE		0x8c00
> -#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE		0x9c00
> -#define INTEL_PCH_WPT_DEVICE_ID_TYPE		0x8c80
> -#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE		0x9c80
> -#define INTEL_PCH_SPT_DEVICE_ID_TYPE		0xA100
> -#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE		0x9D00
> -#define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA280
> -#define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA300
> -#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE		0x9D80
> -#define INTEL_PCH_CMP_DEVICE_ID_TYPE		0x0280
> -#define INTEL_PCH_ICP_DEVICE_ID_TYPE		0x3480
> -#define INTEL_PCH_MCC_DEVICE_ID_TYPE		0x4B00
> -#define INTEL_PCH_MCC2_DEVICE_ID_TYPE		0x3880
> -#define INTEL_PCH_TGP_DEVICE_ID_TYPE		0xA080
> -#define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100
> -#define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000
> -#define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35 has 2918 */
> -
> -#define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
> -#define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id)
> -#define HAS_PCH_MCC(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_MCC)
> -#define HAS_PCH_TGP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_TGP)
> -#define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP)
> -#define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
> -#define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
> -#define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT)
> -#define HAS_PCH_LPT_LP(dev_priv) \
> -	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE || \
> -	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_LP_DEVICE_ID_TYPE)
> -#define HAS_PCH_LPT_H(dev_priv) \
> -	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_DEVICE_ID_TYPE || \
> -	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_DEVICE_ID_TYPE)
> -#define HAS_PCH_CPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CPT)
> -#define HAS_PCH_IBX(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_IBX)
> -#define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP)
> -#define HAS_PCH_SPLIT(dev_priv) (INTEL_PCH_TYPE(dev_priv) != PCH_NONE)
>  
>  #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
>  
> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
> new file mode 100644
> index 000000000000..fa864d8f2b73
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_pch.c
> @@ -0,0 +1,201 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright 2019 Intel Corporation.
> + */
> +
> +#include "i915_drv.h"
> +#include "intel_pch.h"
> +
> +/* Map PCH device id to PCH type, or PCH_NONE if unknown. */
> +static enum intel_pch
> +intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
> +{
> +	switch (id) {
> +	case INTEL_PCH_IBX_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
> +		WARN_ON(!IS_GEN(dev_priv, 5));
> +		return PCH_IBX;
> +	case INTEL_PCH_CPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found CougarPoint PCH\n");
> +		WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
> +		return PCH_CPT;
> +	case INTEL_PCH_PPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found PantherPoint PCH\n");
> +		WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
> +		/* PantherPoint is CPT compatible */
> +		return PCH_CPT;
> +	case INTEL_PCH_LPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found LynxPoint PCH\n");
> +		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
> +		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
> +		return PCH_LPT;
> +	case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
> +		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
> +		WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
> +		return PCH_LPT;
> +	case INTEL_PCH_WPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found WildcatPoint PCH\n");
> +		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
> +		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
> +		/* WildcatPoint is LPT compatible */
> +		return PCH_LPT;
> +	case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n");
> +		WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
> +		WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
> +		/* WildcatPoint is LPT compatible */
> +		return PCH_LPT;
> +	case INTEL_PCH_SPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
> +		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
> +		return PCH_SPT;
> +	case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
> +		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
> +		return PCH_SPT;
> +	case INTEL_PCH_KBP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n");
> +		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
> +			!IS_COFFEELAKE(dev_priv));
> +		/* KBP is SPT compatible */
> +		return PCH_SPT;
> +	case INTEL_PCH_CNP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n");
> +		WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
> +		return PCH_CNP;
> +	case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
> +		WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
> +		return PCH_CNP;
> +	case INTEL_PCH_CMP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n");
> +		WARN_ON(!IS_COFFEELAKE(dev_priv));
> +		/* CometPoint is CNP Compatible */
> +		return PCH_CNP;
> +	case INTEL_PCH_ICP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Ice Lake PCH\n");
> +		WARN_ON(!IS_ICELAKE(dev_priv));
> +		return PCH_ICP;
> +	case INTEL_PCH_MCC_DEVICE_ID_TYPE:
> +	case INTEL_PCH_MCC2_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
> +		WARN_ON(!IS_ELKHARTLAKE(dev_priv));
> +		return PCH_MCC;
> +	case INTEL_PCH_TGP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
> +		WARN_ON(!IS_TIGERLAKE(dev_priv));
> +		return PCH_TGP;
> +	default:
> +		return PCH_NONE;
> +	}
> +}
> +
> +static bool intel_is_virt_pch(unsigned short id,
> +			      unsigned short svendor, unsigned short sdevice)
> +{
> +	return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
> +		id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
> +		(id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
> +		 svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
> +		 sdevice == PCI_SUBDEVICE_ID_QEMU));
> +}
> +
> +static unsigned short
> +intel_virt_detect_pch(const struct drm_i915_private *dev_priv)
> +{
> +	unsigned short id = 0;
> +
> +	/*
> +	 * In a virtualized passthrough environment we can be in a
> +	 * setup where the ISA bridge is not able to be passed through.
> +	 * In this case, a south bridge can be emulated and we have to
> +	 * make an educated guess as to which PCH is really there.
> +	 */
> +
> +	if (IS_TIGERLAKE(dev_priv))
> +		id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
> +	else if (IS_ELKHARTLAKE(dev_priv))
> +		id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
> +	else if (IS_ICELAKE(dev_priv))
> +		id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
> +	else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
> +		id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
> +	else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
> +		id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
> +	else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
> +		id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
> +	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> +		id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
> +	else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
> +		id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
> +	else if (IS_GEN(dev_priv, 5))
> +		id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
> +
> +	if (id)
> +		DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id);
> +	else
> +		DRM_DEBUG_KMS("Assuming no PCH\n");
> +
> +	return id;
> +}
> +
> +void intel_detect_pch(struct drm_i915_private *dev_priv)
> +{
> +	struct pci_dev *pch = NULL;
> +
> +	/*
> +	 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
> +	 * make graphics device passthrough work easy for VMM, that only
> +	 * need to expose ISA bridge to let driver know the real hardware
> +	 * underneath. This is a requirement from virtualization team.
> +	 *
> +	 * In some virtualized environments (e.g. XEN), there is irrelevant
> +	 * ISA bridge in the system. To work reliably, we should scan trhough
> +	 * all the ISA bridge devices and check for the first match, instead
> +	 * of only checking the first one.
> +	 */
> +	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
> +		unsigned short id;
> +		enum intel_pch pch_type;
> +
> +		if (pch->vendor != PCI_VENDOR_ID_INTEL)
> +			continue;
> +
> +		id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
> +
> +		pch_type = intel_pch_type(dev_priv, id);
> +		if (pch_type != PCH_NONE) {
> +			dev_priv->pch_type = pch_type;
> +			dev_priv->pch_id = id;
> +			break;
> +		} else if (intel_is_virt_pch(id, pch->subsystem_vendor,
> +					     pch->subsystem_device)) {
> +			id = intel_virt_detect_pch(dev_priv);
> +			pch_type = intel_pch_type(dev_priv, id);
> +
> +			/* Sanity check virtual PCH id */
> +			if (WARN_ON(id && pch_type == PCH_NONE))
> +				id = 0;
> +
> +			dev_priv->pch_type = pch_type;
> +			dev_priv->pch_id = id;
> +			break;
> +		}
> +	}
> +
> +	/*
> +	 * Use PCH_NOP (PCH but no South Display) for PCH platforms without
> +	 * display.
> +	 */
> +	if (pch && !HAS_DISPLAY(dev_priv)) {
> +		DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
> +		dev_priv->pch_type = PCH_NOP;
> +		dev_priv->pch_id = 0;
> +	}
> +
> +	if (!pch)
> +		DRM_DEBUG_KMS("No PCH found.\n");
> +
> +	pci_dev_put(pch);
> +}
> diff --git a/drivers/gpu/drm/i915/intel_pch.h b/drivers/gpu/drm/i915/intel_pch.h
> new file mode 100644
> index 000000000000..e6a2d65f19c6
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_pch.h
> @@ -0,0 +1,73 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright 2019 Intel Corporation.
> + */
> +
> +#ifndef __INTEL_PCH__
> +#define __INTEL_PCH__
> +
> +struct drm_i915_private;
> +
> +/*
> + * Sorted by south display engine compatibility.
> + * If the new PCH comes with a south display engine that is not
> + * inherited from the latest item, please do not add it to the
> + * end. Instead, add it right after its "parent" PCH.
> + */
> +enum intel_pch {
> +	PCH_NOP = -1,	/* PCH without south display */
> +	PCH_NONE = 0,	/* No PCH present */
> +	PCH_IBX,	/* Ibexpeak PCH */
> +	PCH_CPT,	/* Cougarpoint/Pantherpoint PCH */
> +	PCH_LPT,	/* Lynxpoint/Wildcatpoint PCH */
> +	PCH_SPT,        /* Sunrisepoint/Kaby Lake PCH */
> +	PCH_CNP,        /* Cannon/Comet Lake PCH */
> +	PCH_ICP,	/* Ice Lake PCH */
> +	PCH_MCC,        /* Mule Creek Canyon PCH */
> +	PCH_TGP,	/* Tiger Lake PCH */
> +};
> +
> +#define INTEL_PCH_DEVICE_ID_MASK		0xff80
> +#define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
> +#define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00
> +#define INTEL_PCH_PPT_DEVICE_ID_TYPE		0x1e00
> +#define INTEL_PCH_LPT_DEVICE_ID_TYPE		0x8c00
> +#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE		0x9c00
> +#define INTEL_PCH_WPT_DEVICE_ID_TYPE		0x8c80
> +#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE		0x9c80
> +#define INTEL_PCH_SPT_DEVICE_ID_TYPE		0xA100
> +#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE		0x9D00
> +#define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA280
> +#define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA300
> +#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE		0x9D80
> +#define INTEL_PCH_CMP_DEVICE_ID_TYPE		0x0280
> +#define INTEL_PCH_ICP_DEVICE_ID_TYPE		0x3480
> +#define INTEL_PCH_MCC_DEVICE_ID_TYPE		0x4B00
> +#define INTEL_PCH_MCC2_DEVICE_ID_TYPE		0x3880
> +#define INTEL_PCH_TGP_DEVICE_ID_TYPE		0xA080
> +#define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100
> +#define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000
> +#define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35 has 2918 */
> +
> +#define INTEL_PCH_TYPE(dev_priv)		((dev_priv)->pch_type)
> +#define INTEL_PCH_ID(dev_priv)			((dev_priv)->pch_id)
> +#define HAS_PCH_MCC(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_MCC)
> +#define HAS_PCH_TGP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_TGP)
> +#define HAS_PCH_ICP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_ICP)
> +#define HAS_PCH_CNP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
> +#define HAS_PCH_SPT(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
> +#define HAS_PCH_LPT(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_LPT)
> +#define HAS_PCH_LPT_LP(dev_priv) \
> +	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE || \
> +	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_LP_DEVICE_ID_TYPE)
> +#define HAS_PCH_LPT_H(dev_priv) \
> +	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_DEVICE_ID_TYPE || \
> +	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_DEVICE_ID_TYPE)
> +#define HAS_PCH_CPT(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_CPT)
> +#define HAS_PCH_IBX(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_IBX)
> +#define HAS_PCH_NOP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_NOP)
> +#define HAS_PCH_SPLIT(dev_priv)			(INTEL_PCH_TYPE(dev_priv) != PCH_NONE)
> +
> +void intel_detect_pch(struct drm_i915_private *dev_priv);
> +
> +#endif /* __INTEL_PCH__ */
> -- 
> 2.20.1
> 
> _______________________________________________
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Re: [PATCH] drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

[Souza, Jose]

On Wed, 2019-08-07 at 15:04 +0300, Jani Nikula wrote:
> Abstract the rather self-contained piece of code from i915_drv.[ch].
> No
> functional changes.
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile    |   1 +
>  drivers/gpu/drm/i915/i915_drv.c  | 194 -----------------------------
>  drivers/gpu/drm/i915/i915_drv.h  |  60 +--------
>  drivers/gpu/drm/i915/intel_pch.c | 201
> +++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_pch.h |  73 +++++++++++
>  5 files changed, 276 insertions(+), 253 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_pch.c
>  create mode 100644 drivers/gpu/drm/i915/intel_pch.h
> 
> diff --git a/drivers/gpu/drm/i915/Makefile
> b/drivers/gpu/drm/i915/Makefile
> index 8fe157f71617..7f710415a525 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -48,6 +48,7 @@ i915-y += i915_drv.o \
>  	  i915_sysfs.o \
>  	  intel_csr.o \
>  	  intel_device_info.o \
> +	  intel_pch.o \
>  	  intel_pm.o \
>  	  intel_runtime_pm.o \
>  	  intel_sideband.o \
> diff --git a/drivers/gpu/drm/i915/i915_drv.c
> b/drivers/gpu/drm/i915/i915_drv.c
> index 535209ee4741..5807c1a0dab1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -150,200 +150,6 @@ __i915_printk(struct drm_i915_private
> *dev_priv, const char *level,
>  	}
>  }
>  
> -/* Map PCH device id to PCH type, or PCH_NONE if unknown. */
> -static enum intel_pch
> -intel_pch_type(const struct drm_i915_private *dev_priv, unsigned
> short id)
> -{
> -	switch (id) {
> -	case INTEL_PCH_IBX_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
> -		WARN_ON(!IS_GEN(dev_priv, 5));
> -		return PCH_IBX;
> -	case INTEL_PCH_CPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found CougarPoint PCH\n");
> -		WARN_ON(!IS_GEN(dev_priv, 6) &&
> !IS_IVYBRIDGE(dev_priv));
> -		return PCH_CPT;
> -	case INTEL_PCH_PPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found PantherPoint PCH\n");
> -		WARN_ON(!IS_GEN(dev_priv, 6) &&
> !IS_IVYBRIDGE(dev_priv));
> -		/* PantherPoint is CPT compatible */
> -		return PCH_CPT;
> -	case INTEL_PCH_LPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found LynxPoint PCH\n");
> -		WARN_ON(!IS_HASWELL(dev_priv) &&
> !IS_BROADWELL(dev_priv));
> -		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
> -		return PCH_LPT;
> -	case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
> -		WARN_ON(!IS_HASWELL(dev_priv) &&
> !IS_BROADWELL(dev_priv));
> -		WARN_ON(!IS_HSW_ULT(dev_priv) &&
> !IS_BDW_ULT(dev_priv));
> -		return PCH_LPT;
> -	case INTEL_PCH_WPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found WildcatPoint PCH\n");
> -		WARN_ON(!IS_HASWELL(dev_priv) &&
> !IS_BROADWELL(dev_priv));
> -		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
> -		/* WildcatPoint is LPT compatible */
> -		return PCH_LPT;
> -	case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n");
> -		WARN_ON(!IS_HASWELL(dev_priv) &&
> !IS_BROADWELL(dev_priv));
> -		WARN_ON(!IS_HSW_ULT(dev_priv) &&
> !IS_BDW_ULT(dev_priv));
> -		/* WildcatPoint is LPT compatible */
> -		return PCH_LPT;
> -	case INTEL_PCH_SPT_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
> -		WARN_ON(!IS_SKYLAKE(dev_priv) &&
> !IS_KABYLAKE(dev_priv));
> -		return PCH_SPT;
> -	case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
> -		WARN_ON(!IS_SKYLAKE(dev_priv) &&
> !IS_KABYLAKE(dev_priv));
> -		return PCH_SPT;
> -	case INTEL_PCH_KBP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n");
> -		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv)
> &&
> -			!IS_COFFEELAKE(dev_priv));
> -		/* KBP is SPT compatible */
> -		return PCH_SPT;
> -	case INTEL_PCH_CNP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n");
> -		WARN_ON(!IS_CANNONLAKE(dev_priv) &&
> !IS_COFFEELAKE(dev_priv));
> -		return PCH_CNP;
> -	case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
> -		WARN_ON(!IS_CANNONLAKE(dev_priv) &&
> !IS_COFFEELAKE(dev_priv));
> -		return PCH_CNP;
> -	case INTEL_PCH_CMP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n");
> -		WARN_ON(!IS_COFFEELAKE(dev_priv));
> -		/* CometPoint is CNP Compatible */
> -		return PCH_CNP;
> -	case INTEL_PCH_ICP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Ice Lake PCH\n");
> -		WARN_ON(!IS_ICELAKE(dev_priv));
> -		return PCH_ICP;
> -	case INTEL_PCH_MCC_DEVICE_ID_TYPE:
> -	case INTEL_PCH_MCC2_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
> -		WARN_ON(!IS_ELKHARTLAKE(dev_priv));
> -		return PCH_MCC;
> -	case INTEL_PCH_TGP_DEVICE_ID_TYPE:
> -		DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
> -		WARN_ON(!IS_TIGERLAKE(dev_priv));
> -		return PCH_TGP;
> -	default:
> -		return PCH_NONE;
> -	}
> -}
> -
> -static bool intel_is_virt_pch(unsigned short id,
> -			      unsigned short svendor, unsigned short
> sdevice)
> -{
> -	return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
> -		id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
> -		(id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
> -		 svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
> -		 sdevice == PCI_SUBDEVICE_ID_QEMU));
> -}
> -
> -static unsigned short
> -intel_virt_detect_pch(const struct drm_i915_private *dev_priv)
> -{
> -	unsigned short id = 0;
> -
> -	/*
> -	 * In a virtualized passthrough environment we can be in a
> -	 * setup where the ISA bridge is not able to be passed through.
> -	 * In this case, a south bridge can be emulated and we have to
> -	 * make an educated guess as to which PCH is really there.
> -	 */
> -
> -	if (IS_TIGERLAKE(dev_priv))
> -		id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
> -	else if (IS_ELKHARTLAKE(dev_priv))
> -		id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
> -	else if (IS_ICELAKE(dev_priv))
> -		id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
> -	else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
> -		id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
> -	else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
> -		id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
> -	else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
> -		id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
> -	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> -		id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
> -	else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
> -		id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
> -	else if (IS_GEN(dev_priv, 5))
> -		id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
> -
> -	if (id)
> -		DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id);
> -	else
> -		DRM_DEBUG_KMS("Assuming no PCH\n");
> -
> -	return id;
> -}
> -
> -static void intel_detect_pch(struct drm_i915_private *dev_priv)
> -{
> -	struct pci_dev *pch = NULL;
> -
> -	/*
> -	 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
> -	 * make graphics device passthrough work easy for VMM, that
> only
> -	 * need to expose ISA bridge to let driver know the real
> hardware
> -	 * underneath. This is a requirement from virtualization team.
> -	 *
> -	 * In some virtualized environments (e.g. XEN), there is
> irrelevant
> -	 * ISA bridge in the system. To work reliably, we should scan
> trhough
> -	 * all the ISA bridge devices and check for the first match,
> instead
> -	 * of only checking the first one.
> -	 */
> -	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
> -		unsigned short id;
> -		enum intel_pch pch_type;
> -
> -		if (pch->vendor != PCI_VENDOR_ID_INTEL)
> -			continue;
> -
> -		id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
> -
> -		pch_type = intel_pch_type(dev_priv, id);
> -		if (pch_type != PCH_NONE) {
> -			dev_priv->pch_type = pch_type;
> -			dev_priv->pch_id = id;
> -			break;
> -		} else if (intel_is_virt_pch(id, pch->subsystem_vendor,
> -					 pch->subsystem_device)) {
> -			id = intel_virt_detect_pch(dev_priv);
> -			pch_type = intel_pch_type(dev_priv, id);
> -
> -			/* Sanity check virtual PCH id */
> -			if (WARN_ON(id && pch_type == PCH_NONE))
> -				id = 0;
> -
> -			dev_priv->pch_type = pch_type;
> -			dev_priv->pch_id = id;
> -			break;
> -		}
> -	}
> -
> -	/*
> -	 * Use PCH_NOP (PCH but no South Display) for PCH platforms
> without
> -	 * display.
> -	 */
> -	if (pch && !HAS_DISPLAY(dev_priv)) {
> -		DRM_DEBUG_KMS("Display disabled, reverting to NOP
> PCH\n");
> -		dev_priv->pch_type = PCH_NOP;
> -		dev_priv->pch_id = 0;
> -	}
> -
> -	if (!pch)
> -		DRM_DEBUG_KMS("No PCH found.\n");
> -
> -	pci_dev_put(pch);
> -}
> -
>  static int i915_getparam_ioctl(struct drm_device *dev, void *data,
>  			       struct drm_file *file_priv)
>  {
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 7d424ddd3523..43b0d149d114 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -77,6 +77,7 @@
>  #include "gt/uc/intel_uc.h"
>  
>  #include "intel_device_info.h"
> +#include "intel_pch.h"
>  #include "intel_runtime_pm.h"
>  #include "intel_uncore.h"
>  #include "intel_wakeref.h"
> @@ -528,25 +529,6 @@ struct i915_psr {
>  	u16 su_x_granularity;
>  };
>  
> -/*
> - * Sorted by south display engine compatibility.
> - * If the new PCH comes with a south display engine that is not
> - * inherited from the latest item, please do not add it to the
> - * end. Instead, add it right after its "parent" PCH.
> - */
> -enum intel_pch {
> -	PCH_NOP = -1,	/* PCH without south display */
> -	PCH_NONE = 0,	/* No PCH present */
> -	PCH_IBX,	/* Ibexpeak PCH */
> -	PCH_CPT,	/* Cougarpoint/Pantherpoint PCH */
> -	PCH_LPT,	/* Lynxpoint/Wildcatpoint PCH */
> -	PCH_SPT,        /* Sunrisepoint/Kaby Lake PCH */
> -	PCH_CNP,        /* Cannon/Comet Lake PCH */
> -	PCH_ICP,	/* Ice Lake PCH */
> -	PCH_MCC,        /* Mule Creek Canyon PCH */
> -	PCH_TGP,	/* Tiger Lake PCH */
> -};
> -
>  #define QUIRK_LVDS_SSC_DISABLE (1<<1)
>  #define QUIRK_INVERT_BRIGHTNESS (1<<2)
>  #define QUIRK_BACKLIGHT_PRESENT (1<<3)
> @@ -2291,46 +2273,6 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915,
>  
>  #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)	(INTEL_INFO(dev_priv)-
> >has_global_mocs)
>  
> -#define INTEL_PCH_DEVICE_ID_MASK		0xff80
> -#define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
> -#define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00
> -#define INTEL_PCH_PPT_DEVICE_ID_TYPE		0x1e00
> -#define INTEL_PCH_LPT_DEVICE_ID_TYPE		0x8c00
> -#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE		0x9c00
> -#define INTEL_PCH_WPT_DEVICE_ID_TYPE		0x8c80
> -#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE		0x9c80
> -#define INTEL_PCH_SPT_DEVICE_ID_TYPE		0xA100
> -#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE		0x9D00
> -#define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA280
> -#define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA300
> -#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE		0x9D80
> -#define INTEL_PCH_CMP_DEVICE_ID_TYPE		0x0280
> -#define INTEL_PCH_ICP_DEVICE_ID_TYPE		0x3480
> -#define INTEL_PCH_MCC_DEVICE_ID_TYPE		0x4B00
> -#define INTEL_PCH_MCC2_DEVICE_ID_TYPE		0x3880
> -#define INTEL_PCH_TGP_DEVICE_ID_TYPE		0xA080
> -#define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100
> -#define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000
> -#define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu
> q35 has 2918 */
> -
> -#define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
> -#define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id)
> -#define HAS_PCH_MCC(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_MCC)
> -#define HAS_PCH_TGP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_TGP)
> -#define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP)
> -#define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
> -#define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
> -#define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT)
> -#define HAS_PCH_LPT_LP(dev_priv) \
> -	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE || \
> -	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_LP_DEVICE_ID_TYPE)
> -#define HAS_PCH_LPT_H(dev_priv) \
> -	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_DEVICE_ID_TYPE || \
> -	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_DEVICE_ID_TYPE)
> -#define HAS_PCH_CPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CPT)
> -#define HAS_PCH_IBX(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_IBX)
> -#define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP)
> -#define HAS_PCH_SPLIT(dev_priv) (INTEL_PCH_TYPE(dev_priv) !=
> PCH_NONE)
>  
>  #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
>  
> diff --git a/drivers/gpu/drm/i915/intel_pch.c
> b/drivers/gpu/drm/i915/intel_pch.c
> new file mode 100644
> index 000000000000..fa864d8f2b73
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_pch.c
> @@ -0,0 +1,201 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright 2019 Intel Corporation.
> + */
> +
> +#include "i915_drv.h"
> +#include "intel_pch.h"
> +
> +/* Map PCH device id to PCH type, or PCH_NONE if unknown. */
> +static enum intel_pch
> +intel_pch_type(const struct drm_i915_private *dev_priv, unsigned
> short id)
> +{
> +	switch (id) {
> +	case INTEL_PCH_IBX_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
> +		WARN_ON(!IS_GEN(dev_priv, 5));
> +		return PCH_IBX;
> +	case INTEL_PCH_CPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found CougarPoint PCH\n");
> +		WARN_ON(!IS_GEN(dev_priv, 6) &&
> !IS_IVYBRIDGE(dev_priv));
> +		return PCH_CPT;
> +	case INTEL_PCH_PPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found PantherPoint PCH\n");
> +		WARN_ON(!IS_GEN(dev_priv, 6) &&
> !IS_IVYBRIDGE(dev_priv));
> +		/* PantherPoint is CPT compatible */
> +		return PCH_CPT;
> +	case INTEL_PCH_LPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found LynxPoint PCH\n");
> +		WARN_ON(!IS_HASWELL(dev_priv) &&
> !IS_BROADWELL(dev_priv));
> +		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
> +		return PCH_LPT;
> +	case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
> +		WARN_ON(!IS_HASWELL(dev_priv) &&
> !IS_BROADWELL(dev_priv));
> +		WARN_ON(!IS_HSW_ULT(dev_priv) &&
> !IS_BDW_ULT(dev_priv));
> +		return PCH_LPT;
> +	case INTEL_PCH_WPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found WildcatPoint PCH\n");
> +		WARN_ON(!IS_HASWELL(dev_priv) &&
> !IS_BROADWELL(dev_priv));
> +		WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
> +		/* WildcatPoint is LPT compatible */
> +		return PCH_LPT;
> +	case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n");
> +		WARN_ON(!IS_HASWELL(dev_priv) &&
> !IS_BROADWELL(dev_priv));
> +		WARN_ON(!IS_HSW_ULT(dev_priv) &&
> !IS_BDW_ULT(dev_priv));
> +		/* WildcatPoint is LPT compatible */
> +		return PCH_LPT;
> +	case INTEL_PCH_SPT_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
> +		WARN_ON(!IS_SKYLAKE(dev_priv) &&
> !IS_KABYLAKE(dev_priv));
> +		return PCH_SPT;
> +	case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
> +		WARN_ON(!IS_SKYLAKE(dev_priv) &&
> !IS_KABYLAKE(dev_priv));
> +		return PCH_SPT;
> +	case INTEL_PCH_KBP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n");
> +		WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv)
> &&
> +			!IS_COFFEELAKE(dev_priv));
> +		/* KBP is SPT compatible */
> +		return PCH_SPT;
> +	case INTEL_PCH_CNP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n");
> +		WARN_ON(!IS_CANNONLAKE(dev_priv) &&
> !IS_COFFEELAKE(dev_priv));
> +		return PCH_CNP;
> +	case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
> +		WARN_ON(!IS_CANNONLAKE(dev_priv) &&
> !IS_COFFEELAKE(dev_priv));
> +		return PCH_CNP;
> +	case INTEL_PCH_CMP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n");
> +		WARN_ON(!IS_COFFEELAKE(dev_priv));
> +		/* CometPoint is CNP Compatible */
> +		return PCH_CNP;
> +	case INTEL_PCH_ICP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Ice Lake PCH\n");
> +		WARN_ON(!IS_ICELAKE(dev_priv));
> +		return PCH_ICP;
> +	case INTEL_PCH_MCC_DEVICE_ID_TYPE:
> +	case INTEL_PCH_MCC2_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
> +		WARN_ON(!IS_ELKHARTLAKE(dev_priv));
> +		return PCH_MCC;
> +	case INTEL_PCH_TGP_DEVICE_ID_TYPE:
> +		DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
> +		WARN_ON(!IS_TIGERLAKE(dev_priv));
> +		return PCH_TGP;
> +	default:
> +		return PCH_NONE;
> +	}
> +}
> +
> +static bool intel_is_virt_pch(unsigned short id,
> +			      unsigned short svendor, unsigned short
> sdevice)
> +{
> +	return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
> +		id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
> +		(id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
> +		 svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
> +		 sdevice == PCI_SUBDEVICE_ID_QEMU));
> +}
> +
> +static unsigned short
> +intel_virt_detect_pch(const struct drm_i915_private *dev_priv)
> +{
> +	unsigned short id = 0;
> +
> +	/*
> +	 * In a virtualized passthrough environment we can be in a
> +	 * setup where the ISA bridge is not able to be passed through.
> +	 * In this case, a south bridge can be emulated and we have to
> +	 * make an educated guess as to which PCH is really there.
> +	 */
> +
> +	if (IS_TIGERLAKE(dev_priv))
> +		id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
> +	else if (IS_ELKHARTLAKE(dev_priv))
> +		id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
> +	else if (IS_ICELAKE(dev_priv))
> +		id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
> +	else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
> +		id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
> +	else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
> +		id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
> +	else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
> +		id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
> +	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> +		id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
> +	else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
> +		id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
> +	else if (IS_GEN(dev_priv, 5))
> +		id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
> +
> +	if (id)
> +		DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id);
> +	else
> +		DRM_DEBUG_KMS("Assuming no PCH\n");
> +
> +	return id;
> +}
> +
> +void intel_detect_pch(struct drm_i915_private *dev_priv)
> +{
> +	struct pci_dev *pch = NULL;
> +
> +	/*
> +	 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
> +	 * make graphics device passthrough work easy for VMM, that
> only
> +	 * need to expose ISA bridge to let driver know the real
> hardware
> +	 * underneath. This is a requirement from virtualization team.
> +	 *
> +	 * In some virtualized environments (e.g. XEN), there is
> irrelevant
> +	 * ISA bridge in the system. To work reliably, we should scan
> trhough
> +	 * all the ISA bridge devices and check for the first match,
> instead
> +	 * of only checking the first one.
> +	 */
> +	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
> +		unsigned short id;
> +		enum intel_pch pch_type;
> +
> +		if (pch->vendor != PCI_VENDOR_ID_INTEL)
> +			continue;
> +
> +		id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
> +
> +		pch_type = intel_pch_type(dev_priv, id);
> +		if (pch_type != PCH_NONE) {
> +			dev_priv->pch_type = pch_type;
> +			dev_priv->pch_id = id;
> +			break;
> +		} else if (intel_is_virt_pch(id, pch->subsystem_vendor,
> +					     pch->subsystem_device)) {
> +			id = intel_virt_detect_pch(dev_priv);
> +			pch_type = intel_pch_type(dev_priv, id);
> +
> +			/* Sanity check virtual PCH id */
> +			if (WARN_ON(id && pch_type == PCH_NONE))
> +				id = 0;
> +
> +			dev_priv->pch_type = pch_type;
> +			dev_priv->pch_id = id;
> +			break;
> +		}
> +	}
> +
> +	/*
> +	 * Use PCH_NOP (PCH but no South Display) for PCH platforms
> without
> +	 * display.
> +	 */
> +	if (pch && !HAS_DISPLAY(dev_priv)) {
> +		DRM_DEBUG_KMS("Display disabled, reverting to NOP
> PCH\n");
> +		dev_priv->pch_type = PCH_NOP;
> +		dev_priv->pch_id = 0;
> +	}
> +
> +	if (!pch)
> +		DRM_DEBUG_KMS("No PCH found.\n");
> +
> +	pci_dev_put(pch);
> +}
> diff --git a/drivers/gpu/drm/i915/intel_pch.h
> b/drivers/gpu/drm/i915/intel_pch.h
> new file mode 100644
> index 000000000000..e6a2d65f19c6
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_pch.h
> @@ -0,0 +1,73 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright 2019 Intel Corporation.
> + */
> +
> +#ifndef __INTEL_PCH__
> +#define __INTEL_PCH__
> +
> +struct drm_i915_private;
> +
> +/*
> + * Sorted by south display engine compatibility.
> + * If the new PCH comes with a south display engine that is not
> + * inherited from the latest item, please do not add it to the
> + * end. Instead, add it right after its "parent" PCH.
> + */
> +enum intel_pch {
> +	PCH_NOP = -1,	/* PCH without south display */
> +	PCH_NONE = 0,	/* No PCH present */
> +	PCH_IBX,	/* Ibexpeak PCH */
> +	PCH_CPT,	/* Cougarpoint/Pantherpoint PCH */
> +	PCH_LPT,	/* Lynxpoint/Wildcatpoint PCH */
> +	PCH_SPT,        /* Sunrisepoint/Kaby Lake PCH */
> +	PCH_CNP,        /* Cannon/Comet Lake PCH */
> +	PCH_ICP,	/* Ice Lake PCH */
> +	PCH_MCC,        /* Mule Creek Canyon PCH */
> +	PCH_TGP,	/* Tiger Lake PCH */
> +};
> +
> +#define INTEL_PCH_DEVICE_ID_MASK		0xff80
> +#define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
> +#define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00
> +#define INTEL_PCH_PPT_DEVICE_ID_TYPE		0x1e00
> +#define INTEL_PCH_LPT_DEVICE_ID_TYPE		0x8c00
> +#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE		0x9c00
> +#define INTEL_PCH_WPT_DEVICE_ID_TYPE		0x8c80
> +#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE		0x9c80
> +#define INTEL_PCH_SPT_DEVICE_ID_TYPE		0xA100
> +#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE		0x9D00
> +#define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA280
> +#define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA300
> +#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE		0x9D80
> +#define INTEL_PCH_CMP_DEVICE_ID_TYPE		0x0280
> +#define INTEL_PCH_ICP_DEVICE_ID_TYPE		0x3480
> +#define INTEL_PCH_MCC_DEVICE_ID_TYPE		0x4B00
> +#define INTEL_PCH_MCC2_DEVICE_ID_TYPE		0x3880
> +#define INTEL_PCH_TGP_DEVICE_ID_TYPE		0xA080
> +#define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100
> +#define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000
> +#define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu
> q35 has 2918 */
> +
> +#define INTEL_PCH_TYPE(dev_priv)		((dev_priv)->pch_type)
> +#define INTEL_PCH_ID(dev_priv)			((dev_priv)-
> >pch_id)
> +#define HAS_PCH_MCC(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) == PCH_MCC)
> +#define HAS_PCH_TGP(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) == PCH_TGP)
> +#define HAS_PCH_ICP(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) == PCH_ICP)
> +#define HAS_PCH_CNP(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) == PCH_CNP)
> +#define HAS_PCH_SPT(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) == PCH_SPT)
> +#define HAS_PCH_LPT(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) == PCH_LPT)
> +#define HAS_PCH_LPT_LP(dev_priv) \
> +	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE || \
> +	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_LP_DEVICE_ID_TYPE)
> +#define HAS_PCH_LPT_H(dev_priv) \
> +	(INTEL_PCH_ID(dev_priv) == INTEL_PCH_LPT_DEVICE_ID_TYPE || \
> +	 INTEL_PCH_ID(dev_priv) == INTEL_PCH_WPT_DEVICE_ID_TYPE)
> +#define HAS_PCH_CPT(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) == PCH_CPT)
> +#define HAS_PCH_IBX(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) == PCH_IBX)
> +#define HAS_PCH_NOP(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) == PCH_NOP)
> +#define HAS_PCH_SPLIT(dev_priv)			(INTEL_PCH_TYPE
> (dev_priv) != PCH_NONE)
> +
> +void intel_detect_pch(struct drm_i915_private *dev_priv);
> +
> +#endif /* __INTEL_PCH__ */
_______________________________________________
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✗ Fi.CI.IGT: failure for drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

[Patchwork]

== Series Details ==

Series: drm/i915: split out intel_pch.[ch] from i915_drv.[ch]
URL   : https://patchwork.freedesktop.org/series/64833/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6646_full -> Patchwork_13899_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_13899_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_13899_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_13899_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
    - shard-kbl:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-kbl7/igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-kbl3/igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing.html

  * igt@prime_busy@wait-hang-blt:
    - shard-apl:          [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl4/igt@prime_busy@wait-hang-blt.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl3/igt@prime_busy@wait-hang-blt.html

  
Known issues
------------

  Here are the changes found in Patchwork_13899_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-kbl:          [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-kbl4/igt@gem_ctx_isolation@bcs0-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-kbl7/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-hsw:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108686])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-hsw6/igt@gem_tiled_swapping@non-threaded.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-hsw7/igt@gem_tiled_swapping@non-threaded.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-skl:          [PASS][9] -> [INCOMPLETE][10] ([fdo#104108])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl7/igt@i915_suspend@fence-restore-untiled.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl2/igt@i915_suspend@fence-restore-untiled.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [PASS][11] -> [FAIL][12] ([fdo#105767])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic:
    - shard-skl:          [PASS][13] -> [DMESG-WARN][14] ([fdo#105541])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl2/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl7/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [PASS][15] -> [FAIL][16] ([fdo#105363])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl9/igt@kms_flip@flip-vs-expired-vblank.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl10/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-wf_vblank-interruptible:
    - shard-skl:          [PASS][17] -> [FAIL][18] ([fdo#100368])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl7/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl8/igt@kms_flip@flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@modeset-vs-vblank-race:
    - shard-iclb:         [PASS][19] -> [INCOMPLETE][20] ([fdo#107713]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb4/igt@kms_flip@modeset-vs-vblank-race.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb1/igt@kms_flip@modeset-vs-vblank-race.html

  * igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
    - shard-iclb:         [PASS][21] -> [FAIL][22] ([fdo#103167])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-apl:          [PASS][23] -> [DMESG-WARN][24] ([fdo#108566]) +1 similar issue
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [PASS][25] -> [FAIL][26] ([fdo#108145])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][27] -> [FAIL][28] ([fdo#108145] / [fdo#110403])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_suspend:
    - shard-iclb:         [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb2/igt@kms_psr@psr2_suspend.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb7/igt@kms_psr@psr2_suspend.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][31] -> [FAIL][32] ([fdo#99912])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl4/igt@kms_setmode@basic.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl3/igt@kms_setmode@basic.html

  * igt@perf@polling:
    - shard-skl:          [PASS][33] -> [FAIL][34] ([fdo#110728])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl5/igt@perf@polling.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl8/igt@perf@polling.html

  
#### Possible fixes ####

  * igt@i915_pm_rps@reset:
    - shard-apl:          [FAIL][35] ([fdo#102250]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl4/igt@i915_pm_rps@reset.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl3/igt@i915_pm_rps@reset.html
    - shard-skl:          [FAIL][37] ([fdo#102250]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl2/igt@i915_pm_rps@reset.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl5/igt@i915_pm_rps@reset.html
    - shard-glk:          [FAIL][39] ([fdo#102250]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-glk1/igt@i915_pm_rps@reset.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-glk4/igt@i915_pm_rps@reset.html

  * igt@i915_query@engine-info:
    - shard-iclb:         [FAIL][41] -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb2/igt@i915_query@engine-info.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb6/igt@i915_query@engine-info.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-apl:          [DMESG-WARN][43] ([fdo#108566]) -> [PASS][44] +3 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl3/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-glk:          [FAIL][45] ([fdo#105363]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [FAIL][47] ([fdo#105363]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          [INCOMPLETE][49] ([fdo#109507]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl6/igt@kms_flip@flip-vs-suspend.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl6/igt@kms_flip@flip-vs-suspend.html
    - shard-snb:          [INCOMPLETE][51] ([fdo#105411]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-snb1/igt@kms_flip@flip-vs-suspend.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-snb2/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite:
    - shard-hsw:          [SKIP][53] ([fdo#109271]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-hsw6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-hsw6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [FAIL][55] ([fdo#103167]) -> [PASS][56] +3 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-skl:          [INCOMPLETE][57] ([fdo#104108]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
    - shard-kbl:          [DMESG-WARN][59] ([fdo#108566]) -> [PASS][60] +6 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [FAIL][61] ([fdo#108145] / [fdo#110403]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         [FAIL][63] ([fdo#103166]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb2/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [SKIP][65] ([fdo#109441]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb8/igt@kms_psr@psr2_cursor_blt.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html

  
  [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
  [fdo#102250]: https://bugs.freedesktop.org/show_bug.cgi?id=102250
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6646 -> Patchwork_13899

  CI-20190529: 20190529
  CI_DRM_6646: 9345af1901748aeaed19ac13bf7ec4fb3336fc29 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5125: 35d81d01b1599b4bc4df0e09e25f6f531eed4f8a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13899: 07241392f28e63f31bcbc653533102e8230a6148 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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Re: ✗ Fi.CI.IGT: failure for drm/i915: split out intel_pch.[ch] from i915_drv.[ch]

[Jani Nikula]

On Wed, 07 Aug 2019, Patchwork <patchwork@emeril.freedesktop.org> wrote:
> == Series Details ==
>
> Series: drm/i915: split out intel_pch.[ch] from i915_drv.[ch]
> URL   : https://patchwork.freedesktop.org/series/64833/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6646_full -> Patchwork_13899_full
> ====================================================
>
> Summary
> -------
>
>   **FAILURE**
>
>   Serious unknown changes coming with Patchwork_13899_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_13899_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
>
>   
>
> Possible new issues
> -------------------
>
>   Here are the unknown changes that may have been introduced in Patchwork_13899_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
>   * igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
>     - shard-kbl:          [PASS][1] -> [FAIL][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-kbl7/igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-kbl3/igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing.html
>
>   * igt@prime_busy@wait-hang-blt:
>     - shard-apl:          [PASS][3] -> [DMESG-WARN][4]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl4/igt@prime_busy@wait-hang-blt.html
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl3/igt@prime_busy@wait-hang-blt.html

I don't see how these could've been caused by the non-functional code
juggling in this patch. Pushed to dinq, thanks for the reviews.

BR,
Jani.

>
>   
> Known issues
> ------------
>
>   Here are the changes found in Patchwork_13899_full that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
>   * igt@gem_ctx_isolation@bcs0-s3:
>     - shard-kbl:          [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +1 similar issue
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-kbl4/igt@gem_ctx_isolation@bcs0-s3.html
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-kbl7/igt@gem_ctx_isolation@bcs0-s3.html
>
>   * igt@gem_tiled_swapping@non-threaded:
>     - shard-hsw:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108686])
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-hsw6/igt@gem_tiled_swapping@non-threaded.html
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-hsw7/igt@gem_tiled_swapping@non-threaded.html
>
>   * igt@i915_suspend@fence-restore-untiled:
>     - shard-skl:          [PASS][9] -> [INCOMPLETE][10] ([fdo#104108])
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl7/igt@i915_suspend@fence-restore-untiled.html
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl2/igt@i915_suspend@fence-restore-untiled.html
>
>   * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
>     - shard-hsw:          [PASS][11] -> [FAIL][12] ([fdo#105767])
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
>
>   * igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic:
>     - shard-skl:          [PASS][13] -> [DMESG-WARN][14] ([fdo#105541])
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl2/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl7/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html
>
>   * igt@kms_flip@flip-vs-expired-vblank:
>     - shard-skl:          [PASS][15] -> [FAIL][16] ([fdo#105363])
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl9/igt@kms_flip@flip-vs-expired-vblank.html
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl10/igt@kms_flip@flip-vs-expired-vblank.html
>
>   * igt@kms_flip@flip-vs-wf_vblank-interruptible:
>     - shard-skl:          [PASS][17] -> [FAIL][18] ([fdo#100368])
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl7/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl8/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
>
>   * igt@kms_flip@modeset-vs-vblank-race:
>     - shard-iclb:         [PASS][19] -> [INCOMPLETE][20] ([fdo#107713]) +1 similar issue
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb4/igt@kms_flip@modeset-vs-vblank-race.html
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb1/igt@kms_flip@modeset-vs-vblank-race.html
>
>   * igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
>     - shard-iclb:         [PASS][21] -> [FAIL][22] ([fdo#103167])
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html
>
>   * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
>     - shard-apl:          [PASS][23] -> [DMESG-WARN][24] ([fdo#108566]) +1 similar issue
>    [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
>
>   * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
>     - shard-skl:          [PASS][25] -> [FAIL][26] ([fdo#108145])
>    [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
>
>   * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
>     - shard-skl:          [PASS][27] -> [FAIL][28] ([fdo#108145] / [fdo#110403])
>    [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>
>   * igt@kms_psr@psr2_suspend:
>     - shard-iclb:         [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue
>    [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb2/igt@kms_psr@psr2_suspend.html
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb7/igt@kms_psr@psr2_suspend.html
>
>   * igt@kms_setmode@basic:
>     - shard-apl:          [PASS][31] -> [FAIL][32] ([fdo#99912])
>    [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl4/igt@kms_setmode@basic.html
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl3/igt@kms_setmode@basic.html
>
>   * igt@perf@polling:
>     - shard-skl:          [PASS][33] -> [FAIL][34] ([fdo#110728])
>    [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl5/igt@perf@polling.html
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl8/igt@perf@polling.html
>
>   
> #### Possible fixes ####
>
>   * igt@i915_pm_rps@reset:
>     - shard-apl:          [FAIL][35] ([fdo#102250]) -> [PASS][36]
>    [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl4/igt@i915_pm_rps@reset.html
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl3/igt@i915_pm_rps@reset.html
>     - shard-skl:          [FAIL][37] ([fdo#102250]) -> [PASS][38]
>    [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl2/igt@i915_pm_rps@reset.html
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl5/igt@i915_pm_rps@reset.html
>     - shard-glk:          [FAIL][39] ([fdo#102250]) -> [PASS][40]
>    [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-glk1/igt@i915_pm_rps@reset.html
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-glk4/igt@i915_pm_rps@reset.html
>
>   * igt@i915_query@engine-info:
>     - shard-iclb:         [FAIL][41] -> [PASS][42]
>    [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb2/igt@i915_query@engine-info.html
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb6/igt@i915_query@engine-info.html
>
>   * igt@kms_cursor_crc@pipe-b-cursor-suspend:
>     - shard-apl:          [DMESG-WARN][43] ([fdo#108566]) -> [PASS][44] +3 similar issues
>    [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-apl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
>    [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-apl3/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
>
>   * igt@kms_flip@2x-flip-vs-expired-vblank:
>     - shard-glk:          [FAIL][45] ([fdo#105363]) -> [PASS][46]
>    [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank.html
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank.html
>
>   * igt@kms_flip@flip-vs-expired-vblank-interruptible:
>     - shard-skl:          [FAIL][47] ([fdo#105363]) -> [PASS][48]
>    [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
>
>   * igt@kms_flip@flip-vs-suspend:
>     - shard-skl:          [INCOMPLETE][49] ([fdo#109507]) -> [PASS][50]
>    [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl6/igt@kms_flip@flip-vs-suspend.html
>    [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl6/igt@kms_flip@flip-vs-suspend.html
>     - shard-snb:          [INCOMPLETE][51] ([fdo#105411]) -> [PASS][52]
>    [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-snb1/igt@kms_flip@flip-vs-suspend.html
>    [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-snb2/igt@kms_flip@flip-vs-suspend.html
>
>   * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite:
>     - shard-hsw:          [SKIP][53] ([fdo#109271]) -> [PASS][54]
>    [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-hsw6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite.html
>    [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-hsw6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite.html
>
>   * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
>     - shard-iclb:         [FAIL][55] ([fdo#103167]) -> [PASS][56] +3 similar issues
>    [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
>    [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
>
>   * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
>     - shard-skl:          [INCOMPLETE][57] ([fdo#104108]) -> [PASS][58]
>    [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
>    [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
>
>   * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
>     - shard-kbl:          [DMESG-WARN][59] ([fdo#108566]) -> [PASS][60] +6 similar issues
>    [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
>    [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
>
>   * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
>     - shard-skl:          [FAIL][61] ([fdo#108145] / [fdo#110403]) -> [PASS][62]
>    [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
>    [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
>
>   * igt@kms_plane_lowres@pipe-a-tiling-y:
>     - shard-iclb:         [FAIL][63] ([fdo#103166]) -> [PASS][64]
>    [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-y.html
>    [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb2/igt@kms_plane_lowres@pipe-a-tiling-y.html
>
>   * igt@kms_psr@psr2_cursor_blt:
>     - shard-iclb:         [SKIP][65] ([fdo#109441]) -> [PASS][66] +1 similar issue
>    [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6646/shard-iclb8/igt@kms_psr@psr2_cursor_blt.html
>    [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
>
>   
>   [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
>   [fdo#102250]: https://bugs.freedesktop.org/show_bug.cgi?id=102250
>   [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
>   [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
>   [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
>   [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
>   [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
>   [fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541
>   [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
>   [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
>   [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
>   [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
>   [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
>   [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
>   [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
>
>
> Participating hosts (10 -> 10)
> ------------------------------
>
>   No changes in participating hosts
>
>
> Build changes
> -------------
>
>   * CI: CI-20190529 -> None
>   * Linux: CI_DRM_6646 -> Patchwork_13899
>
>   CI-20190529: 20190529
>   CI_DRM_6646: 9345af1901748aeaed19ac13bf7ec4fb3336fc29 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_5125: 35d81d01b1599b4bc4df0e09e25f6f531eed4f8a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_13899: 07241392f28e63f31bcbc653533102e8230a6148 @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13899/

-- 
Jani Nikula, Intel Open Source Graphics Center
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