* [PATCH 01/13] drm/i915/bios: make child device order the priority order
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
@ 2019-05-31 13:14 ` Jani Nikula
2019-05-31 14:04 ` Ville Syrjälä
2019-05-31 13:14 ` [PATCH 02/13] drm/i915/bios: store child device pointer in DDI port info Jani Nikula
` (13 subsequent siblings)
14 siblings, 1 reply; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:14 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Make the child device order the priority order in sanitizing DDC pin and
AUX CH. First come, first served.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 32 +++++++++++++++----------------
1 file changed, 15 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index a0b708f7f384..0a1b9a4a1b71 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1242,8 +1242,7 @@ static u8 translate_iboost(u8 val)
static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
enum port port)
{
- const struct ddi_vbt_port_info *info =
- &dev_priv->vbt.ddi_port_info[port];
+ struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
enum port p;
if (!info->alternate_ddc_pin)
@@ -1258,8 +1257,8 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
"disabling port %c DVI/HDMI support\n",
- port_name(p), i->alternate_ddc_pin,
- port_name(port), port_name(p));
+ port_name(port), info->alternate_ddc_pin,
+ port_name(p), port_name(port));
/*
* If we have multiple ports supposedly sharing the
@@ -1267,20 +1266,19 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
* port. Otherwise they share the same ddc bin and
* system couldn't communicate with them separately.
*
- * Due to parsing the ports in child device order,
- * a later device will always clobber an earlier one.
+ * Give child device order the priority, first come first
+ * served.
*/
- i->supports_dvi = false;
- i->supports_hdmi = false;
- i->alternate_ddc_pin = 0;
+ info->supports_dvi = false;
+ info->supports_hdmi = false;
+ info->alternate_ddc_pin = 0;
}
}
static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
enum port port)
{
- const struct ddi_vbt_port_info *info =
- &dev_priv->vbt.ddi_port_info[port];
+ struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
enum port p;
if (!info->alternate_aux_channel)
@@ -1295,8 +1293,8 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
"disabling port %c DP support\n",
- port_name(p), i->alternate_aux_channel,
- port_name(port), port_name(p));
+ port_name(port), info->alternate_aux_channel,
+ port_name(p), port_name(port));
/*
* If we have multiple ports supposedlt sharing the
@@ -1304,11 +1302,11 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
* port. Otherwise they share the same aux channel
* and system couldn't communicate with them separately.
*
- * Due to parsing the ports in child device order,
- * a later device will always clobber an earlier one.
+ * Give child device order the priority, first come first
+ * served.
*/
- i->supports_dp = false;
- i->alternate_aux_channel = 0;
+ info->supports_dp = false;
+ info->alternate_aux_channel = 0;
}
}
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH 01/13] drm/i915/bios: make child device order the priority order
2019-05-31 13:14 ` [PATCH 01/13] drm/i915/bios: make child device order the priority order Jani Nikula
@ 2019-05-31 14:04 ` Ville Syrjälä
2019-06-05 12:22 ` Jani Nikula
0 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjälä @ 2019-05-31 14:04 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Fri, May 31, 2019 at 04:14:51PM +0300, Jani Nikula wrote:
> Make the child device order the priority order in sanitizing DDC pin and
> AUX CH. First come, first served.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/intel_bios.c | 32 +++++++++++++++----------------
> 1 file changed, 15 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index a0b708f7f384..0a1b9a4a1b71 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1242,8 +1242,7 @@ static u8 translate_iboost(u8 val)
> static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
> enum port port)
> {
> - const struct ddi_vbt_port_info *info =
> - &dev_priv->vbt.ddi_port_info[port];
> + struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
> enum port p;
>
> if (!info->alternate_ddc_pin)
> @@ -1258,8 +1257,8 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
>
> DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
> "disabling port %c DVI/HDMI support\n",
> - port_name(p), i->alternate_ddc_pin,
> - port_name(port), port_name(p));
> + port_name(port), info->alternate_ddc_pin,
> + port_name(p), port_name(port));
>
> /*
> * If we have multiple ports supposedly sharing the
> @@ -1267,20 +1266,19 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
> * port. Otherwise they share the same ddc bin and
> * system couldn't communicate with them separately.
> *
> - * Due to parsing the ports in child device order,
> - * a later device will always clobber an earlier one.
> + * Give child device order the priority, first come first
> + * served.
> */
> - i->supports_dvi = false;
> - i->supports_hdmi = false;
> - i->alternate_ddc_pin = 0;
> + info->supports_dvi = false;
> + info->supports_hdmi = false;
> + info->alternate_ddc_pin = 0;
'i' can now be const I think.
Series is
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Though I only glanced at the header reorganization things instead
of reading through it all in detail.
> }
> }
>
> static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
> enum port port)
> {
> - const struct ddi_vbt_port_info *info =
> - &dev_priv->vbt.ddi_port_info[port];
> + struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
> enum port p;
>
> if (!info->alternate_aux_channel)
> @@ -1295,8 +1293,8 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
>
> DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
> "disabling port %c DP support\n",
> - port_name(p), i->alternate_aux_channel,
> - port_name(port), port_name(p));
> + port_name(port), info->alternate_aux_channel,
> + port_name(p), port_name(port));
>
> /*
> * If we have multiple ports supposedlt sharing the
> @@ -1304,11 +1302,11 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
> * port. Otherwise they share the same aux channel
> * and system couldn't communicate with them separately.
> *
> - * Due to parsing the ports in child device order,
> - * a later device will always clobber an earlier one.
> + * Give child device order the priority, first come first
> + * served.
> */
> - i->supports_dp = false;
> - i->alternate_aux_channel = 0;
> + info->supports_dp = false;
> + info->alternate_aux_channel = 0;
> }
> }
>
> --
> 2.20.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 01/13] drm/i915/bios: make child device order the priority order
2019-05-31 14:04 ` Ville Syrjälä
@ 2019-06-05 12:22 ` Jani Nikula
0 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-06-05 12:22 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, 31 May 2019, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, May 31, 2019 at 04:14:51PM +0300, Jani Nikula wrote:
>> Make the child device order the priority order in sanitizing DDC pin and
>> AUX CH. First come, first served.
>>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_bios.c | 32 +++++++++++++++----------------
>> 1 file changed, 15 insertions(+), 17 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
>> index a0b708f7f384..0a1b9a4a1b71 100644
>> --- a/drivers/gpu/drm/i915/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/intel_bios.c
>> @@ -1242,8 +1242,7 @@ static u8 translate_iboost(u8 val)
>> static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
>> enum port port)
>> {
>> - const struct ddi_vbt_port_info *info =
>> - &dev_priv->vbt.ddi_port_info[port];
>> + struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
>> enum port p;
>>
>> if (!info->alternate_ddc_pin)
>> @@ -1258,8 +1257,8 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
>>
>> DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
>> "disabling port %c DVI/HDMI support\n",
>> - port_name(p), i->alternate_ddc_pin,
>> - port_name(port), port_name(p));
>> + port_name(port), info->alternate_ddc_pin,
>> + port_name(p), port_name(port));
>>
>> /*
>> * If we have multiple ports supposedly sharing the
>> @@ -1267,20 +1266,19 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
>> * port. Otherwise they share the same ddc bin and
>> * system couldn't communicate with them separately.
>> *
>> - * Due to parsing the ports in child device order,
>> - * a later device will always clobber an earlier one.
>> + * Give child device order the priority, first come first
>> + * served.
>> */
>> - i->supports_dvi = false;
>> - i->supports_hdmi = false;
>> - i->alternate_ddc_pin = 0;
>> + info->supports_dvi = false;
>> + info->supports_hdmi = false;
>> + info->alternate_ddc_pin = 0;
>
> 'i' can now be const I think.
I ignored that because 'i' gets removed a couple of patches later
anyway.
>
> Series is
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Though I only glanced at the header reorganization things instead
> of reading through it all in detail.
Thanks, pushed the lot.
BR,
Jani.
>
>> }
>> }
>>
>> static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
>> enum port port)
>> {
>> - const struct ddi_vbt_port_info *info =
>> - &dev_priv->vbt.ddi_port_info[port];
>> + struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
>> enum port p;
>>
>> if (!info->alternate_aux_channel)
>> @@ -1295,8 +1293,8 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
>>
>> DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
>> "disabling port %c DP support\n",
>> - port_name(p), i->alternate_aux_channel,
>> - port_name(port), port_name(p));
>> + port_name(port), info->alternate_aux_channel,
>> + port_name(p), port_name(port));
>>
>> /*
>> * If we have multiple ports supposedlt sharing the
>> @@ -1304,11 +1302,11 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
>> * port. Otherwise they share the same aux channel
>> * and system couldn't communicate with them separately.
>> *
>> - * Due to parsing the ports in child device order,
>> - * a later device will always clobber an earlier one.
>> + * Give child device order the priority, first come first
>> + * served.
>> */
>> - i->supports_dp = false;
>> - i->alternate_aux_channel = 0;
>> + info->supports_dp = false;
>> + info->alternate_aux_channel = 0;
>> }
>> }
>>
>> --
>> 2.20.1
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 02/13] drm/i915/bios: store child device pointer in DDI port info
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
2019-05-31 13:14 ` [PATCH 01/13] drm/i915/bios: make child device order the priority order Jani Nikula
@ 2019-05-31 13:14 ` Jani Nikula
2019-05-31 13:14 ` [PATCH 03/13] drm/i915/bios: refactor DDC pin and AUX CH sanitize functions Jani Nikula
` (12 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:14 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
This allows us to avoid iterating the child devices in some cases.
Also replace the presence bit with child device being non-NULL, and set
the child device pointer last to allow us to take advantage of it in
follow-up work.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 4 +++-
drivers/gpu/drm/i915/intel_bios.c | 10 +++++-----
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4eb8f6a181c1..169dd22c22ff 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -939,6 +939,9 @@ struct i915_gem_mm {
#define I915_ENGINE_WEDGED_TIMEOUT (60 * HZ) /* Reset but no recovery? */
struct ddi_vbt_port_info {
+ /* Non-NULL if port present. */
+ const struct child_device_config *child;
+
int max_tmds_clock;
/*
@@ -949,7 +952,6 @@ struct ddi_vbt_port_info {
#define HDMI_LEVEL_SHIFT_UNKNOWN 0xff
u8 hdmi_level_shift;
- u8 present:1;
u8 supports_dvi:1;
u8 supports_hdmi:1;
u8 supports_dp:1;
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 0a1b9a4a1b71..325b8c8dfa5e 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1251,7 +1251,7 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
for (p = PORT_A; p < I915_MAX_PORTS; p++) {
struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
- if (p == port || !i->present ||
+ if (p == port || !i->child ||
info->alternate_ddc_pin != i->alternate_ddc_pin)
continue;
@@ -1287,7 +1287,7 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
for (p = PORT_A; p < I915_MAX_PORTS; p++) {
struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
- if (p == port || !i->present ||
+ if (p == port || !i->child ||
info->alternate_aux_channel != i->alternate_aux_channel)
continue;
@@ -1395,14 +1395,12 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
info = &dev_priv->vbt.ddi_port_info[port];
- if (info->present) {
+ if (info->child) {
DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
port_name(port));
return;
}
- info->present = true;
-
is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
@@ -1530,6 +1528,8 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
DRM_DEBUG_KMS("VBT DP max link rate for port %c: %d\n",
port_name(port), info->dp_max_link_rate);
}
+
+ info->child = child;
}
static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
--
2.20.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 03/13] drm/i915/bios: refactor DDC pin and AUX CH sanitize functions
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
2019-05-31 13:14 ` [PATCH 01/13] drm/i915/bios: make child device order the priority order Jani Nikula
2019-05-31 13:14 ` [PATCH 02/13] drm/i915/bios: store child device pointer in DDI port info Jani Nikula
@ 2019-05-31 13:14 ` Jani Nikula
2019-05-31 13:14 ` [PATCH 04/13] drm/i915/bios: use port info child pointer to determine HPD invert Jani Nikula
` (11 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:14 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Add separate functions to get the port by DDC pin and AUX channel.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 48 ++++++++++++++++++++++---------
1 file changed, 34 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 325b8c8dfa5e..5cd4ddc8f5dd 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1239,6 +1239,21 @@ static u8 translate_iboost(u8 val)
return mapping[val];
}
+static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
+{
+ const struct ddi_vbt_port_info *info;
+ enum port port;
+
+ for (port = PORT_A; port < I915_MAX_PORTS; port++) {
+ info = &i915->vbt.ddi_port_info[port];
+
+ if (info->child && ddc_pin == info->alternate_ddc_pin)
+ return port;
+ }
+
+ return PORT_NONE;
+}
+
static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
enum port port)
{
@@ -1248,13 +1263,8 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
if (!info->alternate_ddc_pin)
return;
- for (p = PORT_A; p < I915_MAX_PORTS; p++) {
- struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
-
- if (p == port || !i->child ||
- info->alternate_ddc_pin != i->alternate_ddc_pin)
- continue;
-
+ p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
+ if (p != PORT_NONE) {
DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
"disabling port %c DVI/HDMI support\n",
port_name(port), info->alternate_ddc_pin,
@@ -1275,6 +1285,21 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
}
}
+static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
+{
+ const struct ddi_vbt_port_info *info;
+ enum port port;
+
+ for (port = PORT_A; port < I915_MAX_PORTS; port++) {
+ info = &i915->vbt.ddi_port_info[port];
+
+ if (info->child && aux_ch == info->alternate_aux_channel)
+ return port;
+ }
+
+ return PORT_NONE;
+}
+
static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
enum port port)
{
@@ -1284,13 +1309,8 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
if (!info->alternate_aux_channel)
return;
- for (p = PORT_A; p < I915_MAX_PORTS; p++) {
- struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
-
- if (p == port || !i->child ||
- info->alternate_aux_channel != i->alternate_aux_channel)
- continue;
-
+ p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
+ if (p != PORT_NONE) {
DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
"disabling port %c DP support\n",
port_name(port), info->alternate_aux_channel,
--
2.20.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 04/13] drm/i915/bios: use port info child pointer to determine HPD invert
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (2 preceding siblings ...)
2019-05-31 13:14 ` [PATCH 03/13] drm/i915/bios: refactor DDC pin and AUX CH sanitize functions Jani Nikula
@ 2019-05-31 13:14 ` Jani Nikula
2019-05-31 13:14 ` [PATCH 05/13] drm/i915/bios: use port info child pointer to determine LSPCON presence Jani Nikula
` (10 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:14 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Avoid iterating the child devices.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 39 +++++--------------------------
drivers/gpu/drm/i915/intel_bios.h | 2 +-
2 files changed, 7 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 5cd4ddc8f5dd..1f34ffa96219 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -2169,49 +2169,22 @@ bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
/**
* intel_bios_is_port_hpd_inverted - is HPD inverted for %port
- * @dev_priv: i915 device instance
+ * @i915: i915 device instance
* @port: port to check
*
* Return true if HPD should be inverted for %port.
*/
bool
-intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
+intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
enum port port)
{
- const struct child_device_config *child;
- int i;
+ const struct child_device_config *child =
+ i915->vbt.ddi_port_info[port].child;
- if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv)))
+ if (WARN_ON_ONCE(!IS_GEN9_LP(i915)))
return false;
- for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
- child = dev_priv->vbt.child_dev + i;
-
- if (!child->hpd_invert)
- continue;
-
- switch (child->dvo_port) {
- case DVO_PORT_DPA:
- case DVO_PORT_HDMIA:
- if (port == PORT_A)
- return true;
- break;
- case DVO_PORT_DPB:
- case DVO_PORT_HDMIB:
- if (port == PORT_B)
- return true;
- break;
- case DVO_PORT_DPC:
- case DVO_PORT_HDMIC:
- if (port == PORT_C)
- return true;
- break;
- default:
- break;
- }
- }
-
- return false;
+ return child && child->hpd_invert;
}
/**
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 7bac53f219e1..55fb0818926c 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -235,7 +235,7 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port);
bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, enum port *port);
-bool intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
+bool intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
enum port port);
bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
enum port port);
--
2.20.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 05/13] drm/i915/bios: use port info child pointer to determine LSPCON presence
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (3 preceding siblings ...)
2019-05-31 13:14 ` [PATCH 04/13] drm/i915/bios: use port info child pointer to determine HPD invert Jani Nikula
@ 2019-05-31 13:14 ` Jani Nikula
2019-05-31 13:14 ` [PATCH 06/13] drm/i915/bios: clean up VBT port info debug logging Jani Nikula
` (9 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:14 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Avoid iterating the child devices. This should be a non-functional
change, but theoretically this might enable LSPCON on some extra ports
with buggy VBTs.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 52 ++++---------------------------
drivers/gpu/drm/i915/intel_bios.h | 2 +-
2 files changed, 7 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 1f34ffa96219..8cff17b5f891 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -2189,59 +2189,19 @@ intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
/**
* intel_bios_is_lspcon_present - if LSPCON is attached on %port
- * @dev_priv: i915 device instance
+ * @i915: i915 device instance
* @port: port to check
*
* Return true if LSPCON is present on this port
*/
bool
-intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
- enum port port)
+intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
+ enum port port)
{
- const struct child_device_config *child;
- int i;
-
- if (!HAS_LSPCON(dev_priv))
- return false;
-
- for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
- child = dev_priv->vbt.child_dev + i;
-
- if (!child->lspcon)
- continue;
-
- switch (child->dvo_port) {
- case DVO_PORT_DPA:
- case DVO_PORT_HDMIA:
- if (port == PORT_A)
- return true;
- break;
- case DVO_PORT_DPB:
- case DVO_PORT_HDMIB:
- if (port == PORT_B)
- return true;
- break;
- case DVO_PORT_DPC:
- case DVO_PORT_HDMIC:
- if (port == PORT_C)
- return true;
- break;
- case DVO_PORT_DPD:
- case DVO_PORT_HDMID:
- if (port == PORT_D)
- return true;
- break;
- case DVO_PORT_DPF:
- case DVO_PORT_HDMIF:
- if (port == PORT_F)
- return true;
- break;
- default:
- break;
- }
- }
+ const struct child_device_config *child =
+ i915->vbt.ddi_port_info[port].child;
- return false;
+ return HAS_LSPCON(i915) && child && child->lspcon;
}
enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 55fb0818926c..4e42cfaf61a7 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -237,7 +237,7 @@ bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum por
bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, enum port *port);
bool intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
enum port port);
-bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
+bool intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
enum port port);
enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, enum port port);
--
2.20.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 06/13] drm/i915/bios: clean up VBT port info debug logging
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (4 preceding siblings ...)
2019-05-31 13:14 ` [PATCH 05/13] drm/i915/bios: use port info child pointer to determine LSPCON presence Jani Nikula
@ 2019-05-31 13:14 ` Jani Nikula
2019-05-31 13:14 ` [PATCH 07/13] drm/i915/bios: remove unused, obsolete VBT definitions Jani Nikula
` (8 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:14 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Change the order, add some stylistic touches, and add LSPCON.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 8cff17b5f891..81ca94498178 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1445,8 +1445,9 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
if (bdb_version >= 209)
info->supports_tbt = child->tbt;
- DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d TCUSB:%d TBT:%d\n",
- port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt,
+ DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d\n",
+ port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
+ HAS_LSPCON(dev_priv) && child->lspcon,
info->supports_typec_usb, info->supports_tbt);
if (is_edp && is_dvi)
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 07/13] drm/i915/bios: remove unused, obsolete VBT definitions
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (5 preceding siblings ...)
2019-05-31 13:14 ` [PATCH 06/13] drm/i915/bios: clean up VBT port info debug logging Jani Nikula
@ 2019-05-31 13:14 ` Jani Nikula
2019-05-31 13:14 ` [PATCH 08/13] drm/i915/bios: reserve struct bdb_ prefix for BDB blocks Jani Nikula
` (7 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:14 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
We've carried this baggage for more than a decade. Time to let it go.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_vbt_defs.h | 180 --------------------------
1 file changed, 180 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index fdbbb9a53804..3f870ac48840 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -75,25 +75,6 @@ struct bdb_header {
u16 bdb_size;
} __packed;
-/* strictly speaking, this is a "skip" block, but it has interesting info */
-struct vbios_data {
- u8 type; /* 0 == desktop, 1 == mobile */
- u8 relstage;
- u8 chipset;
- u8 lvds_present:1;
- u8 tv_present:1;
- u8 rsvd2:6; /* finish byte */
- u8 rsvd3[4];
- u8 signon[155];
- u8 copyright[61];
- u16 code_segment;
- u8 dos_boot_mode;
- u8 bandwidth_percent;
- u8 rsvd4; /* popup memory size */
- u8 resize_pci_bios;
- u8 rsvd5; /* is crt already on ddc2 */
-} __packed;
-
/*
* There are several types of BIOS data blocks (BDBs), each block has
* an ID and size in the first 3 bytes (ID in first, size in next 2).
@@ -601,35 +582,6 @@ struct bdb_lfp_backlight_data {
struct bdb_lfp_backlight_control_method backlight_control[16];
} __packed;
-struct aimdb_header {
- char signature[16];
- char oem_device[20];
- u16 aimdb_version;
- u16 aimdb_header_size;
- u16 aimdb_size;
-} __packed;
-
-struct aimdb_block {
- u8 aimdb_id;
- u16 aimdb_size;
-} __packed;
-
-struct vch_panel_data {
- u16 fp_timing_offset;
- u8 fp_timing_size;
- u16 dvo_timing_offset;
- u8 dvo_timing_size;
- u16 text_fitting_offset;
- u8 text_fitting_size;
- u16 graphics_fitting_offset;
- u8 graphics_fitting_size;
-} __packed;
-
-struct vch_bdb_22 {
- struct aimdb_block aimdb_block;
- struct vch_panel_data panels[16];
-} __packed;
-
struct bdb_sdvo_lvds_options {
u8 panel_backlight;
u8 h40_set_panel_type;
@@ -781,127 +733,6 @@ struct bdb_psr {
struct psr_table psr_table[16];
} __packed;
-/*
- * Driver<->VBIOS interaction occurs through scratch bits in
- * GR18 & SWF*.
- */
-
-/* GR18 bits are set on display switch and hotkey events */
-#define GR18_DRIVER_SWITCH_EN (1<<7) /* 0: VBIOS control, 1: driver control */
-#define GR18_HOTKEY_MASK 0x78 /* See also SWF4 15:0 */
-#define GR18_HK_NONE (0x0<<3)
-#define GR18_HK_LFP_STRETCH (0x1<<3)
-#define GR18_HK_TOGGLE_DISP (0x2<<3)
-#define GR18_HK_DISP_SWITCH (0x4<<3) /* see SWF14 15:0 for what to enable */
-#define GR18_HK_POPUP_DISABLED (0x6<<3)
-#define GR18_HK_POPUP_ENABLED (0x7<<3)
-#define GR18_HK_PFIT (0x8<<3)
-#define GR18_HK_APM_CHANGE (0xa<<3)
-#define GR18_HK_MULTIPLE (0xc<<3)
-#define GR18_USER_INT_EN (1<<2)
-#define GR18_A0000_FLUSH_EN (1<<1)
-#define GR18_SMM_EN (1<<0)
-
-/* Set by driver, cleared by VBIOS */
-#define SWF00_YRES_SHIFT 16
-#define SWF00_XRES_SHIFT 0
-#define SWF00_RES_MASK 0xffff
-
-/* Set by VBIOS at boot time and driver at runtime */
-#define SWF01_TV2_FORMAT_SHIFT 8
-#define SWF01_TV1_FORMAT_SHIFT 0
-#define SWF01_TV_FORMAT_MASK 0xffff
-
-#define SWF10_VBIOS_BLC_I2C_EN (1<<29)
-#define SWF10_GTT_OVERRIDE_EN (1<<28)
-#define SWF10_LFP_DPMS_OVR (1<<27) /* override DPMS on display switch */
-#define SWF10_ACTIVE_TOGGLE_LIST_MASK (7<<24)
-#define SWF10_OLD_TOGGLE 0x0
-#define SWF10_TOGGLE_LIST_1 0x1
-#define SWF10_TOGGLE_LIST_2 0x2
-#define SWF10_TOGGLE_LIST_3 0x3
-#define SWF10_TOGGLE_LIST_4 0x4
-#define SWF10_PANNING_EN (1<<23)
-#define SWF10_DRIVER_LOADED (1<<22)
-#define SWF10_EXTENDED_DESKTOP (1<<21)
-#define SWF10_EXCLUSIVE_MODE (1<<20)
-#define SWF10_OVERLAY_EN (1<<19)
-#define SWF10_PLANEB_HOLDOFF (1<<18)
-#define SWF10_PLANEA_HOLDOFF (1<<17)
-#define SWF10_VGA_HOLDOFF (1<<16)
-#define SWF10_ACTIVE_DISP_MASK 0xffff
-#define SWF10_PIPEB_LFP2 (1<<15)
-#define SWF10_PIPEB_EFP2 (1<<14)
-#define SWF10_PIPEB_TV2 (1<<13)
-#define SWF10_PIPEB_CRT2 (1<<12)
-#define SWF10_PIPEB_LFP (1<<11)
-#define SWF10_PIPEB_EFP (1<<10)
-#define SWF10_PIPEB_TV (1<<9)
-#define SWF10_PIPEB_CRT (1<<8)
-#define SWF10_PIPEA_LFP2 (1<<7)
-#define SWF10_PIPEA_EFP2 (1<<6)
-#define SWF10_PIPEA_TV2 (1<<5)
-#define SWF10_PIPEA_CRT2 (1<<4)
-#define SWF10_PIPEA_LFP (1<<3)
-#define SWF10_PIPEA_EFP (1<<2)
-#define SWF10_PIPEA_TV (1<<1)
-#define SWF10_PIPEA_CRT (1<<0)
-
-#define SWF11_MEMORY_SIZE_SHIFT 16
-#define SWF11_SV_TEST_EN (1<<15)
-#define SWF11_IS_AGP (1<<14)
-#define SWF11_DISPLAY_HOLDOFF (1<<13)
-#define SWF11_DPMS_REDUCED (1<<12)
-#define SWF11_IS_VBE_MODE (1<<11)
-#define SWF11_PIPEB_ACCESS (1<<10) /* 0 here means pipe a */
-#define SWF11_DPMS_MASK 0x07
-#define SWF11_DPMS_OFF (1<<2)
-#define SWF11_DPMS_SUSPEND (1<<1)
-#define SWF11_DPMS_STANDBY (1<<0)
-#define SWF11_DPMS_ON 0
-
-#define SWF14_GFX_PFIT_EN (1<<31)
-#define SWF14_TEXT_PFIT_EN (1<<30)
-#define SWF14_LID_STATUS_CLOSED (1<<29) /* 0 here means open */
-#define SWF14_POPUP_EN (1<<28)
-#define SWF14_DISPLAY_HOLDOFF (1<<27)
-#define SWF14_DISP_DETECT_EN (1<<26)
-#define SWF14_DOCKING_STATUS_DOCKED (1<<25) /* 0 here means undocked */
-#define SWF14_DRIVER_STATUS (1<<24)
-#define SWF14_OS_TYPE_WIN9X (1<<23)
-#define SWF14_OS_TYPE_WINNT (1<<22)
-/* 21:19 rsvd */
-#define SWF14_PM_TYPE_MASK 0x00070000
-#define SWF14_PM_ACPI_VIDEO (0x4 << 16)
-#define SWF14_PM_ACPI (0x3 << 16)
-#define SWF14_PM_APM_12 (0x2 << 16)
-#define SWF14_PM_APM_11 (0x1 << 16)
-#define SWF14_HK_REQUEST_MASK 0x0000ffff /* see GR18 6:3 for event type */
- /* if GR18 indicates a display switch */
-#define SWF14_DS_PIPEB_LFP2_EN (1<<15)
-#define SWF14_DS_PIPEB_EFP2_EN (1<<14)
-#define SWF14_DS_PIPEB_TV2_EN (1<<13)
-#define SWF14_DS_PIPEB_CRT2_EN (1<<12)
-#define SWF14_DS_PIPEB_LFP_EN (1<<11)
-#define SWF14_DS_PIPEB_EFP_EN (1<<10)
-#define SWF14_DS_PIPEB_TV_EN (1<<9)
-#define SWF14_DS_PIPEB_CRT_EN (1<<8)
-#define SWF14_DS_PIPEA_LFP2_EN (1<<7)
-#define SWF14_DS_PIPEA_EFP2_EN (1<<6)
-#define SWF14_DS_PIPEA_TV2_EN (1<<5)
-#define SWF14_DS_PIPEA_CRT2_EN (1<<4)
-#define SWF14_DS_PIPEA_LFP_EN (1<<3)
-#define SWF14_DS_PIPEA_EFP_EN (1<<2)
-#define SWF14_DS_PIPEA_TV_EN (1<<1)
-#define SWF14_DS_PIPEA_CRT_EN (1<<0)
- /* if GR18 indicates a panel fitting request */
-#define SWF14_PFIT_EN (1<<0) /* 0 means disable */
- /* if GR18 indicates an APM change request */
-#define SWF14_APM_HIBERNATE 0x4
-#define SWF14_APM_SUSPEND 0x3
-#define SWF14_APM_STANDBY 0x1
-#define SWF14_APM_RESTORE 0x0
-
/* Block 52 contains MIPI configuration block
* 6 * bdb_mipi_config, followed by 6 pps data block
* block below
@@ -922,15 +753,4 @@ struct bdb_mipi_sequence {
u8 data[0];
} __packed;
-enum mipi_gpio_pin_index {
- MIPI_GPIO_UNDEFINED = 0,
- MIPI_GPIO_PANEL_ENABLE,
- MIPI_GPIO_BL_ENABLE,
- MIPI_GPIO_PWM_ENABLE,
- MIPI_GPIO_RESET_N,
- MIPI_GPIO_PWR_DOWN_R,
- MIPI_GPIO_STDBY_RST_N,
- MIPI_GPIO_MAX
-};
-
#endif /* _INTEL_VBT_DEFS_H_ */
--
2.20.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 08/13] drm/i915/bios: reserve struct bdb_ prefix for BDB blocks
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (6 preceding siblings ...)
2019-05-31 13:14 ` [PATCH 07/13] drm/i915/bios: remove unused, obsolete VBT definitions Jani Nikula
@ 2019-05-31 13:14 ` Jani Nikula
2019-05-31 13:14 ` [PATCH 09/13] drm/i915/bios: add BDB block comments before definitions Jani Nikula
` (6 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:14 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Don't use bdb_ prefixes for structs within blocks. Add a new bdb struct
for SDVO panel DTDs for completeness.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 12 ++++++------
drivers/gpu/drm/i915/intel_vbt_defs.h | 20 ++++++++++++--------
2 files changed, 18 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 81ca94498178..b5aedb605c05 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -302,7 +302,7 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv,
const struct bdb_header *bdb)
{
const struct bdb_lfp_backlight_data *backlight_data;
- const struct bdb_lfp_backlight_data_entry *entry;
+ const struct lfp_backlight_data_entry *entry;
int panel_type = dev_priv->vbt.panel_type;
backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
@@ -327,7 +327,7 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv,
dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
if (bdb->version >= 191 &&
get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
- const struct bdb_lfp_backlight_control_method *method;
+ const struct lfp_backlight_control_method *method;
method = &backlight_data->backlight_control[panel_type];
dev_priv->vbt.backlight.type = method->type;
@@ -351,7 +351,7 @@ static void
parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
const struct bdb_header *bdb)
{
- const struct lvds_dvo_timing *dvo_timing;
+ const struct bdb_sdvo_panel_dtds *dtds;
struct drm_display_mode *panel_fixed_mode;
int index;
@@ -371,15 +371,15 @@ parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
index = sdvo_lvds_options->panel_type;
}
- dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
- if (!dvo_timing)
+ dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
+ if (!dtds)
return;
panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
if (!panel_fixed_mode)
return;
- fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
+ fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 3f870ac48840..0566c52b058a 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -477,7 +477,7 @@ struct bdb_lvds_options {
} __packed;
/* LFP pointer table contains entries to the struct below */
-struct bdb_lvds_lfp_data_ptr {
+struct lvds_lfp_data_ptr {
u16 fp_timing_offset; /* offsets are from start of bdb */
u8 fp_table_size;
u16 dvo_timing_offset;
@@ -488,7 +488,7 @@ struct bdb_lvds_lfp_data_ptr {
struct bdb_lvds_lfp_data_ptrs {
u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
- struct bdb_lvds_lfp_data_ptr ptr[16];
+ struct lvds_lfp_data_ptr ptr[16];
} __packed;
/* LFP data has 3 blocks per entry */
@@ -547,20 +547,24 @@ struct lvds_pnp_id {
u8 mfg_year;
} __packed;
-struct bdb_lvds_lfp_data_entry {
+struct lvds_lfp_data_entry {
struct lvds_fp_timing fp_timing;
struct lvds_dvo_timing dvo_timing;
struct lvds_pnp_id pnp_id;
} __packed;
struct bdb_lvds_lfp_data {
- struct bdb_lvds_lfp_data_entry data[16];
+ struct lvds_lfp_data_entry data[16];
+} __packed;
+
+struct bdb_sdvo_panel_dtds {
+ struct lvds_dvo_timing dtds[4];
} __packed;
#define BDB_BACKLIGHT_TYPE_NONE 0
#define BDB_BACKLIGHT_TYPE_PWM 2
-struct bdb_lfp_backlight_data_entry {
+struct lfp_backlight_data_entry {
u8 type:2;
u8 active_low_pwm:1;
u8 obsolete1:5;
@@ -570,16 +574,16 @@ struct bdb_lfp_backlight_data_entry {
u8 obsolete3;
} __packed;
-struct bdb_lfp_backlight_control_method {
+struct lfp_backlight_control_method {
u8 type:4;
u8 controller:4;
} __packed;
struct bdb_lfp_backlight_data {
u8 entry_size;
- struct bdb_lfp_backlight_data_entry data[16];
+ struct lfp_backlight_data_entry data[16];
u8 level[16];
- struct bdb_lfp_backlight_control_method backlight_control[16];
+ struct lfp_backlight_control_method backlight_control[16];
} __packed;
struct bdb_sdvo_lvds_options {
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 09/13] drm/i915/bios: add BDB block comments before definitions
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (7 preceding siblings ...)
2019-05-31 13:14 ` [PATCH 08/13] drm/i915/bios: reserve struct bdb_ prefix for BDB blocks Jani Nikula
@ 2019-05-31 13:14 ` Jani Nikula
2019-05-31 13:15 ` [PATCH 10/13] drm/i915/bios: sort BDB block definitions using block ID Jani Nikula
` (5 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:14 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Use the comments verbatim from the spec to help find the right block. No
functional changes.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_vbt_defs.h | 57 +++++++++++++++++++++++----
1 file changed, 50 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 0566c52b058a..7dbe8369baf9 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -116,6 +116,10 @@ struct bdb_header {
#define BDB_MIPI_SEQUENCE 53
#define BDB_SKIP 254 /* VBIOS private block, ignore */
+/*
+ * Block 1 - General Bit Definitions
+ */
+
struct bdb_general_features {
/* bits 1 */
u8 panel_fitting:2;
@@ -157,6 +161,10 @@ struct bdb_general_features {
u8 rsvd11:2; /* finish byte */
} __packed;
+/*
+ * Block 2 - General Bytes Definition
+ */
+
/* pre-915 */
#define GPIO_PIN_DVI_LVDS 0x03 /* "DVI/LVDS DDC GPIO pins" */
#define GPIO_PIN_ADD_I2C 0x05 /* "ADDCARD I2C GPIO pins" */
@@ -447,6 +455,10 @@ struct bdb_general_definitions {
u8 devices[0];
} __packed;
+/*
+ * Block 40 - LFP Data Block
+ */
+
/* Mask for DRRS / Panel Channel / SSC / BLT control bits extraction */
#define MODE_MASK 0x3
@@ -476,6 +488,10 @@ struct bdb_lvds_options {
u32 blt_control_type_bits;
} __packed;
+/*
+ * Block 41 - LFP Data Table Pointers
+ */
+
/* LFP pointer table contains entries to the struct below */
struct lvds_lfp_data_ptr {
u16 fp_timing_offset; /* offsets are from start of bdb */
@@ -491,6 +507,10 @@ struct bdb_lvds_lfp_data_ptrs {
struct lvds_lfp_data_ptr ptr[16];
} __packed;
+/*
+ * Block 42 - LFP Data Tables
+ */
+
/* LFP data has 3 blocks per entry */
struct lvds_fp_timing {
u16 x_res;
@@ -557,10 +577,18 @@ struct bdb_lvds_lfp_data {
struct lvds_lfp_data_entry data[16];
} __packed;
+/*
+ * Block 23 - SDVO LVDS Panel DTDs
+ */
+
struct bdb_sdvo_panel_dtds {
struct lvds_dvo_timing dtds[4];
} __packed;
+/*
+ * Block 43 - LFP Backlight Control Data Block
+ */
+
#define BDB_BACKLIGHT_TYPE_NONE 0
#define BDB_BACKLIGHT_TYPE_PWM 2
@@ -586,6 +614,10 @@ struct bdb_lfp_backlight_data {
struct lfp_backlight_control_method backlight_control[16];
} __packed;
+/*
+ * Block 22 - SDVO LVDS General Options
+ */
+
struct bdb_sdvo_lvds_options {
u8 panel_backlight;
u8 h40_set_panel_type;
@@ -602,6 +634,9 @@ struct bdb_sdvo_lvds_options {
u8 panel_misc_bits_4;
} __packed;
+/*
+ * Block 12 - Driver Features Data Block
+ */
#define BDB_DRIVER_FEATURE_NO_LVDS 0
#define BDB_DRIVER_FEATURE_INT_LVDS 1
@@ -662,6 +697,10 @@ struct bdb_driver_features {
u16 pc_feature_valid:1;
} __packed;
+/*
+ * Block 27 - eDP VBT Block
+ */
+
#define EDP_18BPP 0
#define EDP_24BPP 1
#define EDP_30BPP 2
@@ -714,6 +753,10 @@ struct bdb_edp {
struct edp_full_link_params full_link_params[16]; /* 199 */
} __packed;
+/*
+ * Block 9 - SRD Feature Block
+ */
+
struct psr_table {
/* Feature bits */
u8 full_link:1;
@@ -737,10 +780,10 @@ struct bdb_psr {
struct psr_table psr_table[16];
} __packed;
-/* Block 52 contains MIPI configuration block
- * 6 * bdb_mipi_config, followed by 6 pps data block
- * block below
+/*
+ * Block 52 - MIPI Configuration Block
*/
+
#define MAX_MIPI_CONFIGURATIONS 6
struct bdb_mipi_config {
@@ -748,13 +791,13 @@ struct bdb_mipi_config {
struct mipi_pps_data pps[MAX_MIPI_CONFIGURATIONS];
} __packed;
-/* Block 53 contains MIPI sequences as needed by the panel
- * for enabling it. This block can be variable in size and
- * can be maximum of 6 blocks
+/*
+ * Block 53 - MIPI Sequence Block
*/
+
struct bdb_mipi_sequence {
u8 version;
- u8 data[0];
+ u8 data[0]; /* up to 6 variable length blocks */
} __packed;
#endif /* _INTEL_VBT_DEFS_H_ */
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 10/13] drm/i915/bios: sort BDB block definitions using block ID
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (8 preceding siblings ...)
2019-05-31 13:14 ` [PATCH 09/13] drm/i915/bios: add BDB block comments before definitions Jani Nikula
@ 2019-05-31 13:15 ` Jani Nikula
2019-05-31 13:15 ` [PATCH 11/13] drm/i915/bios: add VBT swing bit to child device definition Jani Nikula
` (4 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:15 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Make it easier to find the right blocks. No functional changes.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_vbt_defs.h | 372 +++++++++++++-------------
1 file changed, 186 insertions(+), 186 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 7dbe8369baf9..608fa4135262 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -456,182 +456,30 @@ struct bdb_general_definitions {
} __packed;
/*
- * Block 40 - LFP Data Block
- */
-
-/* Mask for DRRS / Panel Channel / SSC / BLT control bits extraction */
-#define MODE_MASK 0x3
-
-struct bdb_lvds_options {
- u8 panel_type;
- u8 rsvd1;
- /* LVDS capabilities, stored in a dword */
- u8 pfit_mode:2;
- u8 pfit_text_mode_enhanced:1;
- u8 pfit_gfx_mode_enhanced:1;
- u8 pfit_ratio_auto:1;
- u8 pixel_dither:1;
- u8 lvds_edid:1;
- u8 rsvd2:1;
- u8 rsvd4;
- /* LVDS Panel channel bits stored here */
- u32 lvds_panel_channel_bits;
- /* LVDS SSC (Spread Spectrum Clock) bits stored here. */
- u16 ssc_bits;
- u16 ssc_freq;
- u16 ssc_ddt;
- /* Panel color depth defined here */
- u16 panel_color_depth;
- /* LVDS panel type bits stored here */
- u32 dps_panel_type_bits;
- /* LVDS backlight control type bits stored here */
- u32 blt_control_type_bits;
-} __packed;
-
-/*
- * Block 41 - LFP Data Table Pointers
- */
-
-/* LFP pointer table contains entries to the struct below */
-struct lvds_lfp_data_ptr {
- u16 fp_timing_offset; /* offsets are from start of bdb */
- u8 fp_table_size;
- u16 dvo_timing_offset;
- u8 dvo_table_size;
- u16 panel_pnp_id_offset;
- u8 pnp_table_size;
-} __packed;
-
-struct bdb_lvds_lfp_data_ptrs {
- u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
- struct lvds_lfp_data_ptr ptr[16];
-} __packed;
-
-/*
- * Block 42 - LFP Data Tables
- */
-
-/* LFP data has 3 blocks per entry */
-struct lvds_fp_timing {
- u16 x_res;
- u16 y_res;
- u32 lvds_reg;
- u32 lvds_reg_val;
- u32 pp_on_reg;
- u32 pp_on_reg_val;
- u32 pp_off_reg;
- u32 pp_off_reg_val;
- u32 pp_cycle_reg;
- u32 pp_cycle_reg_val;
- u32 pfit_reg;
- u32 pfit_reg_val;
- u16 terminator;
-} __packed;
-
-struct lvds_dvo_timing {
- u16 clock; /**< In 10khz */
- u8 hactive_lo;
- u8 hblank_lo;
- u8 hblank_hi:4;
- u8 hactive_hi:4;
- u8 vactive_lo;
- u8 vblank_lo;
- u8 vblank_hi:4;
- u8 vactive_hi:4;
- u8 hsync_off_lo;
- u8 hsync_pulse_width_lo;
- u8 vsync_pulse_width_lo:4;
- u8 vsync_off_lo:4;
- u8 vsync_pulse_width_hi:2;
- u8 vsync_off_hi:2;
- u8 hsync_pulse_width_hi:2;
- u8 hsync_off_hi:2;
- u8 himage_lo;
- u8 vimage_lo;
- u8 vimage_hi:4;
- u8 himage_hi:4;
- u8 h_border;
- u8 v_border;
- u8 rsvd1:3;
- u8 digital:2;
- u8 vsync_positive:1;
- u8 hsync_positive:1;
- u8 non_interlaced:1;
-} __packed;
-
-struct lvds_pnp_id {
- u16 mfg_name;
- u16 product_code;
- u32 serial;
- u8 mfg_week;
- u8 mfg_year;
-} __packed;
-
-struct lvds_lfp_data_entry {
- struct lvds_fp_timing fp_timing;
- struct lvds_dvo_timing dvo_timing;
- struct lvds_pnp_id pnp_id;
-} __packed;
-
-struct bdb_lvds_lfp_data {
- struct lvds_lfp_data_entry data[16];
-} __packed;
-
-/*
- * Block 23 - SDVO LVDS Panel DTDs
- */
-
-struct bdb_sdvo_panel_dtds {
- struct lvds_dvo_timing dtds[4];
-} __packed;
-
-/*
- * Block 43 - LFP Backlight Control Data Block
+ * Block 9 - SRD Feature Block
*/
-#define BDB_BACKLIGHT_TYPE_NONE 0
-#define BDB_BACKLIGHT_TYPE_PWM 2
+struct psr_table {
+ /* Feature bits */
+ u8 full_link:1;
+ u8 require_aux_to_wakeup:1;
+ u8 feature_bits_rsvd:6;
-struct lfp_backlight_data_entry {
- u8 type:2;
- u8 active_low_pwm:1;
- u8 obsolete1:5;
- u16 pwm_freq_hz;
- u8 min_brightness;
- u8 obsolete2;
- u8 obsolete3;
-} __packed;
+ /* Wait times */
+ u8 idle_frames:4;
+ u8 lines_to_wait:3;
+ u8 wait_times_rsvd:1;
-struct lfp_backlight_control_method {
- u8 type:4;
- u8 controller:4;
-} __packed;
+ /* TP wake up time in multiple of 100 */
+ u16 tp1_wakeup_time;
+ u16 tp2_tp3_wakeup_time;
-struct bdb_lfp_backlight_data {
- u8 entry_size;
- struct lfp_backlight_data_entry data[16];
- u8 level[16];
- struct lfp_backlight_control_method backlight_control[16];
+ /* PSR2 TP2/TP3 wakeup time for 16 panels */
+ u32 psr2_tp2_tp3_wakeup_time;
} __packed;
-/*
- * Block 22 - SDVO LVDS General Options
- */
-
-struct bdb_sdvo_lvds_options {
- u8 panel_backlight;
- u8 h40_set_panel_type;
- u8 panel_type;
- u8 ssc_clk_freq;
- u16 als_low_trip;
- u16 als_high_trip;
- u8 sclalarcoeff_tab_row_num;
- u8 sclalarcoeff_tab_row_size;
- u8 coefficient[8];
- u8 panel_misc_bits_1;
- u8 panel_misc_bits_2;
- u8 panel_misc_bits_3;
- u8 panel_misc_bits_4;
+struct bdb_psr {
+ struct psr_table psr_table[16];
} __packed;
/*
@@ -697,6 +545,65 @@ struct bdb_driver_features {
u16 pc_feature_valid:1;
} __packed;
+/*
+ * Block 22 - SDVO LVDS General Options
+ */
+
+struct bdb_sdvo_lvds_options {
+ u8 panel_backlight;
+ u8 h40_set_panel_type;
+ u8 panel_type;
+ u8 ssc_clk_freq;
+ u16 als_low_trip;
+ u16 als_high_trip;
+ u8 sclalarcoeff_tab_row_num;
+ u8 sclalarcoeff_tab_row_size;
+ u8 coefficient[8];
+ u8 panel_misc_bits_1;
+ u8 panel_misc_bits_2;
+ u8 panel_misc_bits_3;
+ u8 panel_misc_bits_4;
+} __packed;
+
+/*
+ * Block 23 - SDVO LVDS Panel DTDs
+ */
+
+struct lvds_dvo_timing {
+ u16 clock; /**< In 10khz */
+ u8 hactive_lo;
+ u8 hblank_lo;
+ u8 hblank_hi:4;
+ u8 hactive_hi:4;
+ u8 vactive_lo;
+ u8 vblank_lo;
+ u8 vblank_hi:4;
+ u8 vactive_hi:4;
+ u8 hsync_off_lo;
+ u8 hsync_pulse_width_lo;
+ u8 vsync_pulse_width_lo:4;
+ u8 vsync_off_lo:4;
+ u8 vsync_pulse_width_hi:2;
+ u8 vsync_off_hi:2;
+ u8 hsync_pulse_width_hi:2;
+ u8 hsync_off_hi:2;
+ u8 himage_lo;
+ u8 vimage_lo;
+ u8 vimage_hi:4;
+ u8 himage_hi:4;
+ u8 h_border;
+ u8 v_border;
+ u8 rsvd1:3;
+ u8 digital:2;
+ u8 vsync_positive:1;
+ u8 hsync_positive:1;
+ u8 non_interlaced:1;
+} __packed;
+
+struct bdb_sdvo_panel_dtds {
+ struct lvds_dvo_timing dtds[4];
+} __packed;
+
/*
* Block 27 - eDP VBT Block
*/
@@ -754,30 +661,123 @@ struct bdb_edp {
} __packed;
/*
- * Block 9 - SRD Feature Block
+ * Block 40 - LFP Data Block
*/
-struct psr_table {
- /* Feature bits */
- u8 full_link:1;
- u8 require_aux_to_wakeup:1;
- u8 feature_bits_rsvd:6;
+/* Mask for DRRS / Panel Channel / SSC / BLT control bits extraction */
+#define MODE_MASK 0x3
- /* Wait times */
- u8 idle_frames:4;
- u8 lines_to_wait:3;
- u8 wait_times_rsvd:1;
+struct bdb_lvds_options {
+ u8 panel_type;
+ u8 rsvd1;
+ /* LVDS capabilities, stored in a dword */
+ u8 pfit_mode:2;
+ u8 pfit_text_mode_enhanced:1;
+ u8 pfit_gfx_mode_enhanced:1;
+ u8 pfit_ratio_auto:1;
+ u8 pixel_dither:1;
+ u8 lvds_edid:1;
+ u8 rsvd2:1;
+ u8 rsvd4;
+ /* LVDS Panel channel bits stored here */
+ u32 lvds_panel_channel_bits;
+ /* LVDS SSC (Spread Spectrum Clock) bits stored here. */
+ u16 ssc_bits;
+ u16 ssc_freq;
+ u16 ssc_ddt;
+ /* Panel color depth defined here */
+ u16 panel_color_depth;
+ /* LVDS panel type bits stored here */
+ u32 dps_panel_type_bits;
+ /* LVDS backlight control type bits stored here */
+ u32 blt_control_type_bits;
+} __packed;
- /* TP wake up time in multiple of 100 */
- u16 tp1_wakeup_time;
- u16 tp2_tp3_wakeup_time;
+/*
+ * Block 41 - LFP Data Table Pointers
+ */
- /* PSR2 TP2/TP3 wakeup time for 16 panels */
- u32 psr2_tp2_tp3_wakeup_time;
+/* LFP pointer table contains entries to the struct below */
+struct lvds_lfp_data_ptr {
+ u16 fp_timing_offset; /* offsets are from start of bdb */
+ u8 fp_table_size;
+ u16 dvo_timing_offset;
+ u8 dvo_table_size;
+ u16 panel_pnp_id_offset;
+ u8 pnp_table_size;
} __packed;
-struct bdb_psr {
- struct psr_table psr_table[16];
+struct bdb_lvds_lfp_data_ptrs {
+ u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
+ struct lvds_lfp_data_ptr ptr[16];
+} __packed;
+
+/*
+ * Block 42 - LFP Data Tables
+ */
+
+/* LFP data has 3 blocks per entry */
+struct lvds_fp_timing {
+ u16 x_res;
+ u16 y_res;
+ u32 lvds_reg;
+ u32 lvds_reg_val;
+ u32 pp_on_reg;
+ u32 pp_on_reg_val;
+ u32 pp_off_reg;
+ u32 pp_off_reg_val;
+ u32 pp_cycle_reg;
+ u32 pp_cycle_reg_val;
+ u32 pfit_reg;
+ u32 pfit_reg_val;
+ u16 terminator;
+} __packed;
+
+struct lvds_pnp_id {
+ u16 mfg_name;
+ u16 product_code;
+ u32 serial;
+ u8 mfg_week;
+ u8 mfg_year;
+} __packed;
+
+struct lvds_lfp_data_entry {
+ struct lvds_fp_timing fp_timing;
+ struct lvds_dvo_timing dvo_timing;
+ struct lvds_pnp_id pnp_id;
+} __packed;
+
+struct bdb_lvds_lfp_data {
+ struct lvds_lfp_data_entry data[16];
+} __packed;
+
+/*
+ * Block 43 - LFP Backlight Control Data Block
+ */
+
+#define BDB_BACKLIGHT_TYPE_NONE 0
+#define BDB_BACKLIGHT_TYPE_PWM 2
+
+struct lfp_backlight_data_entry {
+ u8 type:2;
+ u8 active_low_pwm:1;
+ u8 obsolete1:5;
+ u16 pwm_freq_hz;
+ u8 min_brightness;
+ u8 obsolete2;
+ u8 obsolete3;
+} __packed;
+
+struct lfp_backlight_control_method {
+ u8 type:4;
+ u8 controller:4;
+} __packed;
+
+struct bdb_lfp_backlight_data {
+ u8 entry_size;
+ struct lfp_backlight_data_entry data[16];
+ u8 level[16];
+ struct lfp_backlight_control_method backlight_control[16];
} __packed;
/*
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 11/13] drm/i915/bios: add VBT swing bit to child device definition
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (9 preceding siblings ...)
2019-05-31 13:15 ` [PATCH 10/13] drm/i915/bios: sort BDB block definitions using block ID Jani Nikula
@ 2019-05-31 13:15 ` Jani Nikula
2019-05-31 13:15 ` [PATCH 12/13] drm/i915/bios: add more LFP options Jani Nikula
` (3 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:15 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
New bit to look in another BDB block for more. No functional changes.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_vbt_defs.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 608fa4135262..ea1697ab00d2 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -391,7 +391,8 @@ struct child_device_config {
u8 lspcon:1; /* 192 */
u8 iboost:1; /* 196 */
u8 hpd_invert:1; /* 196 */
- u8 flag_reserved:3;
+ u8 use_vbt_vswing:1; /* 218 */
+ u8 flag_reserved:2;
u8 hdmi_support:1; /* 158 */
u8 dp_support:1; /* 158 */
u8 tmds_support:1; /* 158 */
--
2.20.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 12/13] drm/i915/bios: add more LFP options
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (10 preceding siblings ...)
2019-05-31 13:15 ` [PATCH 11/13] drm/i915/bios: add VBT swing bit to child device definition Jani Nikula
@ 2019-05-31 13:15 ` Jani Nikula
2019-05-31 13:15 ` [PATCH 13/13] drm/i915/bios: add an enum for BDB block IDs Jani Nikula
` (2 subsequent siblings)
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:15 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Add new fields in the LFP block. No functional changes.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_vbt_defs.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index ea1697ab00d2..6d46ca4bf8c4 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -670,7 +670,7 @@ struct bdb_edp {
struct bdb_lvds_options {
u8 panel_type;
- u8 rsvd1;
+ u8 panel_type2; /* 212 */
/* LVDS capabilities, stored in a dword */
u8 pfit_mode:2;
u8 pfit_text_mode_enhanced:1;
@@ -692,6 +692,9 @@ struct bdb_lvds_options {
u32 dps_panel_type_bits;
/* LVDS backlight control type bits stored here */
u32 blt_control_type_bits;
+
+ u16 lcdvcc_s0_enable; /* 200 */
+ u32 rotation; /* 228 */
} __packed;
/*
--
2.20.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 13/13] drm/i915/bios: add an enum for BDB block IDs
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (11 preceding siblings ...)
2019-05-31 13:15 ` [PATCH 12/13] drm/i915/bios: add more LFP options Jani Nikula
@ 2019-05-31 13:15 ` Jani Nikula
2019-05-31 16:34 ` ✓ Fi.CI.BAT: success for drm/i915/bios: vbt cleanup Patchwork
2019-06-01 22:03 ` ✓ Fi.CI.IGT: " Patchwork
14 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2019-05-31 13:15 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Better grouping, better semantics for find_section(). No functional
changes.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 4 +-
drivers/gpu/drm/i915/intel_vbt_defs.h | 71 ++++++++++++++-------------
2 files changed, 38 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index b5aedb605c05..1c037dfa83f5 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -76,13 +76,13 @@ static u32 get_blocksize(const void *block_data)
}
static const void *
-find_section(const void *_bdb, int section_id)
+find_section(const void *_bdb, enum bdb_block_id section_id)
{
const struct bdb_header *bdb = _bdb;
const u8 *base = _bdb;
int index = 0;
u32 total, current_size;
- u8 current_id;
+ enum bdb_block_id current_id;
/* skip to first section */
index += bdb->header_size;
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 6d46ca4bf8c4..89ef14cafb6b 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -80,41 +80,42 @@ struct bdb_header {
* an ID and size in the first 3 bytes (ID in first, size in next 2).
* Known types are listed below.
*/
-#define BDB_GENERAL_FEATURES 1
-#define BDB_GENERAL_DEFINITIONS 2
-#define BDB_OLD_TOGGLE_LIST 3
-#define BDB_MODE_SUPPORT_LIST 4
-#define BDB_GENERIC_MODE_TABLE 5
-#define BDB_EXT_MMIO_REGS 6
-#define BDB_SWF_IO 7
-#define BDB_SWF_MMIO 8
-#define BDB_PSR 9
-#define BDB_MODE_REMOVAL_TABLE 10
-#define BDB_CHILD_DEVICE_TABLE 11
-#define BDB_DRIVER_FEATURES 12
-#define BDB_DRIVER_PERSISTENCE 13
-#define BDB_EXT_TABLE_PTRS 14
-#define BDB_DOT_CLOCK_OVERRIDE 15
-#define BDB_DISPLAY_SELECT 16
-/* 17 rsvd */
-#define BDB_DRIVER_ROTATION 18
-#define BDB_DISPLAY_REMOVE 19
-#define BDB_OEM_CUSTOM 20
-#define BDB_EFP_LIST 21 /* workarounds for VGA hsync/vsync */
-#define BDB_SDVO_LVDS_OPTIONS 22
-#define BDB_SDVO_PANEL_DTDS 23
-#define BDB_SDVO_LVDS_PNP_IDS 24
-#define BDB_SDVO_LVDS_POWER_SEQ 25
-#define BDB_TV_OPTIONS 26
-#define BDB_EDP 27
-#define BDB_LVDS_OPTIONS 40
-#define BDB_LVDS_LFP_DATA_PTRS 41
-#define BDB_LVDS_LFP_DATA 42
-#define BDB_LVDS_BACKLIGHT 43
-#define BDB_LVDS_POWER 44
-#define BDB_MIPI_CONFIG 52
-#define BDB_MIPI_SEQUENCE 53
-#define BDB_SKIP 254 /* VBIOS private block, ignore */
+enum bdb_block_id {
+ BDB_GENERAL_FEATURES = 1,
+ BDB_GENERAL_DEFINITIONS = 2,
+ BDB_OLD_TOGGLE_LIST = 3,
+ BDB_MODE_SUPPORT_LIST = 4,
+ BDB_GENERIC_MODE_TABLE = 5,
+ BDB_EXT_MMIO_REGS = 6,
+ BDB_SWF_IO = 7,
+ BDB_SWF_MMIO = 8,
+ BDB_PSR = 9,
+ BDB_MODE_REMOVAL_TABLE = 10,
+ BDB_CHILD_DEVICE_TABLE = 11,
+ BDB_DRIVER_FEATURES = 12,
+ BDB_DRIVER_PERSISTENCE = 13,
+ BDB_EXT_TABLE_PTRS = 14,
+ BDB_DOT_CLOCK_OVERRIDE = 15,
+ BDB_DISPLAY_SELECT = 16,
+ BDB_DRIVER_ROTATION = 18,
+ BDB_DISPLAY_REMOVE = 19,
+ BDB_OEM_CUSTOM = 20,
+ BDB_EFP_LIST = 21, /* workarounds for VGA hsync/vsync */
+ BDB_SDVO_LVDS_OPTIONS = 22,
+ BDB_SDVO_PANEL_DTDS = 23,
+ BDB_SDVO_LVDS_PNP_IDS = 24,
+ BDB_SDVO_LVDS_POWER_SEQ = 25,
+ BDB_TV_OPTIONS = 26,
+ BDB_EDP = 27,
+ BDB_LVDS_OPTIONS = 40,
+ BDB_LVDS_LFP_DATA_PTRS = 41,
+ BDB_LVDS_LFP_DATA = 42,
+ BDB_LVDS_BACKLIGHT = 43,
+ BDB_LVDS_POWER = 44,
+ BDB_MIPI_CONFIG = 52,
+ BDB_MIPI_SEQUENCE = 53,
+ BDB_SKIP = 254, /* VBIOS private block, ignore */
+};
/*
* Block 1 - General Bit Definitions
--
2.20.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915/bios: vbt cleanup
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (12 preceding siblings ...)
2019-05-31 13:15 ` [PATCH 13/13] drm/i915/bios: add an enum for BDB block IDs Jani Nikula
@ 2019-05-31 16:34 ` Patchwork
2019-06-01 22:03 ` ✓ Fi.CI.IGT: " Patchwork
14 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-05-31 16:34 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/bios: vbt cleanup
URL : https://patchwork.freedesktop.org/series/61430/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6175 -> Patchwork_13146
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/
Known issues
------------
Here are the changes found in Patchwork_13146 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_evict:
- fi-bsw-kefka: [PASS][1] -> [DMESG-WARN][2] ([fdo#107709])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/fi-bsw-kefka/igt@i915_selftest@live_evict.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/fi-bsw-kefka/igt@i915_selftest@live_evict.html
* igt@kms_busy@basic-flip-c:
- fi-skl-6770hq: [PASS][3] -> [SKIP][4] ([fdo#109271] / [fdo#109278]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/fi-skl-6770hq/igt@kms_busy@basic-flip-c.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/fi-skl-6770hq/igt@kms_busy@basic-flip-c.html
* igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2: [PASS][5] -> [FAIL][6] ([fdo#110387])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_flip@basic-flip-vs-dpms:
- fi-skl-6770hq: [PASS][7] -> [SKIP][8] ([fdo#109271]) +23 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html
#### Possible fixes ####
* igt@gem_exec_fence@basic-busy-default:
- {fi-icl-guc}: [INCOMPLETE][9] ([fdo#107713]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/fi-icl-guc/igt@gem_exec_fence@basic-busy-default.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/fi-icl-guc/igt@gem_exec_fence@basic-busy-default.html
* igt@i915_pm_rpm@module-reload:
- fi-icl-u3: [INCOMPLETE][11] ([fdo#107713] / [fdo#108840]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/fi-icl-u3/igt@i915_pm_rpm@module-reload.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/fi-icl-u3/igt@i915_pm_rpm@module-reload.html
* {igt@i915_selftest@live_mman}:
- fi-icl-y: [TIMEOUT][13] -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/fi-icl-y/igt@i915_selftest@live_mman.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/fi-icl-y/igt@i915_selftest@live_mman.html
* igt@kms_addfb_basic@invalid-get-prop-any:
- fi-icl-u3: [DMESG-WARN][15] ([fdo#107724]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/fi-icl-u3/igt@kms_addfb_basic@invalid-get-prop-any.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/fi-icl-u3/igt@kms_addfb_basic@invalid-get-prop-any.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#110387]: https://bugs.freedesktop.org/show_bug.cgi?id=110387
Participating hosts (54 -> 46)
------------------------------
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7560u fi-byt-clapper fi-bdw-samus fi-cml-u
Build changes
-------------
* Linux: CI_DRM_6175 -> Patchwork_13146
CI_DRM_6175: 0ebe1e37a70176b84d4e2d489f03c3533e0fcd1a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5026: 4108c74c3b15460de25ab989f4e2031594559dfc @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13146: ea1a07e682dbfe008259a1d5f032c95a7de222cb @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ea1a07e682db drm/i915/bios: add an enum for BDB block IDs
2d7fa3945b37 drm/i915/bios: add more LFP options
b97b4c6d7321 drm/i915/bios: add VBT swing bit to child device definition
1648c0be8a00 drm/i915/bios: sort BDB block definitions using block ID
30f8c301c257 drm/i915/bios: add BDB block comments before definitions
55aa65df8e80 drm/i915/bios: reserve struct bdb_ prefix for BDB blocks
836a72d3aeaf drm/i915/bios: remove unused, obsolete VBT definitions
ce3636abfde6 drm/i915/bios: clean up VBT port info debug logging
c49e708599ca drm/i915/bios: use port info child pointer to determine LSPCON presence
bdef2b9d9725 drm/i915/bios: use port info child pointer to determine HPD invert
9b22bc72602e drm/i915/bios: refactor DDC pin and AUX CH sanitize functions
57b36d471918 drm/i915/bios: store child device pointer in DDI port info
7fd05aa058d5 drm/i915/bios: make child device order the priority order
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/
_______________________________________________
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^ permalink raw reply [flat|nested] 18+ messages in thread* ✓ Fi.CI.IGT: success for drm/i915/bios: vbt cleanup
2019-05-31 13:14 [PATCH 00/13] drm/i915/bios: vbt cleanup Jani Nikula
` (13 preceding siblings ...)
2019-05-31 16:34 ` ✓ Fi.CI.BAT: success for drm/i915/bios: vbt cleanup Patchwork
@ 2019-06-01 22:03 ` Patchwork
14 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-06-01 22:03 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/bios: vbt cleanup
URL : https://patchwork.freedesktop.org/series/61430/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6175_full -> Patchwork_13146_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_13146_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_tiled_swapping@non-threaded:
- shard-iclb: [PASS][1] -> [FAIL][2] ([fdo#108686])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb3/igt@gem_tiled_swapping@non-threaded.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb1/igt@gem_tiled_swapping@non-threaded.html
- shard-snb: [PASS][3] -> [DMESG-WARN][4] ([fdo#108686])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-snb2/igt@gem_tiled_swapping@non-threaded.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-snb1/igt@gem_tiled_swapping@non-threaded.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +6 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-apl4/igt@gem_workarounds@suspend-resume-context.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-apl8/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-skl: [PASS][7] -> [INCOMPLETE][8] ([fdo#104108])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-skl8/igt@i915_suspend@fence-restore-tiled2untiled.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-skl8/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
- shard-glk: [PASS][9] -> [FAIL][10] ([fdo#106509] / [fdo#107409])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-glk1/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-glk8/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled:
- shard-skl: [PASS][11] -> [FAIL][12] ([fdo#103184] / [fdo#103232])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-skl7/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-skl2/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html
* igt@kms_flip@2x-flip-vs-fences:
- shard-glk: [PASS][13] -> [INCOMPLETE][14] ([fdo#103359] / [k.org#198133])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-glk8/igt@kms_flip@2x-flip-vs-fences.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-glk4/igt@kms_flip@2x-flip-vs-fences.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [PASS][15] -> [FAIL][16] ([fdo#105363])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-blt:
- shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103167]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-blt.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_plane_lowres@pipe-a-tiling-y:
- shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103166])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb3/igt@kms_plane_lowres@pipe-a-tiling-y.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb8/igt@kms_plane_lowres@pipe-a-tiling-y.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#108341])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb5/igt@kms_psr@no_drrs.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb8/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_setmode@basic:
- shard-kbl: [PASS][25] -> [FAIL][26] ([fdo#99912])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-kbl2/igt@kms_setmode@basic.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-kbl7/igt@kms_setmode@basic.html
* igt@perf_pmu@rc6:
- shard-kbl: [PASS][27] -> [SKIP][28] ([fdo#109271])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-kbl7/igt@perf_pmu@rc6.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-kbl3/igt@perf_pmu@rc6.html
#### Possible fixes ####
* igt@gem_eio@in-flight-suspend:
- shard-glk: [FAIL][29] ([fdo#110667]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-glk5/igt@gem_eio@in-flight-suspend.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-glk2/igt@gem_eio@in-flight-suspend.html
* igt@gem_mmap_gtt@forked-medium-copy-xy:
- shard-iclb: [INCOMPLETE][31] ([fdo#107713] / [fdo#109100]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb3/igt@gem_mmap_gtt@forked-medium-copy-xy.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb1/igt@gem_mmap_gtt@forked-medium-copy-xy.html
* igt@gem_persistent_relocs@forked:
- shard-iclb: [INCOMPLETE][33] ([fdo#107713]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb7/igt@gem_persistent_relocs@forked.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb5/igt@gem_persistent_relocs@forked.html
* igt@gem_softpin@softpin:
- shard-glk: [INCOMPLETE][35] ([fdo#103359] / [k.org#198133]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-glk4/igt@gem_softpin@softpin.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-glk6/igt@gem_softpin@softpin.html
* igt@gem_tiled_swapping@non-threaded:
- shard-kbl: [FAIL][37] ([fdo#108686]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-kbl7/igt@gem_tiled_swapping@non-threaded.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-kbl7/igt@gem_tiled_swapping@non-threaded.html
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: [DMESG-WARN][39] ([fdo#108566]) -> [PASS][40] +5 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-apl7/igt@i915_suspend@fence-restore-untiled.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-apl2/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_cursor_crc@pipe-c-cursor-256x256-sliding:
- shard-skl: [FAIL][41] ([fdo#103232]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-256x256-sliding.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-skl6/igt@kms_cursor_crc@pipe-c-cursor-256x256-sliding.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
- shard-iclb: [FAIL][43] ([fdo#103167]) -> [PASS][44] +3 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- shard-skl: [INCOMPLETE][45] ([fdo#104108]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-skl9/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-skl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][47] ([fdo#103166]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-x.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [SKIP][49] ([fdo#109441]) -> [PASS][50] +2 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb4/igt@kms_psr@psr2_cursor_plane_onoff.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
#### Warnings ####
* igt@gem_mmap_gtt@forked-big-copy-odd:
- shard-iclb: [INCOMPLETE][51] ([fdo#107713] / [fdo#109100]) -> [TIMEOUT][52] ([fdo#109673])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-iclb7/igt@gem_mmap_gtt@forked-big-copy-odd.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-iclb3/igt@gem_mmap_gtt@forked-big-copy-odd.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-skl: [INCOMPLETE][53] ([fdo#110741]) -> [INCOMPLETE][54] ([fdo#107773] / [fdo#110741])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-skl5/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-skl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite:
- shard-skl: [FAIL][55] ([fdo#108040]) -> [FAIL][56] ([fdo#103167]) +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6175/shard-skl7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/shard-skl2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite.html
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#106509]: https://bugs.freedesktop.org/show_bug.cgi?id=106509
[fdo#107409]: https://bugs.freedesktop.org/show_bug.cgi?id=107409
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
[fdo#110667]: https://bugs.freedesktop.org/show_bug.cgi?id=110667
[fdo#110741]: https://bugs.freedesktop.org/show_bug.cgi?id=110741
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_6175 -> Patchwork_13146
CI_DRM_6175: 0ebe1e37a70176b84d4e2d489f03c3533e0fcd1a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5026: 4108c74c3b15460de25ab989f4e2031594559dfc @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13146: ea1a07e682dbfe008259a1d5f032c95a7de222cb @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13146/
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Intel-gfx@lists.freedesktop.org
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