* Re: [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation
2017-01-11 9:20 [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation Lee, Shawn C
@ 2017-01-11 9:11 ` Jani Nikula
2017-01-11 9:23 ` ✗ Fi.CI.BAT: warning for " Patchwork
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Jani Nikula @ 2017-01-11 9:11 UTC (permalink / raw)
To: Lee, Shawn C, intel-gfx
On Wed, 11 Jan 2017, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> From: "Lee, Shawn C" <shawn.c.lee@intel.com>
>
> Kernel oops was trigger by DP MST monitor/hub connected.
Copy paste the oops to the commit message please. It's *much* easier to
match bug reports and fixes this way.
There's likely a bug report, or several bug reports about this over at
FDO bugzilla. Any Bugzilla: references we should add?
When was this broken? Which commit does this fix? We should use a Fixes:
tag to identify it, so the fix can be backported to appropriate stable
kernels.
BR,
Jani.
> DP MST series patch already upstream and MST should
> be support also. MST monitor will display normally with this
> change on bxt platform.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
> Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
> Reviewed-by: Ciobanu, Nathan D <nathan.d.ciobanu@intel.com>
> Reviewed-by: Herbert, Marc <marc.herbert@intel.com>
> Reviewed-by: Sripada, Radhakrishna <radhakrishna.sripada@intel.com>
>
> Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index c92a2558beb4..1a1d99d266ed 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -1855,7 +1855,8 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock,
> return NULL;
>
> if ((encoder->type == INTEL_OUTPUT_DP ||
> - encoder->type == INTEL_OUTPUT_EDP) &&
> + encoder->type == INTEL_OUTPUT_EDP ||
> + encoder->type == INTEL_OUTPUT_DP_MST ) &&
> !bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
> return NULL;
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread* ✗ Fi.CI.BAT: warning for drm/i915/bxt: Add MST support when do DPLL calculation
2017-01-11 9:20 [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation Lee, Shawn C
2017-01-11 9:11 ` Jani Nikula
@ 2017-01-11 9:23 ` Patchwork
2017-01-12 7:10 ` [PATCH v2] " Lee, Shawn C
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2017-01-11 9:23 UTC (permalink / raw)
To: Lee, Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/bxt: Add MST support when do DPLL calculation
URL : https://patchwork.freedesktop.org/series/17815/
State : warning
== Summary ==
Series 17815v1 drm/i915/bxt: Add MST support when do DPLL calculation
https://patchwork.freedesktop.org/api/1.0/series/17815/revisions/1/mbox/
Test kms_force_connector_basic:
Subgroup force-edid:
pass -> DMESG-WARN (fi-snb-2520m)
fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39
fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22
fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12
fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27
fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-skl-6700hq total:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20
fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21
fi-skl-6770hq total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-snb-2520m total:246 pass:214 dwarn:1 dfail:0 fail:0 skip:31
fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32
abf5260be6dda4ade94e8edf66e133260083f29b drm-tip: 2017y-01m-10d-23h-42m-21s UTC integration manifest
a6d6930 drm/i915/bxt: Add MST support when do DPLL calculation
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3472/
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v2] drm/i915/bxt: Add MST support when do DPLL calculation
2017-01-11 9:20 [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation Lee, Shawn C
2017-01-11 9:11 ` Jani Nikula
2017-01-11 9:23 ` ✗ Fi.CI.BAT: warning for " Patchwork
@ 2017-01-12 7:10 ` Lee, Shawn C
2017-01-12 7:23 ` ✓ Fi.CI.BAT: success for drm/i915/bxt: Add MST support when do DPLL calculation (rev2) Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Lee, Shawn C @ 2017-01-12 7:10 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From: "Lee, Shawn C" <shawn.c.lee@intel.com>
Kernel oops was trigger by DP MST monitor/hub connected.
DP MST series patch already upstream and MST should
be support also. MST monitor will display normally with this
change on bxt platform.
Fixes: a277ca7dc01d ("drm/i915: Split bxt_ddi_pll_select()")
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
Reviewed-by: Ciobanu, Nathan D <nathan.d.ciobanu@intel.com>
Reviewed-by: Herbert, Marc <marc.herbert@intel.com>
Reviewed-by: Sripada, Radhakrishna <radhakrishna.sripada@intel.com>
Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>"
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index c92a2558beb4..1a1d99d266ed 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -1855,7 +1855,8 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock,
return NULL;
if ((encoder->type == INTEL_OUTPUT_DP ||
- encoder->type == INTEL_OUTPUT_EDP) &&
+ encoder->type == INTEL_OUTPUT_EDP ||
+ encoder->type == INTEL_OUTPUT_DP_MST ) &&
!bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
return NULL;
--
1.7.9.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915/bxt: Add MST support when do DPLL calculation (rev2)
2017-01-11 9:20 [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation Lee, Shawn C
` (2 preceding siblings ...)
2017-01-12 7:10 ` [PATCH v2] " Lee, Shawn C
@ 2017-01-12 7:23 ` Patchwork
2017-02-03 4:32 ` [PATCH v3] drm/i915/bxt: Add MST support when do DPLL calculation Lee, Shawn C
2017-02-03 4:54 ` ✗ Fi.CI.BAT: failure for drm/i915/bxt: Add MST support when do DPLL calculation (rev3) Patchwork
5 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2017-01-12 7:23 UTC (permalink / raw)
To: Lee, Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/bxt: Add MST support when do DPLL calculation (rev2)
URL : https://patchwork.freedesktop.org/series/17815/
State : success
== Summary ==
Series 17815v2 drm/i915/bxt: Add MST support when do DPLL calculation
https://patchwork.freedesktop.org/api/1.0/series/17815/revisions/2/mbox/
fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39
fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22
fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12
fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27
fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-skl-6700hq total:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20
fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21
fi-skl-6770hq total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32
60f8884d35facd41e1b085a19444205ec13a5da0 drm-tip: 2017y-01m-11d-20h-53m-23s UTC integration manifest
0828c35 drm/i915/bxt: Add MST support when do DPLL calculation
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3495/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v3] drm/i915/bxt: Add MST support when do DPLL calculation
2017-01-11 9:20 [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation Lee, Shawn C
` (3 preceding siblings ...)
2017-01-12 7:23 ` ✓ Fi.CI.BAT: success for drm/i915/bxt: Add MST support when do DPLL calculation (rev2) Patchwork
@ 2017-02-03 4:32 ` Lee, Shawn C
2017-02-03 12:45 ` Jani Nikula
2017-02-03 4:54 ` ✗ Fi.CI.BAT: failure for drm/i915/bxt: Add MST support when do DPLL calculation (rev3) Patchwork
5 siblings, 1 reply; 8+ messages in thread
From: Lee, Shawn C @ 2017-02-03 4:32 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From: "Lee, Shawn C" <shawn.c.lee@intel.com>
Add the missing INTEL_OUTPUT_DP_MST case in bxt_get_dpll()
to correctly initialize the crtc_state and port plls when
link training a DP MST monitor on BXT/APL devices.
Fixes: a277ca7dc01d ("drm/i915: Split bxt_ddi_pll_select()")
Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=99572
Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
Reviewed-by: Ciobanu, Nathan D <nathan.d.ciobanu@intel.com>
Reviewed-by: Herbert, Marc <marc.herbert@intel.com>
Reviewed-by: Bride, Jim <jim.bride@intel.com>
Reviewed-by: Navare, Manasi D <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index c92a2558beb4..1a1d99d266ed 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -1855,7 +1855,8 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock,
return NULL;
if ((encoder->type == INTEL_OUTPUT_DP ||
- encoder->type == INTEL_OUTPUT_EDP) &&
+ encoder->type == INTEL_OUTPUT_EDP ||
+ encoder->type == INTEL_OUTPUT_DP_MST ) &&
!bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
return NULL;
--
1.7.9.5
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3] drm/i915/bxt: Add MST support when do DPLL calculation
2017-02-03 4:32 ` [PATCH v3] drm/i915/bxt: Add MST support when do DPLL calculation Lee, Shawn C
@ 2017-02-03 12:45 ` Jani Nikula
0 siblings, 0 replies; 8+ messages in thread
From: Jani Nikula @ 2017-02-03 12:45 UTC (permalink / raw)
To: Lee, Shawn C, intel-gfx
On Fri, 03 Feb 2017, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> From: "Lee, Shawn C" <shawn.c.lee@intel.com>
>
> Add the missing INTEL_OUTPUT_DP_MST case in bxt_get_dpll()
> to correctly initialize the crtc_state and port plls when
> link training a DP MST monitor on BXT/APL devices.
>
> Fixes: a277ca7dc01d ("drm/i915: Split bxt_ddi_pll_select()")
> Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=99572
>
> Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
> Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
> Reviewed-by: Ciobanu, Nathan D <nathan.d.ciobanu@intel.com>
> Reviewed-by: Herbert, Marc <marc.herbert@intel.com>
> Reviewed-by: Bride, Jim <jim.bride@intel.com>
> Reviewed-by: Navare, Manasi D <manasi.d.navare@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
>
> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
Pushed to drm-intel-next-queued, thanks for the patch and all the
reviews.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index c92a2558beb4..1a1d99d266ed 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -1855,7 +1855,8 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock,
> return NULL;
>
> if ((encoder->type == INTEL_OUTPUT_DP ||
> - encoder->type == INTEL_OUTPUT_EDP) &&
> + encoder->type == INTEL_OUTPUT_EDP ||
> + encoder->type == INTEL_OUTPUT_DP_MST ) &&
> !bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
> return NULL;
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/bxt: Add MST support when do DPLL calculation (rev3)
2017-01-11 9:20 [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation Lee, Shawn C
` (4 preceding siblings ...)
2017-02-03 4:32 ` [PATCH v3] drm/i915/bxt: Add MST support when do DPLL calculation Lee, Shawn C
@ 2017-02-03 4:54 ` Patchwork
5 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2017-02-03 4:54 UTC (permalink / raw)
To: Lee, Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/bxt: Add MST support when do DPLL calculation (rev3)
URL : https://patchwork.freedesktop.org/series/17815/
State : failure
== Summary ==
Series 17815v3 drm/i915/bxt: Add MST support when do DPLL calculation
https://patchwork.freedesktop.org/api/1.0/series/17815/revisions/3/mbox/
Test kms_setmode:
Subgroup basic-clone-single-crtc:
pass -> INCOMPLETE (fi-skl-6700k)
fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14
fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39
fi-bxt-j4205 total:247 pass:225 dwarn:0 dfail:0 fail:0 skip:22
fi-bxt-t5700 total:78 pass:65 dwarn:0 dfail:0 fail:0 skip:12
fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27
fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31
fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19
fi-hsw-4770r total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19
fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21
fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21
fi-kbl-7500u total:247 pass:224 dwarn:0 dfail:0 fail:2 skip:21
fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13
fi-skl-6700hq total:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20
fi-skl-6700k total:207 pass:188 dwarn:0 dfail:0 fail:0 skip:18
fi-skl-6770hq total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13
fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31
fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32
0f01216949002d20b9dc6d300c82df5ffa59e9a7 drm-tip: 2017y-02m-02d-19h-49m-15s UTC integration manifest
aeeab6a drm/i915/bxt: Add MST support when do DPLL calculation
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3685/
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^ permalink raw reply [flat|nested] 8+ messages in thread