From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eric Anholt <eric@anholt.net>
Subject: Re: [PATCH] drm/i915: Prevent use of pages >4GiB on
	965G[M]
Date: Wed, 20 Apr 2011 17:21:03 -0700
Message-ID: <87oc40o3o0.fsf@pollan.anholt.net>
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On Sun, 17 Apr 2011 17:37:32 +0100, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> The 965G (Broadwater) and 965GM (Crestline) chipsets had many errata in
> handling pages allocation above 4GiB. So we should be careful never to
> allocate and attempt to pass such through to the GPU and so limit
> ourselves to GFP_DMA32 on those chipsets.

Unfortunate to see this -- were there more particular bugs in >4GB
handling found, or is it just "I'm tired of worrying about it, let's
avoid this class of problem"?  I'm not saying "no" to this patch for
either answer, just curious.

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