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* [Intel-gfx] [PATCH] drm:i915:display: add checks for Gen9 devices with hdr capability
@ 2020-03-26 11:34 Vipin Anand
  2020-03-26 17:07 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
  2020-04-07 12:09 ` [Intel-gfx] [PATCH] " Jani Nikula
  0 siblings, 2 replies; 3+ messages in thread
From: Vipin Anand @ 2020-03-26 11:34 UTC (permalink / raw)
  To: intel-gfx

this patch adds hdr capabilities checks for Gen9 devices with
lspcon support.

Signed-off-by: Vipin Anand <vipin.anand@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c   | 17 +++++++++++++----
 drivers/gpu/drm/i915/display/intel_lspcon.c |  9 +++++++--
 2 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 9ae2f88cc925..70d0d76ed606 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -833,9 +833,12 @@ intel_hdmi_compute_drm_infoframe(struct intel_encoder *encoder,
 {
 	struct hdmi_drm_infoframe *frame = &crtc_state->infoframes.drm.drm;
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
 	int ret;
 
-	if (!(INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)))
+	if (!(INTEL_GEN(dev_priv) >= 10 ||
+	      (((INTEL_GEN(dev_priv) >= 9)) &&
+	      intel_dig_port->lspcon.active)))
 		return true;
 
 	if (!crtc_state->has_infoframe)
@@ -2102,9 +2105,12 @@ static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	const struct ddi_vbt_port_info *info =
 		&dev_priv->vbt.ddi_port_info[encoder->port];
+	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
 	int max_tmds_clock;
 
-	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+	if (INTEL_GEN(dev_priv) >= 10 ||
+	    (((INTEL_GEN(dev_priv) >= 9)) &&
+			 intel_dig_port->lspcon.active))
 		max_tmds_clock = 594000;
 	else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
 		max_tmds_clock = 300000;
@@ -2423,6 +2429,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 	struct intel_digital_connector_state *intel_conn_state =
 		to_intel_digital_connector_state(conn_state);
 	bool force_dvi = intel_conn_state->force_audio == HDMI_AUDIO_OFF_DVI;
+	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
 	int ret;
 
 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
@@ -2469,7 +2476,8 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 	pipe_config->lane_count = 4;
 
 	if (scdc->scrambling.supported && (INTEL_GEN(dev_priv) >= 10 ||
-					   IS_GEMINILAKE(dev_priv))) {
+					   (((INTEL_GEN(dev_priv) >= 9)) &&
+					    intel_dig_port->lspcon.active))) {
 		if (scdc->scrambling.low_rates)
 			pipe_config->hdmi_scrambling = true;
 
@@ -3171,7 +3179,8 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
 	connector->doublescan_allowed = 0;
 	connector->stereo_allowed = 1;
 
-	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+	if (INTEL_GEN(dev_priv) >= 10 ||
+	    (((INTEL_GEN(dev_priv) >= 9)) && intel_dig_port->lspcon.active))
 		connector->ycbcr_420_allowed = true;
 
 	intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 5cede4f07f22..be074acd74f3 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -116,6 +116,8 @@ static bool lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
 	if (lspcon->vendor == LSPCON_VENDOR_MCA)
 		ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS,
 				       &hdr_caps, 1);
+	else if (lspcon->vendor == LSPCON_VENDOR_PARADE)
+		return true;
 	else
 		return false;
 
@@ -474,7 +476,8 @@ void lspcon_write_infoframe(struct intel_encoder *encoder,
 	 * Todo: Add support for Parade later
 	 */
 	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA &&
-	    lspcon->vendor != LSPCON_VENDOR_MCA)
+		(lspcon->vendor != LSPCON_VENDOR_MCA ||
+		 lspcon->vendor != LSPCON_VENDOR_PARADE))
 		return;
 
 	if (lspcon->vendor == LSPCON_VENDOR_MCA) {
@@ -646,7 +649,9 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port)
 		return false;
 	}
 
-	if (lspcon->vendor == LSPCON_VENDOR_MCA && lspcon->hdr_supported)
+	if ((lspcon->vendor == LSPCON_VENDOR_MCA ||
+	     lspcon->vendor == LSPCON_VENDOR_PARADE) &&
+	     lspcon->hdr_supported)
 		drm_object_attach_property(&connector->base,
 					   connector->dev->mode_config.hdr_output_metadata_property,
 					   0);
-- 
2.26.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm:i915:display: add checks for Gen9 devices with hdr capability
  2020-03-26 11:34 [Intel-gfx] [PATCH] drm:i915:display: add checks for Gen9 devices with hdr capability Vipin Anand
@ 2020-03-26 17:07 ` Patchwork
  2020-04-07 12:09 ` [Intel-gfx] [PATCH] " Jani Nikula
  1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2020-03-26 17:07 UTC (permalink / raw)
  To: Vipin Anand; +Cc: intel-gfx

== Series Details ==

Series: drm:i915:display: add checks for Gen9 devices with hdr capability
URL   : https://patchwork.freedesktop.org/series/75114/
State : failure

== Summary ==

Applying: drm:i915:display: add checks for Gen9 devices with hdr capability
error: sha1 information is lacking or useless (drivers/gpu/drm/i915/display/intel_hdmi.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch' to see the failed patch
Patch failed at 0001 drm:i915:display: add checks for Gen9 devices with hdr capability
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [Intel-gfx] [PATCH] drm:i915:display: add checks for Gen9 devices with hdr capability
  2020-03-26 11:34 [Intel-gfx] [PATCH] drm:i915:display: add checks for Gen9 devices with hdr capability Vipin Anand
  2020-03-26 17:07 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
@ 2020-04-07 12:09 ` Jani Nikula
  1 sibling, 0 replies; 3+ messages in thread
From: Jani Nikula @ 2020-04-07 12:09 UTC (permalink / raw)
  To: Vipin Anand, intel-gfx

On Thu, 26 Mar 2020, Vipin Anand <vipin.anand@intel.com> wrote:
> this patch adds hdr capabilities checks for Gen9 devices with
> lspcon support.

For a lot of the changes I don't see how you'd end up in the code paths
with LSPCON, because from the driver perspective LSPCON is DP. (We
always use PCON mode.)

There's also some conflation with the LSPCON vendor related changes that
should probably be separate, if they are valid.

This does not apply on top of current drm-tip; what is it based on?

Did you actually try this?

BR,
Jani.


>
> Signed-off-by: Vipin Anand <vipin.anand@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c   | 17 +++++++++++++----
>  drivers/gpu/drm/i915/display/intel_lspcon.c |  9 +++++++--
>  2 files changed, 20 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 9ae2f88cc925..70d0d76ed606 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -833,9 +833,12 @@ intel_hdmi_compute_drm_infoframe(struct intel_encoder *encoder,
>  {
>  	struct hdmi_drm_infoframe *frame = &crtc_state->infoframes.drm.drm;
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
>  	int ret;
>  
> -	if (!(INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)))
> +	if (!(INTEL_GEN(dev_priv) >= 10 ||
> +	      (((INTEL_GEN(dev_priv) >= 9)) &&
> +	      intel_dig_port->lspcon.active)))
>  		return true;
>  
>  	if (!crtc_state->has_infoframe)
> @@ -2102,9 +2105,12 @@ static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	const struct ddi_vbt_port_info *info =
>  		&dev_priv->vbt.ddi_port_info[encoder->port];
> +	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
>  	int max_tmds_clock;
>  
> -	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> +	if (INTEL_GEN(dev_priv) >= 10 ||
> +	    (((INTEL_GEN(dev_priv) >= 9)) &&
> +			 intel_dig_port->lspcon.active))
>  		max_tmds_clock = 594000;
>  	else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
>  		max_tmds_clock = 300000;
> @@ -2423,6 +2429,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>  	struct intel_digital_connector_state *intel_conn_state =
>  		to_intel_digital_connector_state(conn_state);
>  	bool force_dvi = intel_conn_state->force_audio == HDMI_AUDIO_OFF_DVI;
> +	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
>  	int ret;
>  
>  	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> @@ -2469,7 +2476,8 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>  	pipe_config->lane_count = 4;
>  
>  	if (scdc->scrambling.supported && (INTEL_GEN(dev_priv) >= 10 ||
> -					   IS_GEMINILAKE(dev_priv))) {
> +					   (((INTEL_GEN(dev_priv) >= 9)) &&
> +					    intel_dig_port->lspcon.active))) {
>  		if (scdc->scrambling.low_rates)
>  			pipe_config->hdmi_scrambling = true;
>  
> @@ -3171,7 +3179,8 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
>  	connector->doublescan_allowed = 0;
>  	connector->stereo_allowed = 1;
>  
> -	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> +	if (INTEL_GEN(dev_priv) >= 10 ||
> +	    (((INTEL_GEN(dev_priv) >= 9)) && intel_dig_port->lspcon.active))
>  		connector->ycbcr_420_allowed = true;
>  
>  	intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
> index 5cede4f07f22..be074acd74f3 100644
> --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> @@ -116,6 +116,8 @@ static bool lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
>  	if (lspcon->vendor == LSPCON_VENDOR_MCA)
>  		ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS,
>  				       &hdr_caps, 1);
> +	else if (lspcon->vendor == LSPCON_VENDOR_PARADE)
> +		return true;
>  	else
>  		return false;
>  
> @@ -474,7 +476,8 @@ void lspcon_write_infoframe(struct intel_encoder *encoder,
>  	 * Todo: Add support for Parade later
>  	 */
>  	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA &&
> -	    lspcon->vendor != LSPCON_VENDOR_MCA)
> +		(lspcon->vendor != LSPCON_VENDOR_MCA ||
> +		 lspcon->vendor != LSPCON_VENDOR_PARADE))
>  		return;
>  
>  	if (lspcon->vendor == LSPCON_VENDOR_MCA) {
> @@ -646,7 +649,9 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port)
>  		return false;
>  	}
>  
> -	if (lspcon->vendor == LSPCON_VENDOR_MCA && lspcon->hdr_supported)
> +	if ((lspcon->vendor == LSPCON_VENDOR_MCA ||
> +	     lspcon->vendor == LSPCON_VENDOR_PARADE) &&
> +	     lspcon->hdr_supported)
>  		drm_object_attach_property(&connector->base,
>  					   connector->dev->mode_config.hdr_output_metadata_property,
>  					   0);

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-04-07 12:09 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2020-03-26 11:34 [Intel-gfx] [PATCH] drm:i915:display: add checks for Gen9 devices with hdr capability Vipin Anand
2020-03-26 17:07 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
2020-04-07 12:09 ` [Intel-gfx] [PATCH] " Jani Nikula

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