From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Arun Siluvery <arun.siluvery@linux.intel.com>,
Chris Wilson <chris@chris-wilson.co.uk>,
intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: Re: [PATCH] drm/i915: Fix cmdparser STORE/LOAD command descriptors
Date: Thu, 03 Sep 2015 15:10:56 +0300 [thread overview]
Message-ID: <87pp1zaejz.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <55E81BAE.3000503@linux.intel.com>
Arun Siluvery <arun.siluvery@linux.intel.com> writes:
> On 02/09/2015 12:29, Chris Wilson wrote:
>> Fixes regression from
>> commit f1afe24f0e736b9d7f2275e2b1504af3fe612f2a
>> Author: Arun Siluvery <arun.siluvery@linux.intel.com>
>> Date: Tue Aug 4 16:22:20 2015 +0100
>>
>> drm/i915: Change SRM, LRM instructions to use correct length
>>
>> which forgot to account for the length bias when declaring the fixed
>> length.
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91844
>> Reported-by: Andreas Reis <andreas.reis@gmail.com>
>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Dave Gordon <david.s.gordon@intel.com>
>> Cc: Arun Siluvery <arun.siluvery@linux.intel.com>
>> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
>> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
>> ---
>> drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
>> index ad7d7ab76d3f..09932cab1a3f 100644
>> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
>> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
>> @@ -124,14 +124,14 @@ static const struct drm_i915_cmd_descriptor common_cmds[] = {
>> CMD( MI_STORE_DWORD_INDEX, SMI, !F, 0xFF, R ),
>> CMD( MI_LOAD_REGISTER_IMM(1), SMI, !F, 0xFF, W,
>> .reg = { .offset = 1, .mask = 0x007FFFFC, .step = 2 } ),
>> - CMD( MI_STORE_REGISTER_MEM, SMI, F, 1, W | B,
>> + CMD( MI_STORE_REGISTER_MEM, SMI, F, 3, W | B,
>> .reg = { .offset = 1, .mask = 0x007FFFFC },
>> .bits = {{
>> .offset = 0,
>> .mask = MI_GLOBAL_GTT,
>> .expected = 0,
>> }}, ),
>> - CMD( MI_LOAD_REGISTER_MEM, SMI, F, 1, W | B,
>> + CMD( MI_LOAD_REGISTER_MEM, SMI, F, 3, W | B,
>> .reg = { .offset = 1, .mask = 0x007FFFFC },
>> .bits = {{
>> .offset = 0,
>>
> My mistake, I should have verified on Gen7 hw.
Review is for mistakes, and review failed.
-Mika
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next prev parent reply other threads:[~2015-09-03 12:10 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-02 11:29 [PATCH] drm/i915: Fix cmdparser STORE/LOAD command descriptors Chris Wilson
2015-09-03 10:06 ` Arun Siluvery
2015-09-03 12:10 ` Mika Kuoppala [this message]
2015-09-04 8:43 ` Daniel Vetter
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