public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Arthur Runyan <arthur.j.runyan@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH] drm/i915/skl: Update DDI buffer translation	programming.
Date: Wed, 26 Aug 2015 10:27:18 +0300	[thread overview]
Message-ID: <87pp2a8q7d.fsf@intel.com> (raw)
In-Reply-To: <1440460124-10330-1-git-send-email-rodrigo.vivi@intel.com>

On Tue, 25 Aug 2015, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> SKL-Y can now use the same programming for all VccIO values after an adjustment to I_boost.
> SKL-U DP table adjustments.
> 1.       Remove SKL Y 0.95V from "SKL H and S" columns in all tables.  The other SKL Y column removes the "0.85V VccIO" so it now applies to all voltages.
> 2.       DP table changes SKL U 400mV+0db dword 0 value from 2016h to 201Bh.
> 3.       DP table changes SKL U 600mv+0db dword 0 value from 2016h to 201Bh.
> 4.       DP table increases I_boost to level 3 for SKL Y 400mv+9.5db.
>
> v2: Fix compilation warnings as pointed by Paulo.
>
> Reference: Graphics Spec Change r97962
> Cc: Arthur Runyan <arthur.j.runyan@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Pushed to drm-intel-next-fixes.

BR,
Jani.


> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 75 ++++++++++++++--------------------------
>  1 file changed, 25 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 56d778f..3b056c4 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -128,7 +128,7 @@ static const struct ddi_buf_trans bdw_ddi_translations_hdmi[] = {
>  	{ 0x80FFFFFF, 0x001B0002, 0x0 },/* 9:	1000	1000	0	*/
>  };
>  
> -/* Skylake H, S, and Skylake Y with 0.95V VccIO */
> +/* Skylake H and S */
>  static const struct ddi_buf_trans skl_ddi_translations_dp[] = {
>  	{ 0x00002016, 0x000000A0, 0x0 },
>  	{ 0x00005012, 0x0000009B, 0x0 },
> @@ -143,23 +143,23 @@ static const struct ddi_buf_trans skl_ddi_translations_dp[] = {
>  
>  /* Skylake U */
>  static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = {
> -	{ 0x00002016, 0x000000A2, 0x0 },
> +	{ 0x0000201B, 0x000000A2, 0x0 },
>  	{ 0x00005012, 0x00000088, 0x0 },
>  	{ 0x00007011, 0x00000087, 0x0 },
> -	{ 0x80009010, 0x000000C7, 0x1 },	/* Uses I_boost */
> -	{ 0x00002016, 0x0000009D, 0x0 },
> +	{ 0x80009010, 0x000000C7, 0x1 },	/* Uses I_boost level 0x1 */
> +	{ 0x0000201B, 0x0000009D, 0x0 },
>  	{ 0x00005012, 0x000000C7, 0x0 },
>  	{ 0x00007011, 0x000000C7, 0x0 },
>  	{ 0x00002016, 0x00000088, 0x0 },
>  	{ 0x00005012, 0x000000C7, 0x0 },
>  };
>  
> -/* Skylake Y with 0.85V VccIO */
> -static const struct ddi_buf_trans skl_y_085v_ddi_translations_dp[] = {
> +/* Skylake Y */
> +static const struct ddi_buf_trans skl_y_ddi_translations_dp[] = {
>  	{ 0x00000018, 0x000000A2, 0x0 },
>  	{ 0x00005012, 0x00000088, 0x0 },
>  	{ 0x00007011, 0x00000087, 0x0 },
> -	{ 0x80009010, 0x000000C7, 0x1 },	/* Uses I_boost */
> +	{ 0x80009010, 0x000000C7, 0x3 },	/* Uses I_boost level 0x3 */
>  	{ 0x00000018, 0x0000009D, 0x0 },
>  	{ 0x00005012, 0x000000C7, 0x0 },
>  	{ 0x00007011, 0x000000C7, 0x0 },
> @@ -168,7 +168,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_dp[] = {
>  };
>  
>  /*
> - * Skylake H and S, and Skylake Y with 0.95V VccIO
> + * Skylake H and S
>   * eDP 1.4 low vswing translation parameters
>   */
>  static const struct ddi_buf_trans skl_ddi_translations_edp[] = {
> @@ -202,10 +202,10 @@ static const struct ddi_buf_trans skl_u_ddi_translations_edp[] = {
>  };
>  
>  /*
> - * Skylake Y with 0.95V VccIO
> + * Skylake Y
>   * eDP 1.4 low vswing translation parameters
>   */
> -static const struct ddi_buf_trans skl_y_085v_ddi_translations_edp[] = {
> +static const struct ddi_buf_trans skl_y_ddi_translations_edp[] = {
>  	{ 0x00000018, 0x000000A8, 0x0 },
>  	{ 0x00004013, 0x000000AB, 0x0 },
>  	{ 0x00007011, 0x000000A4, 0x0 },
> @@ -218,7 +218,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_edp[] = {
>  	{ 0x00000018, 0x0000008A, 0x0 },
>  };
>  
> -/* Skylake H, S and U, and Skylake Y with 0.95V VccIO */
> +/* Skylake U, H and S */
>  static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = {
>  	{ 0x00000018, 0x000000AC, 0x0 },
>  	{ 0x00005012, 0x0000009D, 0x0 },
> @@ -233,8 +233,8 @@ static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = {
>  	{ 0x00000018, 0x000000C7, 0x0 },
>  };
>  
> -/* Skylake Y with 0.85V VccIO */
> -static const struct ddi_buf_trans skl_y_085v_ddi_translations_hdmi[] = {
> +/* Skylake Y */
> +static const struct ddi_buf_trans skl_y_ddi_translations_hdmi[] = {
>  	{ 0x00000018, 0x000000A1, 0x0 },
>  	{ 0x00005012, 0x000000DF, 0x0 },
>  	{ 0x00007011, 0x00000084, 0x0 },
> @@ -244,7 +244,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_hdmi[] = {
>  	{ 0x00006013, 0x000000C7, 0x0 },
>  	{ 0x00000018, 0x0000008A, 0x0 },
>  	{ 0x00003015, 0x000000C7, 0x0 },	/* Default */
> -	{ 0x80003015, 0x000000C7, 0x7 },	/* Uses I_boost */
> +	{ 0x80003015, 0x000000C7, 0x7 },	/* Uses I_boost level 0x7 */
>  	{ 0x00000018, 0x000000C7, 0x0 },
>  };
>  
> @@ -335,19 +335,11 @@ intel_dig_port_supports_hdmi(const struct intel_digital_port *intel_dig_port)
>  static const struct ddi_buf_trans *skl_get_buf_trans_dp(struct drm_device *dev,
>  							int *n_entries)
>  {
> -	struct drm_i915_private *dev_priv = dev->dev_private;
>  	const struct ddi_buf_trans *ddi_translations;
> -	static int is_095v = -1;
> -
> -	if (is_095v == -1) {
> -		u32 spr1 = I915_READ(UAIMI_SPR1);
> -
> -		is_095v = spr1 & SKL_VCCIO_MASK;
> -	}
>  
> -	if (IS_SKL_ULX(dev) && !is_095v) {
> -		ddi_translations = skl_y_085v_ddi_translations_dp;
> -		*n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_dp);
> +	if (IS_SKL_ULX(dev)) {
> +		ddi_translations = skl_y_ddi_translations_dp;
> +		*n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp);
>  	} else if (IS_SKL_ULT(dev)) {
>  		ddi_translations = skl_u_ddi_translations_dp;
>  		*n_entries = ARRAY_SIZE(skl_u_ddi_translations_dp);
> @@ -364,23 +356,14 @@ static const struct ddi_buf_trans *skl_get_buf_trans_edp(struct drm_device *dev,
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	const struct ddi_buf_trans *ddi_translations;
> -	static int is_095v = -1;
> -
> -	if (is_095v == -1) {
> -		u32 spr1 = I915_READ(UAIMI_SPR1);
>  
> -		is_095v = spr1 & SKL_VCCIO_MASK;
> -	}
> -
> -	if (IS_SKL_ULX(dev) && !is_095v) {
> +	if (IS_SKL_ULX(dev)) {
>  		if (dev_priv->edp_low_vswing) {
> -			ddi_translations = skl_y_085v_ddi_translations_edp;
> -			*n_entries =
> -				ARRAY_SIZE(skl_y_085v_ddi_translations_edp);
> +			ddi_translations = skl_y_ddi_translations_edp;
> +			*n_entries = ARRAY_SIZE(skl_y_ddi_translations_edp);
>  		} else {
> -			ddi_translations = skl_y_085v_ddi_translations_dp;
> -			*n_entries =
> -				ARRAY_SIZE(skl_y_085v_ddi_translations_dp);
> +			ddi_translations = skl_y_ddi_translations_dp;
> +			*n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp);
>  		}
>  	} else if (IS_SKL_ULT(dev)) {
>  		if (dev_priv->edp_low_vswing) {
> @@ -407,19 +390,11 @@ static const struct ddi_buf_trans *
>  skl_get_buf_trans_hdmi(struct drm_device *dev,
>  		       int *n_entries)
>  {
> -	struct drm_i915_private *dev_priv = dev->dev_private;
>  	const struct ddi_buf_trans *ddi_translations;
> -	static int is_095v = -1;
> -
> -	if (is_095v == -1) {
> -		u32 spr1 = I915_READ(UAIMI_SPR1);
> -
> -		is_095v = spr1 & SKL_VCCIO_MASK;
> -	}
>  
> -	if (IS_SKL_ULX(dev) && !is_095v) {
> -		ddi_translations = skl_y_085v_ddi_translations_hdmi;
> -		*n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_hdmi);
> +	if (IS_SKL_ULX(dev)) {
> +		ddi_translations = skl_y_ddi_translations_hdmi;
> +		*n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi);
>  	} else {
>  		ddi_translations = skl_ddi_translations_hdmi;
>  		*n_entries = ARRAY_SIZE(skl_ddi_translations_hdmi);
> -- 
> 2.4.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-08-26  7:24 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-05 21:59 [PATCH] drm/i915/skl: Update DDI buffer translation programming Rodrigo Vivi
2015-08-06  1:46 ` Zhang, Xiong Y
2015-08-08  1:02   ` Rodrigo Vivi
2015-08-12 11:30 ` shuang.he
2015-08-21 18:23 ` Zanoni, Paulo R
2015-08-24 23:48   ` Rodrigo Vivi
2015-08-26  7:27     ` Jani Nikula [this message]
2015-08-29  4:42     ` shuang.he

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87pp2a8q7d.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=arthur.j.runyan@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox