* [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4
@ 2025-05-14 8:43 Ankit Nautiyal
2025-05-14 8:43 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
` (4 more replies)
0 siblings, 5 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-05-14 8:43 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula, dri-devel
Revert the existing patch that rejects HBR3 for all eDP panels that
do not support TPS4. Add a patch to add a quirk for specific panels that
support HBR3 without TPS4 and are unstable with higher rate.
Reject HBR3 only for these panels.
Ankit Nautiyal (2):
Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
drm/dp: Add quirk for panel with HBR3 without TPS4
drivers/gpu/drm/display/drm_dp_helper.c | 2 ++
drivers/gpu/drm/i915/display/intel_dp.c | 43 +++++++++++++++++++------
include/drm/display/drm_dp_helper.h | 8 +++++
3 files changed, 44 insertions(+), 9 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-05-14 8:43 [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4 Ankit Nautiyal
@ 2025-05-14 8:43 ` Ankit Nautiyal
2025-05-14 10:02 ` Jani Nikula
2025-05-14 8:43 ` [PATCH 2/2] drm/dp: Add quirk for panel with HBR3 without TPS4 Ankit Nautiyal
` (3 subsequent siblings)
4 siblings, 1 reply; 22+ messages in thread
From: Ankit Nautiyal @ 2025-05-14 8:43 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula, dri-devel
This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
Some eDP panels support HBR3 but not TPS4 and rely on a fixed mode that
requires HBR3. After the original commit, these panels go blank due to
the rejection of HBR3.
To restore functionality for such panels, this commit reverts the change.
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
1 file changed, 7 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 91a34d474463..97cf80372264 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -175,28 +175,10 @@ int intel_dp_link_symbol_clock(int rate)
static int max_dprx_rate(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
- int max_rate;
-
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
- max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- else
- max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+ return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- max_rate = 540000;
- }
-
- return max_rate;
+ return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
}
static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4272,9 +4254,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
static void
intel_edp_set_sink_rates(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
intel_dp->num_sink_rates = 0;
if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4285,7 +4264,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
sink_rates, sizeof(sink_rates));
for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
- int rate;
+ int val = le16_to_cpu(sink_rates[i]);
+
+ if (val == 0)
+ break;
/* Value read multiplied by 200kHz gives the per-lane
* link rate in kHz. The source rates are, however,
@@ -4293,24 +4275,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
* back to symbols is
* (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
*/
- rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
- if (rate == 0)
- break;
-
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- break;
- }
-
- intel_dp->sink_rates[i] = rate;
+ intel_dp->sink_rates[i] = (val * 200) / 10;
}
intel_dp->num_sink_rates = i;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/dp: Add quirk for panel with HBR3 without TPS4
2025-05-14 8:43 [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4 Ankit Nautiyal
2025-05-14 8:43 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-05-14 8:43 ` Ankit Nautiyal
2025-05-14 9:58 ` Jani Nikula
2025-05-14 11:56 ` ✗ Fi.CI.SPARSE: warning for Add quirk for panels that support " Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 22+ messages in thread
From: Ankit Nautiyal @ 2025-05-14 8:43 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula, dri-devel
For DP, TPS4 is a requirement for supporting HBR3, but for eDP its a
bit ambiguous. Some broken eDP sinks declare support for HBR3 without
TPS4, but are unable to produce a stable output. For these panels
add a quirk to reject HBR3 rate if TPS4 is not supported.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/display/drm_dp_helper.c | 2 +
drivers/gpu/drm/i915/display/intel_dp.c | 74 ++++++++++++++++++++++---
include/drm/display/drm_dp_helper.h | 8 +++
3 files changed, 77 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c
index 56c7e3318f01..6f849146dd98 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2519,6 +2519,8 @@ static const struct dpcd_quirk dpcd_quirk_list[] = {
{ OUI(0x00, 0x0C, 0xE7), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC) },
/* Apple MacBookPro 2017 15 inch eDP Retina panel reports too low DP_MAX_LINK_RATE */
{ OUI(0x00, 0x10, 0xfa), DEVICE_ID(101, 68, 21, 101, 98, 97), false, BIT(DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS) },
+ /* Novatek panel */
+ { OUI(0x38, 0xEC, 0x11), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_HBR3_WITHOUT_TPS4) },
};
#undef OUI
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 97cf80372264..6c5debc8310d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -173,12 +173,53 @@ int intel_dp_link_symbol_clock(int rate)
return DIV_ROUND_CLOSEST(rate * 10, intel_dp_link_symbol_size(rate));
}
+static bool detected_hbr3_tps4_quirk(struct intel_dp *intel_dp)
+{
+ struct intel_connector *connector = intel_dp->attached_connector;
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct drm_dp_aux *aux = &intel_dp->aux;
+ struct drm_dp_desc desc;
+
+ if (drm_dp_read_desc(aux, &desc, drm_dp_is_branch(intel_dp->dpcd)) < 0)
+ return false;
+
+ if (!drm_dp_has_quirk(&desc, DP_DPCD_QUIRK_HBR3_WITHOUT_TPS4))
+ return false;
+
+ drm_dbg_kms(display->drm,
+ "[CONNECTOR:%d:%s] HBR3 without TPS4 quirk detected\n",
+ connector->base.base.id, connector->base.name);
+
+ return true;
+}
+
static int max_dprx_rate(struct intel_dp *intel_dp)
{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+ int max_rate;
+
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
- return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
+ max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
+ else
+ max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
- return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+ /*
+ * For DP TPS4 is a requirement for supporting HBR3, but for eDP its a
+ * bit ambiguous. Some broken eDP sinks declare support for HBR3 without
+ * TPS4, but are unable to produce a stable output. For these panels
+ * reject HBR3 when TPS4 is not available.
+ */
+ if (max_rate >= 810000 &&
+ !drm_dp_tps4_supported(intel_dp->dpcd) &&
+ detected_hbr3_tps4_quirk(intel_dp)) {
+ drm_dbg_kms(display->drm,
+ "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
+ encoder->base.base.id, encoder->base.name);
+ max_rate = 540000;
+ }
+
+ return max_rate;
}
static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4254,6 +4295,9 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
static void
intel_edp_set_sink_rates(struct intel_dp *intel_dp)
{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+
intel_dp->num_sink_rates = 0;
if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4264,10 +4308,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
sink_rates, sizeof(sink_rates));
for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
- int val = le16_to_cpu(sink_rates[i]);
-
- if (val == 0)
- break;
+ int rate;
/* Value read multiplied by 200kHz gives the per-lane
* link rate in kHz. The source rates are, however,
@@ -4275,7 +4316,26 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
* back to symbols is
* (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
*/
- intel_dp->sink_rates[i] = (val * 200) / 10;
+ rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
+
+ if (rate == 0)
+ break;
+ /*
+ * For DP TPS4 is a requirement for supporting HBR3, but for eDP its a
+ * bit ambiugous. Some broken eDP sinks declare support for HBR3 without
+ * TPS4, but are unable to produce a stable output. For these panels
+ * reject HBR3 when TPS4 is not available.
+ */
+ if (rate >= 810000 &&
+ !drm_dp_tps4_supported(intel_dp->dpcd) &&
+ detected_hbr3_tps4_quirk(intel_dp)) {
+ drm_dbg_kms(display->drm,
+ "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
+ encoder->base.base.id, encoder->base.name);
+ break;
+ }
+
+ intel_dp->sink_rates[i] = rate;
}
intel_dp->num_sink_rates = i;
}
diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
index 7b19192c7031..8021e9db67f2 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -809,6 +809,14 @@ enum drm_dp_quirk {
* requires enabling DSC.
*/
DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC,
+
+ /**
+ * @DP_DPCD_QUIRK_HBR3_WITHOUT_TPS4:
+ *
+ * The device supports HBR3 without TPS4 but is unable to produce
+ * stable output.
+ */
+ DP_DPCD_QUIRK_HBR3_WITHOUT_TPS4,
};
/**
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/dp: Add quirk for panel with HBR3 without TPS4
2025-05-14 8:43 ` [PATCH 2/2] drm/dp: Add quirk for panel with HBR3 without TPS4 Ankit Nautiyal
@ 2025-05-14 9:58 ` Jani Nikula
0 siblings, 0 replies; 22+ messages in thread
From: Jani Nikula @ 2025-05-14 9:58 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe; +Cc: ville.syrjala, dri-devel
On Wed, 14 May 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> For DP, TPS4 is a requirement for supporting HBR3, but for eDP its a
> bit ambiguous. Some broken eDP sinks declare support for HBR3 without
> TPS4, but are unable to produce a stable output. For these panels
> add a quirk to reject HBR3 rate if TPS4 is not supported.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/display/drm_dp_helper.c | 2 +
> drivers/gpu/drm/i915/display/intel_dp.c | 74 ++++++++++++++++++++++---
> include/drm/display/drm_dp_helper.h | 8 +++
> 3 files changed, 77 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c
> index 56c7e3318f01..6f849146dd98 100644
> --- a/drivers/gpu/drm/display/drm_dp_helper.c
> +++ b/drivers/gpu/drm/display/drm_dp_helper.c
> @@ -2519,6 +2519,8 @@ static const struct dpcd_quirk dpcd_quirk_list[] = {
> { OUI(0x00, 0x0C, 0xE7), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC) },
> /* Apple MacBookPro 2017 15 inch eDP Retina panel reports too low DP_MAX_LINK_RATE */
> { OUI(0x00, 0x10, 0xfa), DEVICE_ID(101, 68, 21, 101, 98, 97), false, BIT(DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS) },
> + /* Novatek panel */
> + { OUI(0x38, 0xEC, 0x11), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_HBR3_WITHOUT_TPS4) },
> };
>
> #undef OUI
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 97cf80372264..6c5debc8310d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -173,12 +173,53 @@ int intel_dp_link_symbol_clock(int rate)
> return DIV_ROUND_CLOSEST(rate * 10, intel_dp_link_symbol_size(rate));
> }
>
> +static bool detected_hbr3_tps4_quirk(struct intel_dp *intel_dp)
> +{
> + struct intel_connector *connector = intel_dp->attached_connector;
> + struct intel_display *display = to_intel_display(intel_dp);
> + struct drm_dp_aux *aux = &intel_dp->aux;
> + struct drm_dp_desc desc;
> +
> + if (drm_dp_read_desc(aux, &desc, drm_dp_is_branch(intel_dp->dpcd)) < 0)
> + return false;
> +
> + if (!drm_dp_has_quirk(&desc, DP_DPCD_QUIRK_HBR3_WITHOUT_TPS4))
> + return false;
> +
> + drm_dbg_kms(display->drm,
> + "[CONNECTOR:%d:%s] HBR3 without TPS4 quirk detected\n",
> + connector->base.base.id, connector->base.name);
> +
> + return true;
> +}
This function is unnecessary. It's just
drm_dp_has_quirk(&intel_dp->desc, ...) and that's it.
You already have the desc, no need to read it again, and the debug
logging is kind of excessive.
(We might want to add generic quirk detection debug logging in
drm_dp_get_quirks() but that's another matter.)
> +
> static int max_dprx_rate(struct intel_dp *intel_dp)
> {
> + struct intel_display *display = to_intel_display(intel_dp);
> + struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> + int max_rate;
> +
> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> - return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> + max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> + else
> + max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>
> - return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> + /*
> + * For DP TPS4 is a requirement for supporting HBR3, but for eDP its a
> + * bit ambiguous. Some broken eDP sinks declare support for HBR3 without
> + * TPS4, but are unable to produce a stable output. For these panels
> + * reject HBR3 when TPS4 is not available.
> + */
> + if (max_rate >= 810000 &&
> + !drm_dp_tps4_supported(intel_dp->dpcd) &&
> + detected_hbr3_tps4_quirk(intel_dp)) {
> + drm_dbg_kms(display->drm,
> + "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> + encoder->base.base.id, encoder->base.name);
> + max_rate = 540000;
> + }
All of this would be greatly simplified if you made the quirk just "max
rate is hbr2". The way this is defined now is complicated by the TPS4
stuff, and that's pretty much irrelevant for what the quirk actually
does, i.e. limits the max rate to 540000.
> +
> + return max_rate;
> }
>
> static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4254,6 +4295,9 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
> static void
> intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> {
> + struct intel_display *display = to_intel_display(intel_dp);
> + struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> +
> intel_dp->num_sink_rates = 0;
>
> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4264,10 +4308,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> sink_rates, sizeof(sink_rates));
>
> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> - int val = le16_to_cpu(sink_rates[i]);
> -
> - if (val == 0)
> - break;
> + int rate;
>
> /* Value read multiplied by 200kHz gives the per-lane
> * link rate in kHz. The source rates are, however,
> @@ -4275,7 +4316,26 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> * back to symbols is
> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
> */
> - intel_dp->sink_rates[i] = (val * 200) / 10;
> + rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> +
> + if (rate == 0)
> + break;
> + /*
> + * For DP TPS4 is a requirement for supporting HBR3, but for eDP its a
> + * bit ambiugous. Some broken eDP sinks declare support for HBR3 without
> + * TPS4, but are unable to produce a stable output. For these panels
> + * reject HBR3 when TPS4 is not available.
> + */
> + if (rate >= 810000 &&
> + !drm_dp_tps4_supported(intel_dp->dpcd) &&
> + detected_hbr3_tps4_quirk(intel_dp)) {
> + drm_dbg_kms(display->drm,
> + "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> + encoder->base.base.id, encoder->base.name);
> + break;
> + }
Ditto.
> +
> + intel_dp->sink_rates[i] = rate;
> }
> intel_dp->num_sink_rates = i;
> }
> diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
> index 7b19192c7031..8021e9db67f2 100644
> --- a/include/drm/display/drm_dp_helper.h
> +++ b/include/drm/display/drm_dp_helper.h
> @@ -809,6 +809,14 @@ enum drm_dp_quirk {
> * requires enabling DSC.
> */
> DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC,
> +
> + /**
> + * @DP_DPCD_QUIRK_HBR3_WITHOUT_TPS4:
> + *
> + * The device supports HBR3 without TPS4 but is unable to produce
> + * stable output.
> + */
> + DP_DPCD_QUIRK_HBR3_WITHOUT_TPS4,
Ditto.
> };
>
> /**
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-05-14 8:43 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-05-14 10:02 ` Jani Nikula
2025-05-14 10:47 ` Jani Nikula
0 siblings, 1 reply; 22+ messages in thread
From: Jani Nikula @ 2025-05-14 10:02 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe; +Cc: ville.syrjala, dri-devel
On Wed, 14 May 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>
> Some eDP panels support HBR3 but not TPS4 and rely on a fixed mode that
> requires HBR3. After the original commit, these panels go blank due to
> the rejection of HBR3.
>
> To restore functionality for such panels, this commit reverts the change.
Which panels? References? Bugs?
> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
This is a reference to a bug that got closed by the commit being
reverted. This now breaks it again, can't use the Closes: tag here.
Since the original commit was backported to stable, I think we're
probably going to be screwed if we do the revert + fix in two
steps. Maybe we want a fix in one go, and backport that to stable. Idk.
BR,
Jani.
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
> 1 file changed, 7 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 91a34d474463..97cf80372264 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -175,28 +175,10 @@ int intel_dp_link_symbol_clock(int rate)
>
> static int max_dprx_rate(struct intel_dp *intel_dp)
> {
> - struct intel_display *display = to_intel_display(intel_dp);
> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> - int max_rate;
> -
> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> - max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> - else
> - max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> + return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>
> - /*
> - * Some broken eDP sinks illegally declare support for
> - * HBR3 without TPS4, and are unable to produce a stable
> - * output. Reject HBR3 when TPS4 is not available.
> - */
> - if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> - drm_dbg_kms(display->drm,
> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> - encoder->base.base.id, encoder->base.name);
> - max_rate = 540000;
> - }
> -
> - return max_rate;
> + return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> }
>
> static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4272,9 +4254,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
> static void
> intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> {
> - struct intel_display *display = to_intel_display(intel_dp);
> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -
> intel_dp->num_sink_rates = 0;
>
> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4285,7 +4264,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> sink_rates, sizeof(sink_rates));
>
> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> - int rate;
> + int val = le16_to_cpu(sink_rates[i]);
> +
> + if (val == 0)
> + break;
>
> /* Value read multiplied by 200kHz gives the per-lane
> * link rate in kHz. The source rates are, however,
> @@ -4293,24 +4275,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> * back to symbols is
> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
> */
> - rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> -
> - if (rate == 0)
> - break;
> -
> - /*
> - * Some broken eDP sinks illegally declare support for
> - * HBR3 without TPS4, and are unable to produce a stable
> - * output. Reject HBR3 when TPS4 is not available.
> - */
> - if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> - drm_dbg_kms(display->drm,
> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> - encoder->base.base.id, encoder->base.name);
> - break;
> - }
> -
> - intel_dp->sink_rates[i] = rate;
> + intel_dp->sink_rates[i] = (val * 200) / 10;
> }
> intel_dp->num_sink_rates = i;
> }
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-05-14 10:02 ` Jani Nikula
@ 2025-05-14 10:47 ` Jani Nikula
2025-05-14 11:33 ` Nautiyal, Ankit K
0 siblings, 1 reply; 22+ messages in thread
From: Jani Nikula @ 2025-05-14 10:47 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe; +Cc: ville.syrjala, dri-devel
On Wed, 14 May 2025, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Wed, 14 May 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>>
>> Some eDP panels support HBR3 but not TPS4 and rely on a fixed mode that
>> requires HBR3. After the original commit, these panels go blank due to
>> the rejection of HBR3.
>>
>> To restore functionality for such panels, this commit reverts the change.
>
> Which panels? References? Bugs?
Regardless, on another reading of the specs, I think the commit being
reverted was misguided. TPS4 seems to be required for HBR3 on DPRX, but
not eDPRX.
BR,
Jani.
>
>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>
> This is a reference to a bug that got closed by the commit being
> reverted. This now breaks it again, can't use the Closes: tag here.
>
> Since the original commit was backported to stable, I think we're
> probably going to be screwed if we do the revert + fix in two
> steps. Maybe we want a fix in one go, and backport that to stable. Idk.
>
> BR,
> Jani.
>
>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>> 1 file changed, 7 insertions(+), 42 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 91a34d474463..97cf80372264 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -175,28 +175,10 @@ int intel_dp_link_symbol_clock(int rate)
>>
>> static int max_dprx_rate(struct intel_dp *intel_dp)
>> {
>> - struct intel_display *display = to_intel_display(intel_dp);
>> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> - int max_rate;
>> -
>> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
>> - max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>> - else
>> - max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> + return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>
>> - /*
>> - * Some broken eDP sinks illegally declare support for
>> - * HBR3 without TPS4, and are unable to produce a stable
>> - * output. Reject HBR3 when TPS4 is not available.
>> - */
>> - if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> - drm_dbg_kms(display->drm,
>> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> - encoder->base.base.id, encoder->base.name);
>> - max_rate = 540000;
>> - }
>> -
>> - return max_rate;
>> + return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> }
>>
>> static int max_dprx_lane_count(struct intel_dp *intel_dp)
>> @@ -4272,9 +4254,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>> static void
>> intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>> {
>> - struct intel_display *display = to_intel_display(intel_dp);
>> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> -
>> intel_dp->num_sink_rates = 0;
>>
>> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
>> @@ -4285,7 +4264,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>> sink_rates, sizeof(sink_rates));
>>
>> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
>> - int rate;
>> + int val = le16_to_cpu(sink_rates[i]);
>> +
>> + if (val == 0)
>> + break;
>>
>> /* Value read multiplied by 200kHz gives the per-lane
>> * link rate in kHz. The source rates are, however,
>> @@ -4293,24 +4275,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>> * back to symbols is
>> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>> */
>> - rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
>> -
>> - if (rate == 0)
>> - break;
>> -
>> - /*
>> - * Some broken eDP sinks illegally declare support for
>> - * HBR3 without TPS4, and are unable to produce a stable
>> - * output. Reject HBR3 when TPS4 is not available.
>> - */
>> - if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> - drm_dbg_kms(display->drm,
>> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> - encoder->base.base.id, encoder->base.name);
>> - break;
>> - }
>> -
>> - intel_dp->sink_rates[i] = rate;
>> + intel_dp->sink_rates[i] = (val * 200) / 10;
>> }
>> intel_dp->num_sink_rates = i;
>> }
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-05-14 10:47 ` Jani Nikula
@ 2025-05-14 11:33 ` Nautiyal, Ankit K
0 siblings, 0 replies; 22+ messages in thread
From: Nautiyal, Ankit K @ 2025-05-14 11:33 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala, dri-devel
On 5/14/2025 4:17 PM, Jani Nikula wrote:
> On Wed, 14 May 2025, Jani Nikula <jani.nikula@linux.intel.com> wrote:
>> On Wed, 14 May 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>>> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>>>
>>> Some eDP panels support HBR3 but not TPS4 and rely on a fixed mode that
>>> requires HBR3. After the original commit, these panels go blank due to
>>> the rejection of HBR3.
>>>
>>> To restore functionality for such panels, this commit reverts the change.
>> Which panels? References? Bugs?
> Regardless, on another reading of the specs, I think the commit being
> reverted was misguided. TPS4 seems to be required for HBR3 on DPRX, but
> not eDPRX.
Yeah TPS4_Supported bit seems to be not defined for eDP.
For the gitlab issue 5969 [1], the rejecting of HBR3 rate avoided the
10bpc which I guess is not supported for the panel mentioned in the issue.
From logs, the VBT had capped the bpp to 18, but GOP used 24 bpp. Edid
advertised support for 36 bpp.
Without the commit, 30 bpp gets picked up and the issue was seen.
With the commit (After rejecting HBR3) 24 bpp was used and the issue was
resolved.
I am wondering if we should limit bpp or the rate for the panel
mentioned in gitlab issue 5969[1].
Also should this be an i915 specific quirk? Or something like quirk
introduced in patch#2 [2] of the series?
[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
[2] https://patchwork.freedesktop.org/patch/653510/?series=149005&rev=1
Regards,
Ankit
>
>
> BR,
> Jani.
>
>>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>> This is a reference to a bug that got closed by the commit being
>> reverted. This now breaks it again, can't use the Closes: tag here.
>>
>> Since the original commit was backported to stable, I think we're
>> probably going to be screwed if we do the revert + fix in two
>> steps. Maybe we want a fix in one go, and backport that to stable. Idk.
>>
>> BR,
>> Jani.
>>
>>
>>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>>> 1 file changed, 7 insertions(+), 42 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>>> index 91a34d474463..97cf80372264 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>>> @@ -175,28 +175,10 @@ int intel_dp_link_symbol_clock(int rate)
>>>
>>> static int max_dprx_rate(struct intel_dp *intel_dp)
>>> {
>>> - struct intel_display *display = to_intel_display(intel_dp);
>>> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>>> - int max_rate;
>>> -
>>> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
>>> - max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>> - else
>>> - max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>>> + return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>>
>>> - /*
>>> - * Some broken eDP sinks illegally declare support for
>>> - * HBR3 without TPS4, and are unable to produce a stable
>>> - * output. Reject HBR3 when TPS4 is not available.
>>> - */
>>> - if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>>> - drm_dbg_kms(display->drm,
>>> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>>> - encoder->base.base.id, encoder->base.name);
>>> - max_rate = 540000;
>>> - }
>>> -
>>> - return max_rate;
>>> + return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>>> }
>>>
>>> static int max_dprx_lane_count(struct intel_dp *intel_dp)
>>> @@ -4272,9 +4254,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>>> static void
>>> intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>> {
>>> - struct intel_display *display = to_intel_display(intel_dp);
>>> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>>> -
>>> intel_dp->num_sink_rates = 0;
>>>
>>> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
>>> @@ -4285,7 +4264,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>> sink_rates, sizeof(sink_rates));
>>>
>>> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
>>> - int rate;
>>> + int val = le16_to_cpu(sink_rates[i]);
>>> +
>>> + if (val == 0)
>>> + break;
>>>
>>> /* Value read multiplied by 200kHz gives the per-lane
>>> * link rate in kHz. The source rates are, however,
>>> @@ -4293,24 +4275,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>> * back to symbols is
>>> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>>> */
>>> - rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
>>> -
>>> - if (rate == 0)
>>> - break;
>>> -
>>> - /*
>>> - * Some broken eDP sinks illegally declare support for
>>> - * HBR3 without TPS4, and are unable to produce a stable
>>> - * output. Reject HBR3 when TPS4 is not available.
>>> - */
>>> - if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>>> - drm_dbg_kms(display->drm,
>>> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>>> - encoder->base.base.id, encoder->base.name);
>>> - break;
>>> - }
>>> -
>>> - intel_dp->sink_rates[i] = rate;
>>> + intel_dp->sink_rates[i] = (val * 200) / 10;
>>> }
>>> intel_dp->num_sink_rates = i;
>>> }
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Add quirk for panels that support HBR3 without TPS4
2025-05-14 8:43 [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4 Ankit Nautiyal
2025-05-14 8:43 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-05-14 8:43 ` [PATCH 2/2] drm/dp: Add quirk for panel with HBR3 without TPS4 Ankit Nautiyal
@ 2025-05-14 11:56 ` Patchwork
2025-05-14 12:17 ` ✓ i915.CI.BAT: success " Patchwork
2025-05-14 20:55 ` ✓ i915.CI.Full: " Patchwork
4 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-05-14 11:56 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx
== Series Details ==
Series: Add quirk for panels that support HBR3 without TPS4
URL : https://patchwork.freedesktop.org/series/149005/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ i915.CI.BAT: success for Add quirk for panels that support HBR3 without TPS4
2025-05-14 8:43 [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4 Ankit Nautiyal
` (2 preceding siblings ...)
2025-05-14 11:56 ` ✗ Fi.CI.SPARSE: warning for Add quirk for panels that support " Patchwork
@ 2025-05-14 12:17 ` Patchwork
2025-05-14 20:55 ` ✓ i915.CI.Full: " Patchwork
4 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-05-14 12:17 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4543 bytes --]
== Series Details ==
Series: Add quirk for panels that support HBR3 without TPS4
URL : https://patchwork.freedesktop.org/series/149005/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16544 -> Patchwork_149005v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/index.html
Participating hosts (45 -> 44)
------------------------------
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_149005v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@dmabuf@all-tests:
- bat-apl-1: [PASS][1] -> [INCOMPLETE][2] ([i915#12904]) +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/bat-apl-1/igt@dmabuf@all-tests.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/bat-apl-1/igt@dmabuf@all-tests.html
* igt@kms_hdmi_inject@inject-audio:
- fi-tgl-1115g4: [PASS][3] -> [SKIP][4] ([i915#13030])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/fi-tgl-1115g4/igt@kms_hdmi_inject@inject-audio.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/fi-tgl-1115g4/igt@kms_hdmi_inject@inject-audio.html
#### Possible fixes ####
* igt@i915_selftest@live:
- bat-dg2-8: [ABORT][5] ([i915#13696]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/bat-dg2-8/igt@i915_selftest@live.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/bat-dg2-8/igt@i915_selftest@live.html
- bat-rplp-1: [ABORT][7] ([i915#13696]) -> [PASS][8] +1 other test pass
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/bat-rplp-1/igt@i915_selftest@live.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/bat-rplp-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@client:
- bat-dg2-8: [ABORT][9] ([i915#14201]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/bat-dg2-8/igt@i915_selftest@live@client.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/bat-dg2-8/igt@i915_selftest@live@client.html
* igt@i915_selftest@live@workarounds:
- bat-arlh-3: [DMESG-FAIL][11] ([i915#12061]) -> [PASS][12] +1 other test pass
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html
- bat-dg2-11: [DMESG-FAIL][13] ([i915#12061]) -> [PASS][14] +1 other test pass
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/bat-dg2-11/igt@i915_selftest@live@workarounds.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/bat-dg2-11/igt@i915_selftest@live@workarounds.html
- bat-mtlp-9: [DMESG-FAIL][15] ([i915#12061]) -> [PASS][16] +1 other test pass
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
- bat-arls-6: [DMESG-FAIL][17] ([i915#12061]) -> [PASS][18] +1 other test pass
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/bat-arls-6/igt@i915_selftest@live@workarounds.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/bat-arls-6/igt@i915_selftest@live@workarounds.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
[i915#13030]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13030
[i915#13696]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13696
[i915#14201]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14201
Build changes
-------------
* Linux: CI_DRM_16544 -> Patchwork_149005v1
CI-20190529: 20190529
CI_DRM_16544: 2e72fd09b4fb0823282977f0717159e47328a533 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8363: 58f45de87b977a0134e8deae8d2103c7a8ccd3fc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_149005v1: 2e72fd09b4fb0823282977f0717159e47328a533 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/index.html
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^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ i915.CI.Full: success for Add quirk for panels that support HBR3 without TPS4
2025-05-14 8:43 [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4 Ankit Nautiyal
` (3 preceding siblings ...)
2025-05-14 12:17 ` ✓ i915.CI.BAT: success " Patchwork
@ 2025-05-14 20:55 ` Patchwork
4 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-05-14 20:55 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx
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== Series Details ==
Series: Add quirk for panels that support HBR3 without TPS4
URL : https://patchwork.freedesktop.org/series/149005/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16544_full -> Patchwork_149005v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_149005v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@object-reloc-purge-cache:
- shard-dg2: NOTRUN -> [SKIP][1] ([i915#8411])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@api_intel_bb@object-reloc-purge-cache.html
* igt@gem_busy@semaphore:
- shard-mtlp: NOTRUN -> [SKIP][2] ([i915#3936])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_busy@semaphore.html
* igt@gem_ccs@block-copy-compressed:
- shard-rkl: NOTRUN -> [SKIP][3] ([i915#3555] / [i915#9323])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@gem_ccs@block-copy-compressed.html
* igt@gem_ccs@block-multicopy-compressed:
- shard-rkl: NOTRUN -> [SKIP][4] ([i915#9323]) +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@gem_ccs@block-multicopy-compressed.html
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0:
- shard-dg2: [PASS][5] -> [INCOMPLETE][6] ([i915#13356])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-4/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-7/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
* igt@gem_close_race@multigpu-basic-process:
- shard-mtlp: NOTRUN -> [SKIP][7] ([i915#7697])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-dg2-9: NOTRUN -> [SKIP][8] ([i915#7697])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-dg2: NOTRUN -> [ABORT][9] ([i915#13427])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-dg2-9: NOTRUN -> [SKIP][10] ([i915#8555])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_ctx_persistence@heartbeat-hostile.html
* igt@gem_ctx_persistence@heartbeat-many:
- shard-dg2: NOTRUN -> [SKIP][11] ([i915#8555])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@gem_ctx_persistence@heartbeat-many.html
* igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1:
- shard-dg2-9: NOTRUN -> [SKIP][12] ([i915#5882]) +7 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1.html
* igt@gem_ctx_sseu@engines:
- shard-mtlp: NOTRUN -> [SKIP][13] ([i915#280]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@gem_ctx_sseu@engines.html
* igt@gem_ctx_sseu@mmap-args:
- shard-dg2-9: NOTRUN -> [SKIP][14] ([i915#280])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_ctx_sseu@mmap-args.html
* igt@gem_eio@in-flight-contexts-immediate:
- shard-mtlp: [PASS][15] -> [ABORT][16] ([i915#13193] / [i915#13723]) +1 other test abort
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-mtlp-4/igt@gem_eio@in-flight-contexts-immediate.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-7/igt@gem_eio@in-flight-contexts-immediate.html
* igt@gem_exec_balancer@bonded-sync:
- shard-dg2-9: NOTRUN -> [SKIP][17] ([i915#4771])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_exec_balancer@bonded-sync.html
* igt@gem_exec_balancer@noheartbeat:
- shard-mtlp: NOTRUN -> [SKIP][18] ([i915#8555])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_exec_balancer@noheartbeat.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-rkl: NOTRUN -> [SKIP][19] ([i915#4525]) +3 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_balancer@sliced:
- shard-dg2: NOTRUN -> [SKIP][20] ([i915#4812]) +2 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_exec_balancer@sliced.html
- shard-rkl: [PASS][21] -> [DMESG-WARN][22] ([i915#12917] / [i915#12964])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-rkl-8/igt@gem_exec_balancer@sliced.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@gem_exec_balancer@sliced.html
* igt@gem_exec_capture@capture:
- shard-mtlp: NOTRUN -> [FAIL][23] ([i915#11965]) +1 other test fail
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-3/igt@gem_exec_capture@capture.html
* igt@gem_exec_capture@capture-invisible:
- shard-rkl: NOTRUN -> [SKIP][24] ([i915#6334]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@gem_exec_capture@capture-invisible.html
* igt@gem_exec_fence@submit:
- shard-mtlp: NOTRUN -> [SKIP][25] ([i915#4812])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_exec_fence@submit.html
* igt@gem_exec_flush@basic-uc-ro-default:
- shard-dg2-9: NOTRUN -> [SKIP][26] ([i915#3539] / [i915#4852])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_exec_flush@basic-uc-ro-default.html
* igt@gem_exec_flush@basic-wb-rw-default:
- shard-dg2: NOTRUN -> [SKIP][27] ([i915#3539] / [i915#4852])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_exec_flush@basic-wb-rw-default.html
* igt@gem_exec_reloc@basic-gtt-cpu-noreloc:
- shard-mtlp: NOTRUN -> [SKIP][28] ([i915#3281]) +5 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html
* igt@gem_exec_reloc@basic-gtt-read:
- shard-dg2-9: NOTRUN -> [SKIP][29] ([i915#3281]) +7 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_exec_reloc@basic-gtt-read.html
* igt@gem_exec_reloc@basic-gtt-read-active:
- shard-dg2: NOTRUN -> [SKIP][30] ([i915#3281]) +6 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_exec_reloc@basic-gtt-read-active.html
* igt@gem_exec_reloc@basic-scanout:
- shard-rkl: NOTRUN -> [SKIP][31] ([i915#3281]) +12 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@gem_exec_reloc@basic-scanout.html
* igt@gem_exec_schedule@preempt-queue-chain:
- shard-dg2: NOTRUN -> [SKIP][32] ([i915#4537] / [i915#4812])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_exec_schedule@preempt-queue-chain.html
* igt@gem_exec_schedule@reorder-wide:
- shard-mtlp: NOTRUN -> [SKIP][33] ([i915#4537] / [i915#4812])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_exec_schedule@reorder-wide.html
* igt@gem_fenced_exec_thrash@no-spare-fences-busy:
- shard-mtlp: NOTRUN -> [SKIP][34] ([i915#4860]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html
* igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
- shard-dg2-9: NOTRUN -> [SKIP][35] ([i915#4860])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html
* igt@gem_fenced_exec_thrash@too-many-fences:
- shard-dg2: NOTRUN -> [SKIP][36] ([i915#4860]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_fenced_exec_thrash@too-many-fences.html
* igt@gem_huc_copy@huc-copy:
- shard-rkl: NOTRUN -> [SKIP][37] ([i915#2190])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_evict@dontneed-evict-race:
- shard-rkl: NOTRUN -> [SKIP][38] ([i915#4613] / [i915#7582])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@gem_lmem_evict@dontneed-evict-race.html
* igt@gem_lmem_swapping@heavy-verify-multi:
- shard-mtlp: NOTRUN -> [SKIP][39] ([i915#4613]) +2 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_lmem_swapping@heavy-verify-multi.html
* igt@gem_lmem_swapping@massive-random:
- shard-glk: NOTRUN -> [SKIP][40] ([i915#4613])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-glk9/igt@gem_lmem_swapping@massive-random.html
* igt@gem_lmem_swapping@parallel-multi:
- shard-rkl: NOTRUN -> [SKIP][41] ([i915#4613]) +4 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@gem_lmem_swapping@parallel-multi.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg2: [PASS][42] -> [TIMEOUT][43] ([i915#5493]) +1 other test timeout
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-8/igt@gem_lmem_swapping@smem-oom@lmem0.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-6/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_madvise@dontneed-before-exec:
- shard-dg2-9: NOTRUN -> [SKIP][44] ([i915#3282]) +2 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_madvise@dontneed-before-exec.html
* igt@gem_media_vme:
- shard-dg2: NOTRUN -> [SKIP][45] ([i915#284])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_media_vme.html
* igt@gem_mmap_gtt@cpuset-big-copy:
- shard-dg2: NOTRUN -> [SKIP][46] ([i915#4077]) +6 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@gem_mmap_gtt@cpuset-big-copy.html
* igt@gem_mmap_gtt@fault-concurrent-x:
- shard-dg2-9: NOTRUN -> [SKIP][47] ([i915#4077]) +5 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_mmap_gtt@fault-concurrent-x.html
* igt@gem_mmap_gtt@fault-concurrent-y:
- shard-mtlp: NOTRUN -> [SKIP][48] ([i915#4077]) +7 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-3/igt@gem_mmap_gtt@fault-concurrent-y.html
* igt@gem_mmap_wc@invalid-flags:
- shard-dg2: NOTRUN -> [SKIP][49] ([i915#4083]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_mmap_wc@invalid-flags.html
* igt@gem_mmap_wc@read-write-distinct:
- shard-dg2-9: NOTRUN -> [SKIP][50] ([i915#4083]) +4 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_mmap_wc@read-write-distinct.html
* igt@gem_mmap_wc@set-cache-level:
- shard-mtlp: NOTRUN -> [SKIP][51] ([i915#4083]) +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_mmap_wc@set-cache-level.html
* igt@gem_pwrite@basic-exhaustion:
- shard-mtlp: NOTRUN -> [SKIP][52] ([i915#3282]) +1 other test skip
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@create-regular-context-2:
- shard-dg2-9: NOTRUN -> [SKIP][53] ([i915#4270]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_pxp@create-regular-context-2.html
* igt@gem_pxp@hw-rejects-pxp-buffer:
- shard-rkl: NOTRUN -> [TIMEOUT][54] ([i915#12917] / [i915#12964]) +1 other test timeout
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@gem_pxp@hw-rejects-pxp-buffer.html
* igt@gem_pxp@hw-rejects-pxp-context:
- shard-rkl: NOTRUN -> [SKIP][55] ([i915#13717])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@gem_pxp@hw-rejects-pxp-context.html
* igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-dg2: NOTRUN -> [SKIP][56] ([i915#4270]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_pxp@regular-baseline-src-copy-readible.html
- shard-rkl: NOTRUN -> [TIMEOUT][57] ([i915#12964]) +1 other test timeout
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@gem_pxp@regular-baseline-src-copy-readible.html
* igt@gem_pxp@reject-modify-context-protection-on:
- shard-rkl: [PASS][58] -> [TIMEOUT][59] ([i915#12917] / [i915#12964]) +1 other test timeout
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-rkl-8/igt@gem_pxp@reject-modify-context-protection-on.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-6/igt@gem_pxp@reject-modify-context-protection-on.html
* igt@gem_readwrite@new-obj:
- shard-dg2: NOTRUN -> [SKIP][60] ([i915#3282])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@gem_readwrite@new-obj.html
* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-dg2-9: NOTRUN -> [SKIP][61] ([i915#5190] / [i915#8428]) +2 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
* igt@gem_render_copy@y-tiled-ccs-to-y-tiled:
- shard-dg2: NOTRUN -> [SKIP][62] ([i915#5190] / [i915#8428]) +6 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_render_copy@y-tiled-ccs-to-y-tiled.html
* igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled:
- shard-mtlp: NOTRUN -> [SKIP][63] ([i915#8428]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled.html
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-dg2-9: NOTRUN -> [SKIP][64] ([i915#4079])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
* igt@gem_set_tiling_vs_blt@tiled-to-untiled:
- shard-rkl: NOTRUN -> [SKIP][65] ([i915#8411])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
* igt@gem_set_tiling_vs_pwrite:
- shard-rkl: NOTRUN -> [SKIP][66] ([i915#3282]) +10 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@gem_set_tiling_vs_pwrite.html
* igt@gem_softpin@evict-snoop:
- shard-dg2-9: NOTRUN -> [SKIP][67] ([i915#4885])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_softpin@evict-snoop.html
* igt@gem_tiled_pread_basic:
- shard-mtlp: NOTRUN -> [SKIP][68] ([i915#4079])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@gem_tiled_pread_basic.html
* igt@gem_userptr_blits@coherency-sync:
- shard-dg2-9: NOTRUN -> [SKIP][69] ([i915#3297])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_userptr_blits@coherency-sync.html
* igt@gem_userptr_blits@create-destroy-unsync:
- shard-dg2: NOTRUN -> [SKIP][70] ([i915#3297])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@gem_userptr_blits@create-destroy-unsync.html
- shard-rkl: NOTRUN -> [SKIP][71] ([i915#3297]) +4 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@gem_userptr_blits@create-destroy-unsync.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-rkl: NOTRUN -> [SKIP][72] ([i915#3297] / [i915#3323])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@forbidden-operations:
- shard-rkl: NOTRUN -> [SKIP][73] ([i915#3282] / [i915#3297])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@gem_userptr_blits@forbidden-operations.html
* igt@gem_userptr_blits@map-fixed-invalidate:
- shard-dg2: NOTRUN -> [SKIP][74] ([i915#3297] / [i915#4880])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@gem_userptr_blits@map-fixed-invalidate.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-dg2-9: NOTRUN -> [SKIP][75] ([i915#3297] / [i915#4880])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
* igt@gem_userptr_blits@relocations:
- shard-rkl: NOTRUN -> [SKIP][76] ([i915#3281] / [i915#3297])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@gem_userptr_blits@relocations.html
* igt@gem_userptr_blits@sd-probe:
- shard-dg2-9: NOTRUN -> [SKIP][77] ([i915#3297] / [i915#4958])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gem_userptr_blits@sd-probe.html
* igt@gem_userptr_blits@unsync-unmap-after-close:
- shard-mtlp: NOTRUN -> [SKIP][78] ([i915#3297])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_userptr_blits@unsync-unmap-after-close.html
* igt@gen7_exec_parse@chained-batch:
- shard-rkl: NOTRUN -> [SKIP][79] +23 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@gen7_exec_parse@chained-batch.html
* igt@gen9_exec_parse@bb-large:
- shard-dg2: NOTRUN -> [SKIP][80] ([i915#2856])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@gen9_exec_parse@bb-large.html
* igt@gen9_exec_parse@bb-oversize:
- shard-mtlp: NOTRUN -> [SKIP][81] ([i915#2856])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gen9_exec_parse@bb-oversize.html
* igt@gen9_exec_parse@bb-start-out:
- shard-rkl: NOTRUN -> [SKIP][82] ([i915#2527]) +5 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@gen9_exec_parse@bb-start-out.html
* igt@gen9_exec_parse@unaligned-access:
- shard-dg2-9: NOTRUN -> [SKIP][83] ([i915#2856]) +4 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_drm_fdinfo@all-busy-check-all:
- shard-mtlp: NOTRUN -> [SKIP][84] ([i915#14123])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@i915_drm_fdinfo@all-busy-check-all.html
* igt@i915_drm_fdinfo@busy-idle-check-all@ccs0:
- shard-dg2: NOTRUN -> [SKIP][85] ([i915#11527]) +7 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@i915_drm_fdinfo@busy-idle-check-all@ccs0.html
* igt@i915_drm_fdinfo@busy@vecs1:
- shard-dg2: NOTRUN -> [SKIP][86] ([i915#14073]) +7 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@i915_drm_fdinfo@busy@vecs1.html
* igt@i915_drm_fdinfo@most-busy-idle-check-all@vecs1:
- shard-dg2-9: NOTRUN -> [SKIP][87] ([i915#14073]) +7 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@i915_drm_fdinfo@most-busy-idle-check-all@vecs1.html
* igt@i915_drm_fdinfo@virtual-busy-hang:
- shard-dg2: NOTRUN -> [SKIP][88] ([i915#14118])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@i915_drm_fdinfo@virtual-busy-hang.html
* igt@i915_fb_tiling@basic-x-tiling:
- shard-dg2-9: NOTRUN -> [SKIP][89] ([i915#13786])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@i915_fb_tiling@basic-x-tiling.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0:
- shard-dg1: [PASS][90] -> [FAIL][91] ([i915#3591]) +1 other test fail
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html
* igt@i915_pm_rps@basic-api:
- shard-dg2-9: NOTRUN -> [SKIP][92] ([i915#11681] / [i915#6621])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@i915_pm_rps@basic-api.html
* igt@i915_pm_rps@min-max-config-loaded:
- shard-dg2: NOTRUN -> [SKIP][93] ([i915#11681] / [i915#6621])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@i915_pm_rps@min-max-config-loaded.html
* igt@i915_pm_rps@thresholds-idle-park:
- shard-mtlp: NOTRUN -> [SKIP][94] ([i915#11681])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-3/igt@i915_pm_rps@thresholds-idle-park.html
* igt@i915_power@sanity:
- shard-rkl: NOTRUN -> [SKIP][95] ([i915#7984])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@i915_power@sanity.html
* igt@i915_suspend@forcewake:
- shard-rkl: NOTRUN -> [INCOMPLETE][96] ([i915#4817]) +1 other test incomplete
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@i915_suspend@forcewake.html
* igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
- shard-dg2-9: NOTRUN -> [SKIP][97] ([i915#4212])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- shard-dg2: NOTRUN -> [SKIP][98] ([i915#4215] / [i915#5190])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@tile-pitch-mismatch:
- shard-mtlp: NOTRUN -> [SKIP][99] ([i915#4212])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-3/igt@kms_addfb_basic@tile-pitch-mismatch.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-dg2: NOTRUN -> [SKIP][100] ([i915#9531])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-dg2: [PASS][101] -> [FAIL][102] ([i915#5956])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-4/igt@kms_atomic_transition@plane-all-modeset-transition.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-7/igt@kms_atomic_transition@plane-all-modeset-transition.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-tglu: [PASS][103] -> [FAIL][104] ([i915#11808]) +1 other test fail
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-tglu-10/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-tglu-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-dg2-9: NOTRUN -> [SKIP][105] ([i915#1769] / [i915#3555])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [FAIL][106] ([i915#5956])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-7/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-180:
- shard-rkl: NOTRUN -> [SKIP][107] ([i915#5286]) +9 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-90:
- shard-dg2-9: NOTRUN -> [SKIP][108] +9 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][109] +4 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-180:
- shard-mtlp: NOTRUN -> [SKIP][110] +12 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-3/igt@kms_big_fb@y-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][111] ([i915#4538] / [i915#5190]) +7 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][112] ([i915#3638]) +2 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
- shard-dg2-9: NOTRUN -> [SKIP][113] ([i915#4538] / [i915#5190]) +5 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_big_fb@yf-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-mtlp: NOTRUN -> [SKIP][114] ([i915#6187]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-dg2-9: NOTRUN -> [SKIP][115] ([i915#5190])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#10307] / [i915#10434] / [i915#6095]) +6 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-4/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-mtlp: NOTRUN -> [SKIP][117] ([i915#12313])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs:
- shard-dg2-9: NOTRUN -> [SKIP][118] ([i915#10307] / [i915#6095]) +44 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][119] ([i915#6095]) +14 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-b-edp-1.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
- shard-rkl: NOTRUN -> [SKIP][120] ([i915#12313])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs:
- shard-dg2: NOTRUN -> [SKIP][121] ([i915#10307] / [i915#6095]) +135 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
- shard-dg2-9: NOTRUN -> [SKIP][122] ([i915#12313])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][123] ([i915#14098] / [i915#6095]) +48 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-dg2: NOTRUN -> [SKIP][124] ([i915#12805])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][125] ([i915#6095]) +12 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2:
- shard-dg2-9: NOTRUN -> [SKIP][126] ([i915#6095]) +9 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][127] ([i915#4423] / [i915#6095])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-14/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-4.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][128] ([i915#6095]) +41 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
- shard-dg2: NOTRUN -> [SKIP][129] ([i915#12313])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][130] ([i915#6095]) +154 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-13/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2: NOTRUN -> [SKIP][131] ([i915#13784])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][132] ([i915#13783]) +3 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-6/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html
* igt@kms_chamelium_color@ctm-negative:
- shard-glk: NOTRUN -> [SKIP][133] +20 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-glk9/igt@kms_chamelium_color@ctm-negative.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- shard-dg2-9: NOTRUN -> [SKIP][134] ([i915#11151] / [i915#7828]) +5 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@dp-hpd-for-each-pipe:
- shard-dg2: NOTRUN -> [SKIP][135] ([i915#11151] / [i915#7828]) +2 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html
* igt@kms_chamelium_hpd@hdmi-hpd-fast:
- shard-rkl: NOTRUN -> [SKIP][136] ([i915#11151] / [i915#7828]) +10 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_chamelium_hpd@hdmi-hpd-fast.html
* igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode:
- shard-mtlp: NOTRUN -> [SKIP][137] ([i915#11151] / [i915#7828]) +6 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-3/igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-rkl: NOTRUN -> [SKIP][138] ([i915#3116]) +1 other test skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_content_protection@dp-mst-type-1.html
- shard-dg2: NOTRUN -> [SKIP][139] ([i915#3299])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2: NOTRUN -> [SKIP][140] ([i915#9424])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_content_protection@lic-type-0.html
- shard-rkl: NOTRUN -> [SKIP][141] ([i915#9424])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@mei-interface:
- shard-dg2-9: NOTRUN -> [SKIP][142] ([i915#9424]) +1 other test skip
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@type1:
- shard-rkl: NOTRUN -> [SKIP][143] ([i915#7118] / [i915#9424]) +1 other test skip
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@kms_content_protection@type1.html
* igt@kms_content_protection@uevent:
- shard-mtlp: NOTRUN -> [SKIP][144] ([i915#6944] / [i915#9424])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-rkl: NOTRUN -> [SKIP][145] ([i915#13049]) +1 other test skip
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-rkl: NOTRUN -> [SKIP][146] ([i915#3555]) +7 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-mtlp: NOTRUN -> [SKIP][147] ([i915#13049])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-sliding-128x128@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [DMESG-WARN][148] ([i915#12964]) +11 other tests dmesg-warn
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_cursor_crc@cursor-sliding-128x128@pipe-b-hdmi-a-2.html
* igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [FAIL][149] ([i915#13566]) +4 other tests fail
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-2.html
* igt@kms_cursor_crc@cursor-sliding-max-size:
- shard-dg2: NOTRUN -> [SKIP][150] ([i915#3555]) +5 other tests skip
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_cursor_crc@cursor-sliding-max-size.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-dg2-9: NOTRUN -> [SKIP][151] ([i915#13046] / [i915#5354]) +3 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
- shard-dg2: NOTRUN -> [SKIP][152] ([i915#13046] / [i915#5354])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-rkl: NOTRUN -> [SKIP][153] ([i915#4103])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
- shard-dg2-9: NOTRUN -> [SKIP][154] ([i915#4103] / [i915#4213])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-mtlp: NOTRUN -> [SKIP][155] ([i915#9809]) +3 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-dg2: NOTRUN -> [SKIP][156] ([i915#4103] / [i915#4213])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_display_modes@extended-mode-basic:
- shard-dg2: NOTRUN -> [SKIP][157] ([i915#13691])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dp_aux_dev:
- shard-rkl: NOTRUN -> [SKIP][158] ([i915#1257])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_dp_aux_dev.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-rkl: NOTRUN -> [SKIP][159] ([i915#13707])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_draw_crc@draw-method-mmap-gtt:
- shard-dg2-9: NOTRUN -> [SKIP][160] ([i915#8812])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_draw_crc@draw-method-mmap-gtt.html
* igt@kms_dsc@dsc-basic:
- shard-dg2: NOTRUN -> [SKIP][161] ([i915#3555] / [i915#3840]) +1 other test skip
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_dsc@dsc-basic.html
- shard-rkl: NOTRUN -> [SKIP][162] ([i915#3555] / [i915#3840]) +1 other test skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-dg2-9: NOTRUN -> [SKIP][163] ([i915#3555] / [i915#3840]) +1 other test skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-dg2: NOTRUN -> [SKIP][164] ([i915#3840] / [i915#9053])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_fbcon_fbt@psr:
- shard-rkl: NOTRUN -> [SKIP][165] ([i915#3955])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@kms_fbcon_fbt@psr.html
* igt@kms_feature_discovery@chamelium:
- shard-mtlp: NOTRUN -> [SKIP][166] ([i915#4854])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-4x:
- shard-dg2-9: NOTRUN -> [SKIP][167] ([i915#1839])
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_feature_discovery@display-4x.html
* igt@kms_feature_discovery@psr1:
- shard-dg2-9: NOTRUN -> [SKIP][168] ([i915#658])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_feature_discovery@psr1.html
* igt@kms_feature_discovery@psr2:
- shard-rkl: NOTRUN -> [SKIP][169] ([i915#658])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ab-vga1-hdmi-a1:
- shard-snb: [PASS][170] -> [FAIL][171] ([i915#11832] / [i915#13734]) +1 other test fail
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-snb7/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ab-vga1-hdmi-a1.html
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-snb1/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ab-vga1-hdmi-a1.html
* igt@kms_flip@2x-flip-vs-wf_vblank:
- shard-dg2-9: NOTRUN -> [SKIP][172] ([i915#9934]) +3 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_flip@2x-flip-vs-wf_vblank.html
* igt@kms_flip@2x-plain-flip:
- shard-mtlp: NOTRUN -> [SKIP][173] ([i915#3637] / [i915#9934]) +5 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-rkl: NOTRUN -> [SKIP][174] ([i915#9934]) +9 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-dg2: NOTRUN -> [SKIP][175] ([i915#9934]) +2 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
- shard-mtlp: [PASS][176] -> [FAIL][177] ([i915#13734]) +1 other test fail
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-mtlp-2/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-4/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a1:
- shard-rkl: NOTRUN -> [FAIL][178] ([i915#13734])
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a1.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-hdmi-a1:
- shard-tglu: [PASS][179] -> [FAIL][180] ([i915#13734])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-tglu-4/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-hdmi-a1.html
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-tglu-7/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-dg2: NOTRUN -> [FAIL][181] ([i915#13027])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a3:
- shard-dg2: NOTRUN -> [FAIL][182] ([i915#14155])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a3.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][183] ([i915#2672]) +4 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
- shard-dg2-9: NOTRUN -> [SKIP][184] ([i915#2672] / [i915#3555] / [i915#5190])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-valid-mode:
- shard-dg2-9: NOTRUN -> [SKIP][185] ([i915#2672]) +1 other test skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
- shard-rkl: NOTRUN -> [SKIP][186] ([i915#2672] / [i915#3555]) +4 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
- shard-dg2-9: NOTRUN -> [SKIP][187] ([i915#2672] / [i915#3555])
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
- shard-dg2: NOTRUN -> [SKIP][188] ([i915#2672] / [i915#3555])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][189] ([i915#2672]) +1 other test skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-mtlp: NOTRUN -> [SKIP][190] ([i915#2672] / [i915#3555] / [i915#8813]) +1 other test skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
- shard-dg2: NOTRUN -> [SKIP][191] ([i915#2672] / [i915#3555] / [i915#5190])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][192] ([i915#1825]) +57 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-dg2-9: NOTRUN -> [SKIP][193] ([i915#5354]) +24 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt:
- shard-snb: [PASS][194] -> [SKIP][195]
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt.html
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][196] ([i915#8708])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][197] ([i915#8708]) +15 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2-9: NOTRUN -> [SKIP][198] ([i915#8708]) +9 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][199] ([i915#5354]) +12 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][200] ([i915#3023]) +34 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-rkl: NOTRUN -> [SKIP][201] ([i915#5439])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][202] ([i915#3458]) +10 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt:
- shard-mtlp: NOTRUN -> [SKIP][203] ([i915#1825]) +15 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-render:
- shard-dg2-9: NOTRUN -> [SKIP][204] ([i915#3458]) +12 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-render.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-rkl: NOTRUN -> [SKIP][205] ([i915#3555] / [i915#8228]) +1 other test skip
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@static-toggle:
- shard-dg2: NOTRUN -> [SKIP][206] ([i915#3555] / [i915#8228]) +1 other test skip
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_hdr@static-toggle.html
* igt@kms_hdr@static-toggle-dpms:
- shard-mtlp: NOTRUN -> [SKIP][207] ([i915#3555] / [i915#8228])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-6/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_joiner@basic-big-joiner:
- shard-rkl: NOTRUN -> [SKIP][208] ([i915#10656])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-dg2-9: NOTRUN -> [SKIP][209] ([i915#12339])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-rkl: NOTRUN -> [SKIP][210] ([i915#12388])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-dg2: NOTRUN -> [SKIP][211] ([i915#12339])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_joiner@invalid-modeset-ultra-joiner.html
- shard-rkl: NOTRUN -> [SKIP][212] ([i915#12339])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-mtlp: NOTRUN -> [SKIP][213] ([i915#13522])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- shard-rkl: NOTRUN -> [INCOMPLETE][214] ([i915#13476]) +1 other test incomplete
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-dg2-9: NOTRUN -> [SKIP][215] ([i915#13705])
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane@plane-panning-bottom-right-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][216] ([i915#13026]) +1 other test incomplete
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-glk9/igt@kms_plane@plane-panning-bottom-right-suspend.html
* igt@kms_plane_lowres@tiling-none:
- shard-mtlp: NOTRUN -> [SKIP][217] ([i915#11614] / [i915#3582]) +1 other test skip
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_plane_lowres@tiling-none.html
* igt@kms_plane_lowres@tiling-none@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][218] ([i915#10226] / [i915#11614] / [i915#3582]) +2 other tests skip
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html
* igt@kms_plane_lowres@tiling-y:
- shard-dg2: NOTRUN -> [SKIP][219] ([i915#8821])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_lowres@tiling-yf:
- shard-dg2-9: NOTRUN -> [SKIP][220] ([i915#3555] / [i915#8821])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-rkl: NOTRUN -> [SKIP][221] ([i915#13958])
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_multiple@tiling-4:
- shard-rkl: NOTRUN -> [SKIP][222] ([i915#14259])
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_plane_multiple@tiling-4.html
* igt@kms_plane_multiple@tiling-yf:
- shard-dg2-9: NOTRUN -> [SKIP][223] ([i915#14259])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-dg2-9: NOTRUN -> [SKIP][224] ([i915#13046] / [i915#5354] / [i915#9423])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-rkl: NOTRUN -> [SKIP][225] ([i915#6953])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers:
- shard-dg2-9: NOTRUN -> [SKIP][226] ([i915#12247] / [i915#9423])
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a:
- shard-rkl: NOTRUN -> [SKIP][227] ([i915#12247]) +20 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25:
- shard-rkl: NOTRUN -> [SKIP][228] ([i915#12247] / [i915#6953]) +1 other test skip
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_plane_scaling@planes-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b:
- shard-mtlp: NOTRUN -> [SKIP][229] ([i915#12247]) +11 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5:
- shard-mtlp: NOTRUN -> [SKIP][230] ([i915#12247] / [i915#6953]) +1 other test skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-6/igt@kms_plane_scaling@planes-downscale-factor-0-5.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75:
- shard-mtlp: NOTRUN -> [SKIP][231] ([i915#12247] / [i915#3555] / [i915#6953])
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_plane_scaling@planes-downscale-factor-0-75.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-rkl: NOTRUN -> [SKIP][232] ([i915#12247] / [i915#3555])
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25:
- shard-dg2-9: NOTRUN -> [SKIP][233] ([i915#12247] / [i915#6953] / [i915#9423])
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d:
- shard-dg2-9: NOTRUN -> [SKIP][234] ([i915#12247]) +7 other tests skip
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-dg2: NOTRUN -> [SKIP][235] ([i915#9685])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_pm_dc@dc3co-vpb-simulation.html
- shard-rkl: NOTRUN -> [SKIP][236] ([i915#9685])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc5-psr:
- shard-dg2-9: NOTRUN -> [SKIP][237] ([i915#9685]) +1 other test skip
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-mtlp: NOTRUN -> [SKIP][238] ([i915#3828])
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_dc@dc9-dpms:
- shard-rkl: [PASS][239] -> [SKIP][240] ([i915#4281])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-rkl-5/igt@kms_pm_dc@dc9-dpms.html
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-dg2: [PASS][241] -> [SKIP][242] ([i915#9340])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-8/igt@kms_pm_lpsp@kms-lpsp.html
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-6/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-rkl: NOTRUN -> [SKIP][243] ([i915#8430])
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@kms_pm_lpsp@screens-disabled.html
- shard-dg2: NOTRUN -> [SKIP][244] ([i915#8430])
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-rkl: NOTRUN -> [SKIP][245] ([i915#9519])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@i2c:
- shard-dg1: [PASS][246] -> [DMESG-WARN][247] ([i915#4423]) +1 other test dmesg-warn
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-17/igt@kms_pm_rpm@i2c.html
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-19/igt@kms_pm_rpm@i2c.html
- shard-dg2: [PASS][248] -> [FAIL][249] ([i915#8717])
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-1/igt@kms_pm_rpm@i2c.html
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-2/igt@kms_pm_rpm@i2c.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-dg2: NOTRUN -> [SKIP][250] ([i915#9519])
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2: [PASS][251] -> [SKIP][252] ([i915#9519])
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: [PASS][253] -> [SKIP][254] ([i915#9519])
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@pm-caching:
- shard-rkl: [PASS][255] -> [DMESG-WARN][256] ([i915#12964]) +13 other tests dmesg-warn
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-rkl-8/igt@kms_pm_rpm@pm-caching.html
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-6/igt@kms_pm_rpm@pm-caching.html
* igt@kms_prime@basic-crc-vgem:
- shard-dg2-9: NOTRUN -> [SKIP][257] ([i915#6524] / [i915#6805]) +1 other test skip
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_prime@basic-crc-vgem.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-rkl: NOTRUN -> [SKIP][258] ([i915#6524])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_properties@get_properties-sanity-atomic:
- shard-rkl: NOTRUN -> [FAIL][259] ([i915#14036])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_properties@get_properties-sanity-atomic.html
* igt@kms_properties@get_properties-sanity-non-atomic:
- shard-mtlp: NOTRUN -> [FAIL][260] ([i915#14036])
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_properties@get_properties-sanity-non-atomic.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
- shard-dg2-9: NOTRUN -> [SKIP][261] ([i915#11520]) +5 other tests skip
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
- shard-mtlp: NOTRUN -> [SKIP][262] ([i915#12316]) +5 other tests skip
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
- shard-dg2: NOTRUN -> [SKIP][263] ([i915#11520]) +5 other tests skip
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
- shard-glk: NOTRUN -> [SKIP][264] ([i915#11520]) +1 other test skip
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-glk9/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][265] ([i915#9808])
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
- shard-rkl: NOTRUN -> [SKIP][266] ([i915#11520]) +11 other tests skip
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-rkl: NOTRUN -> [SKIP][267] ([i915#9683])
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-pr-cursor-render:
- shard-mtlp: NOTRUN -> [SKIP][268] ([i915#9688]) +5 other tests skip
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@kms_psr@fbc-pr-cursor-render.html
* igt@kms_psr@fbc-pr-primary-render:
- shard-dg2: NOTRUN -> [SKIP][269] ([i915#1072] / [i915#9732]) +12 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_psr@fbc-pr-primary-render.html
* igt@kms_psr@fbc-psr2-sprite-render:
- shard-rkl: NOTRUN -> [SKIP][270] ([i915#1072] / [i915#9732]) +34 other tests skip
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@kms_psr@fbc-psr2-sprite-render.html
* igt@kms_psr@psr-cursor-mmap-cpu:
- shard-dg2-9: NOTRUN -> [SKIP][271] ([i915#1072] / [i915#9732]) +13 other tests skip
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_psr@psr-cursor-mmap-cpu.html
* igt@kms_psr@psr-sprite-mmap-gtt@edp-1:
- shard-mtlp: NOTRUN -> [SKIP][272] ([i915#4077] / [i915#9688]) +1 other test skip
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_psr@psr-sprite-mmap-gtt@edp-1.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-rkl: NOTRUN -> [SKIP][273] ([i915#5289]) +2 other tests skip
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-mtlp: NOTRUN -> [SKIP][274] ([i915#12755])
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-dg2: NOTRUN -> [SKIP][275] ([i915#12755])
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-dg2-9: NOTRUN -> [SKIP][276] ([i915#3555]) +2 other tests skip
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-mtlp: NOTRUN -> [SKIP][277] ([i915#3555] / [i915#8809])
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-9: NOTRUN -> [SKIP][278] ([i915#8623])
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-rkl: NOTRUN -> [SKIP][279] ([i915#8623])
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@flip-basic-fastset:
- shard-rkl: NOTRUN -> [SKIP][280] ([i915#9906])
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_writeback@writeback-check-output:
- shard-rkl: NOTRUN -> [SKIP][281] ([i915#2437]) +1 other test skip
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@kms_writeback@writeback-check-output.html
* igt@kms_writeback@writeback-check-output-xrgb2101010:
- shard-dg2: NOTRUN -> [SKIP][282] ([i915#2437] / [i915#9412])
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_writeback@writeback-check-output-xrgb2101010.html
* igt@kms_writeback@writeback-fb-id:
- shard-dg2: NOTRUN -> [SKIP][283] ([i915#2437])
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-3/igt@kms_writeback@writeback-fb-id.html
* igt@kms_writeback@writeback-fb-id-xrgb2101010:
- shard-dg2-9: NOTRUN -> [SKIP][284] ([i915#2437] / [i915#9412])
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
* igt@perf@global-sseu-config-invalid:
- shard-dg2-9: NOTRUN -> [SKIP][285] ([i915#7387])
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@perf@global-sseu-config-invalid.html
* igt@perf@per-context-mode-unprivileged:
- shard-rkl: NOTRUN -> [SKIP][286] ([i915#2435])
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@perf@per-context-mode-unprivileged.html
* igt@perf@unprivileged-single-ctx-counters:
- shard-rkl: NOTRUN -> [SKIP][287] ([i915#2433])
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@perf@unprivileged-single-ctx-counters.html
* igt@perf_pmu@busy-double-start@vecs1:
- shard-dg2-9: NOTRUN -> [FAIL][288] ([i915#4349]) +4 other tests fail
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@perf_pmu@busy-double-start@vecs1.html
* igt@perf_pmu@rc6-all-gts:
- shard-rkl: NOTRUN -> [SKIP][289] ([i915#8516])
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@perf_pmu@rc6-all-gts.html
* igt@prime_vgem@basic-fence-mmap:
- shard-dg2-9: NOTRUN -> [SKIP][290] ([i915#3708] / [i915#4077])
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-read:
- shard-dg2: NOTRUN -> [SKIP][291] ([i915#3291] / [i915#3708])
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@prime_vgem@basic-read.html
- shard-rkl: NOTRUN -> [SKIP][292] ([i915#3291] / [i915#3708])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-5/igt@prime_vgem@basic-read.html
* igt@prime_vgem@coherency-gtt:
- shard-rkl: NOTRUN -> [SKIP][293] ([i915#3708]) +2 other tests skip
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@prime_vgem@coherency-gtt.html
* igt@prime_vgem@fence-flip-hang:
- shard-dg2: NOTRUN -> [SKIP][294] ([i915#3708])
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-8/igt@prime_vgem@fence-flip-hang.html
* igt@sriov_basic@bind-unbind-vf:
- shard-rkl: NOTRUN -> [SKIP][295] ([i915#9917])
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-3/igt@sriov_basic@bind-unbind-vf.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-dg2-9: NOTRUN -> [SKIP][296] ([i915#9917])
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-9/igt@sriov_basic@enable-vfs-autoprobe-off.html
#### Possible fixes ####
* igt@gem_exec_schedule@noreorder-corked@vecs0:
- shard-rkl: [DMESG-WARN][297] ([i915#12964]) -> [PASS][298] +9 other tests pass
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-rkl-5/igt@gem_exec_schedule@noreorder-corked@vecs0.html
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@gem_exec_schedule@noreorder-corked@vecs0.html
* igt@gem_pxp@reject-modify-context-protection-off-1:
- shard-rkl: [TIMEOUT][299] ([i915#12917] / [i915#12964]) -> [PASS][300]
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-rkl-4/igt@gem_pxp@reject-modify-context-protection-off-1.html
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-8/igt@gem_pxp@reject-modify-context-protection-off-1.html
* igt@gem_workarounds@reset:
- shard-mtlp: [ABORT][301] ([i915#13193] / [i915#13723]) -> [PASS][302] +3 other tests pass
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-mtlp-7/igt@gem_workarounds@reset.html
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@gem_workarounds@reset.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0:
- shard-dg1: [FAIL][303] ([i915#3591]) -> [PASS][304]
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-dg1: [DMESG-WARN][305] ([i915#4391] / [i915#4423]) -> [PASS][306]
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-15/igt@i915_suspend@basic-s3-without-i915.html
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-15/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180:
- shard-mtlp: [FAIL][307] ([i915#5138]) -> [PASS][308]
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
- shard-rkl: [INCOMPLETE][309] ([i915#12796]) -> [PASS][310]
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-4/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
* igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions:
- shard-dg1: [DMESG-WARN][311] ([i915#4423]) -> [PASS][312] +2 other tests pass
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-12/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions.html
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-16/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
- shard-snb: [SKIP][313] -> [PASS][314] +1 other test pass
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-snb7/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-snb1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-dg2: [SKIP][315] ([i915#13707]) -> [PASS][316]
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-4/igt@kms_dp_linktrain_fallback@dp-fallback.html
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-11/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_flip@modeset-vs-vblank-race@b-hdmi-a1:
- shard-tglu: [FAIL][317] ([i915#10826]) -> [PASS][318] +1 other test pass
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-tglu-7/igt@kms_flip@modeset-vs-vblank-race@b-hdmi-a1.html
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-tglu-3/igt@kms_flip@modeset-vs-vblank-race@b-hdmi-a1.html
* igt@kms_flip@plain-flip-ts-check:
- shard-tglu: [FAIL][319] ([i915#13734]) -> [PASS][320] +1 other test pass
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-tglu-7/igt@kms_flip@plain-flip-ts-check.html
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-tglu-3/igt@kms_flip@plain-flip-ts-check.html
* igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-dg2: [SKIP][321] ([i915#9519]) -> [PASS][322] +1 other test pass
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-4/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-11/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@perf_pmu@module-unload:
- shard-mtlp: [INCOMPLETE][323] ([i915#13520]) -> [PASS][324]
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-mtlp-3/igt@perf_pmu@module-unload.html
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-mtlp-2/igt@perf_pmu@module-unload.html
#### Warnings ####
* igt@gem_exec_capture@userptr:
- shard-dg1: [FAIL][325] ([i915#14217]) -> [FAIL][326] ([i915#14214]) +1 other test fail
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-14/igt@gem_exec_capture@userptr.html
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-13/igt@gem_exec_capture@userptr.html
* igt@i915_pm_rpm@system-suspend:
- shard-glk: [INCOMPLETE][327] ([i915#12797]) -> [INCOMPLETE][328] ([i915#12797] / [i915#14248])
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-glk1/igt@i915_pm_rpm@system-suspend.html
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-glk9/igt@i915_pm_rpm@system-suspend.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: [SKIP][329] ([i915#6095]) -> [SKIP][330] ([i915#14098] / [i915#6095]) +7 other tests skip
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-rkl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2.html
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
- shard-dg1: [SKIP][331] ([i915#6095]) -> [SKIP][332] ([i915#4423] / [i915#6095])
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-12/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-14/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
* igt@kms_chamelium_edid@dp-edid-change-during-suspend:
- shard-dg1: [SKIP][333] ([i915#11151] / [i915#4423] / [i915#7828]) -> [SKIP][334] ([i915#11151] / [i915#7828])
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-14/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-13/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
* igt@kms_content_protection@mei-interface:
- shard-dg1: [SKIP][335] ([i915#9433]) -> [SKIP][336] ([i915#9424])
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-12/igt@kms_content_protection@mei-interface.html
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-14/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@type1:
- shard-dg2: [SKIP][337] ([i915#7118] / [i915#9424]) -> [SKIP][338] ([i915#7118] / [i915#7162] / [i915#9424])
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-5/igt@kms_content_protection@type1.html
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-11/igt@kms_content_protection@type1.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
- shard-dg2: [SKIP][339] ([i915#3458]) -> [SKIP][340] ([i915#10433] / [i915#3458])
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-suspend:
- shard-dg2: [SKIP][341] ([i915#10433] / [i915#3458]) -> [SKIP][342] ([i915#3458]) +1 other test skip
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
* igt@kms_hdr@brightness-with-hdr:
- shard-dg2: [SKIP][343] ([i915#12713]) -> [SKIP][344] ([i915#13331])
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg2-4/igt@kms_hdr@brightness-with-hdr.html
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg2-11/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-dg1: [SKIP][345] ([i915#13958] / [i915#4423]) -> [SKIP][346] ([i915#13958])
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16544/shard-dg1-13/igt@kms_plane_multiple@2x-tiling-none.html
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/shard-dg1-18/igt@kms_plane_multiple@2x-tiling-none.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10226]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10226
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11527
[i915#11614]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11614
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#11808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11808
[i915#11832]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11832
[i915#11965]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11965
[i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
[i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
[i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
[i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12796]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12796
[i915#12797]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12797
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
[i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
[i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026
[i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13193
[i915#13331]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13331
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13427]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13427
[i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
[i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
[i915#13522]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13522
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
[i915#13705]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13705
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13717
[i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
[i915#13734]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13734
[i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
[i915#13784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13784
[i915#13786]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13786
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14036]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14036
[i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
[i915#14123]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14123
[i915#14155]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14155
[i915#14214]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14214
[i915#14217]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14217
[i915#14248]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14248
[i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
[i915#2435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2435
[i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3582
[i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#3936]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3936
[i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
[i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
[i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
[i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
[i915#4958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4958
[i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
[i915#5882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5882
[i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6187
[i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
[i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7162]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7162
[i915#7387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7387
[i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
[i915#8717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8717
[i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
[i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
[i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
[i915#8821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8821
[i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
[i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
[i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
[i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
[i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
[i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_16544 -> Patchwork_149005v1
CI-20190529: 20190529
CI_DRM_16544: 2e72fd09b4fb0823282977f0717159e47328a533 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8363: 58f45de87b977a0134e8deae8d2103c7a8ccd3fc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_149005v1: 2e72fd09b4fb0823282977f0717159e47328a533 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149005v1/index.html
[-- Attachment #2: Type: text/html, Size: 122183 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-06-10 10:04 [PATCH 0/2] Add kernel param to limit the eDP rate to HBR2 Ankit Nautiyal
@ 2025-06-10 10:04 ` Ankit Nautiyal
2025-06-10 12:15 ` Jani Nikula
0 siblings, 1 reply; 22+ messages in thread
From: Ankit Nautiyal @ 2025-06-10 10:04 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula
This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
not support TPS4. While this was intended to address instability observed
on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
and not for eDPRX.
This change inadvertently causes blank screens on some eDP panels that do
not advertise TPS4 support, and require HBR3 to operate at their fixed
native resolution.
Revert the commit to restore functionality for such panels.
[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
1 file changed, 7 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 208a953b04a2..2a0b76ae33cd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -174,28 +174,10 @@ int intel_dp_link_symbol_clock(int rate)
static int max_dprx_rate(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
- int max_rate;
-
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
- max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- else
- max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+ return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- max_rate = 540000;
- }
-
- return max_rate;
+ return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
}
static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4271,9 +4253,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
static void
intel_edp_set_sink_rates(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
intel_dp->num_sink_rates = 0;
if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4284,7 +4263,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
sink_rates, sizeof(sink_rates));
for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
- int rate;
+ int val = le16_to_cpu(sink_rates[i]);
+
+ if (val == 0)
+ break;
/* Value read multiplied by 200kHz gives the per-lane
* link rate in kHz. The source rates are, however,
@@ -4292,24 +4274,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
* back to symbols is
* (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
*/
- rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
- if (rate == 0)
- break;
-
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- break;
- }
-
- intel_dp->sink_rates[i] = rate;
+ intel_dp->sink_rates[i] = (val * 200) / 10;
}
intel_dp->num_sink_rates = i;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-06-10 10:04 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-06-10 12:15 ` Jani Nikula
0 siblings, 0 replies; 22+ messages in thread
From: Jani Nikula @ 2025-06-10 12:15 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe; +Cc: ville.syrjala
On Tue, 10 Jun 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> not support TPS4. While this was intended to address instability observed
> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> and not for eDPRX.
>
> This change inadvertently causes blank screens on some eDP panels that do
> not advertise TPS4 support, and require HBR3 to operate at their fixed
> native resolution.
>
> Revert the commit to restore functionality for such panels.
>
> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
On the revert,
Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
> 1 file changed, 7 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 208a953b04a2..2a0b76ae33cd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -174,28 +174,10 @@ int intel_dp_link_symbol_clock(int rate)
>
> static int max_dprx_rate(struct intel_dp *intel_dp)
> {
> - struct intel_display *display = to_intel_display(intel_dp);
> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> - int max_rate;
> -
> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> - max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> - else
> - max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> + return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>
> - /*
> - * Some broken eDP sinks illegally declare support for
> - * HBR3 without TPS4, and are unable to produce a stable
> - * output. Reject HBR3 when TPS4 is not available.
> - */
> - if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> - drm_dbg_kms(display->drm,
> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> - encoder->base.base.id, encoder->base.name);
> - max_rate = 540000;
> - }
> -
> - return max_rate;
> + return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> }
>
> static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4271,9 +4253,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
> static void
> intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> {
> - struct intel_display *display = to_intel_display(intel_dp);
> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -
> intel_dp->num_sink_rates = 0;
>
> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4284,7 +4263,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> sink_rates, sizeof(sink_rates));
>
> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> - int rate;
> + int val = le16_to_cpu(sink_rates[i]);
> +
> + if (val == 0)
> + break;
>
> /* Value read multiplied by 200kHz gives the per-lane
> * link rate in kHz. The source rates are, however,
> @@ -4292,24 +4274,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> * back to symbols is
> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
> */
> - rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> -
> - if (rate == 0)
> - break;
> -
> - /*
> - * Some broken eDP sinks illegally declare support for
> - * HBR3 without TPS4, and are unable to produce a stable
> - * output. Reject HBR3 when TPS4 is not available.
> - */
> - if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> - drm_dbg_kms(display->drm,
> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> - encoder->base.base.id, encoder->base.name);
> - break;
> - }
> -
> - intel_dp->sink_rates[i] = rate;
> + intel_dp->sink_rates[i] = (val * 200) / 10;
> }
> intel_dp->num_sink_rates = i;
> }
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
@ 2025-06-20 12:44 ` Ankit Nautiyal
2025-06-23 14:42 ` Ville Syrjälä
0 siblings, 1 reply; 22+ messages in thread
From: Ankit Nautiyal @ 2025-06-20 12:44 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jani.nikula, Ankit Nautiyal, Jani Nikula
This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
not support TPS4. While this was intended to address instability observed
on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
and not for eDPRX.
This change inadvertently causes blank screens on some eDP panels that do
not advertise TPS4 support, and require HBR3 to operate at their fixed
native resolution.
Revert the commit to restore functionality for such panels.
[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
1 file changed, 7 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 277b40b13948..74f331ae97ff 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
static int max_dprx_rate(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
- int max_rate;
-
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
- max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- else
- max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+ return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- max_rate = 540000;
- }
-
- return max_rate;
+ return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
}
static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4270,9 +4252,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
static void
intel_edp_set_sink_rates(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
intel_dp->num_sink_rates = 0;
if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4283,7 +4262,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
sink_rates, sizeof(sink_rates));
for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
- int rate;
+ int val = le16_to_cpu(sink_rates[i]);
+
+ if (val == 0)
+ break;
/* Value read multiplied by 200kHz gives the per-lane
* link rate in kHz. The source rates are, however,
@@ -4291,24 +4273,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
* back to symbols is
* (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
*/
- rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
- if (rate == 0)
- break;
-
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- break;
- }
-
- intel_dp->sink_rates[i] = rate;
+ intel_dp->sink_rates[i] = (val * 200) / 10;
}
intel_dp->num_sink_rates = i;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-06-20 12:44 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-06-23 14:42 ` Ville Syrjälä
2025-06-24 4:40 ` Nautiyal, Ankit K
0 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjälä @ 2025-06-23 14:42 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula
On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> not support TPS4. While this was intended to address instability observed
> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> and not for eDPRX.
I see no exception given for eDP regarding this rule. The only exception
allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
claim that these eDP sinks are violating the spec.
>
> This change inadvertently causes blank screens on some eDP panels that do
> not advertise TPS4 support, and require HBR3 to operate at their fixed
> native resolution.
>
> Revert the commit to restore functionality for such panels.
>
> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
> 1 file changed, 7 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 277b40b13948..74f331ae97ff 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
>
> static int max_dprx_rate(struct intel_dp *intel_dp)
> {
> - struct intel_display *display = to_intel_display(intel_dp);
> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> - int max_rate;
> -
> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> - max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> - else
> - max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> + return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>
> - /*
> - * Some broken eDP sinks illegally declare support for
> - * HBR3 without TPS4, and are unable to produce a stable
> - * output. Reject HBR3 when TPS4 is not available.
> - */
> - if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> - drm_dbg_kms(display->drm,
> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> - encoder->base.base.id, encoder->base.name);
> - max_rate = 540000;
> - }
> -
> - return max_rate;
> + return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> }
>
> static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4270,9 +4252,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
> static void
> intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> {
> - struct intel_display *display = to_intel_display(intel_dp);
> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -
> intel_dp->num_sink_rates = 0;
>
> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4283,7 +4262,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> sink_rates, sizeof(sink_rates));
>
> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> - int rate;
> + int val = le16_to_cpu(sink_rates[i]);
> +
> + if (val == 0)
> + break;
>
> /* Value read multiplied by 200kHz gives the per-lane
> * link rate in kHz. The source rates are, however,
> @@ -4291,24 +4273,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> * back to symbols is
> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
> */
> - rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> -
> - if (rate == 0)
> - break;
> -
> - /*
> - * Some broken eDP sinks illegally declare support for
> - * HBR3 without TPS4, and are unable to produce a stable
> - * output. Reject HBR3 when TPS4 is not available.
> - */
> - if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> - drm_dbg_kms(display->drm,
> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> - encoder->base.base.id, encoder->base.name);
> - break;
> - }
> -
> - intel_dp->sink_rates[i] = rate;
> + intel_dp->sink_rates[i] = (val * 200) / 10;
> }
> intel_dp->num_sink_rates = i;
> }
> --
> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-06-23 14:42 ` Ville Syrjälä
@ 2025-06-24 4:40 ` Nautiyal, Ankit K
2025-06-24 16:49 ` Ville Syrjälä
0 siblings, 1 reply; 22+ messages in thread
From: Nautiyal, Ankit K @ 2025-06-24 4:40 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula
On 6/23/2025 8:12 PM, Ville Syrjälä wrote:
> On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
>> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
>> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
>> not support TPS4. While this was intended to address instability observed
>> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
>> and not for eDPRX.
> I see no exception given for eDP regarding this rule. The only exception
> allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
> claim that these eDP sinks are violating the spec.
Hmm.. Yes the spec allows eDP sinks to report DPCD_REV=1.4 and
TPS4_SUPPORTED, so perhaps eDPs claiming HBR3 with DPCD rev other than
rev 1.4 and not supporting TPS4 are indeed violating the spec.
Would it make sense to add a condition that checks for DPCD_REV=1.4.
Specifically:
if DPCD_REV=1.4 and TPS4_SUPPORTED = 0, then do not prune the HBR3 rate?
Or otherway if DPCD_REV!=1.4 and TPS4_SUPPORTER = 0, prune the HBR3 rate
This way the patch need not be reverted, but modified to address
instability issues for eDP panels that are not aligned with the spec.
That said, the gitlab issue#5969 [1] will still need another solution
since it seems to have DPCD rev 14 as per logs:
DPCD: 14 1e 44 41 00 00 01 80 02 00 02 00 00 0b 80
Regards,
Ankit
>
>> This change inadvertently causes blank screens on some eDP panels that do
>> not advertise TPS4 support, and require HBR3 to operate at their fixed
>> native resolution.
>>
>> Revert the commit to restore functionality for such panels.
>>
>> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>> 1 file changed, 7 insertions(+), 42 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 277b40b13948..74f331ae97ff 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
>>
>> static int max_dprx_rate(struct intel_dp *intel_dp)
>> {
>> - struct intel_display *display = to_intel_display(intel_dp);
>> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> - int max_rate;
>> -
>> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
>> - max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>> - else
>> - max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> + return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>
>> - /*
>> - * Some broken eDP sinks illegally declare support for
>> - * HBR3 without TPS4, and are unable to produce a stable
>> - * output. Reject HBR3 when TPS4 is not available.
>> - */
>> - if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> - drm_dbg_kms(display->drm,
>> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> - encoder->base.base.id, encoder->base.name);
>> - max_rate = 540000;
>> - }
>> -
>> - return max_rate;
>> + return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> }
>>
>> static int max_dprx_lane_count(struct intel_dp *intel_dp)
>> @@ -4270,9 +4252,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>> static void
>> intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>> {
>> - struct intel_display *display = to_intel_display(intel_dp);
>> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> -
>> intel_dp->num_sink_rates = 0;
>>
>> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
>> @@ -4283,7 +4262,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>> sink_rates, sizeof(sink_rates));
>>
>> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
>> - int rate;
>> + int val = le16_to_cpu(sink_rates[i]);
>> +
>> + if (val == 0)
>> + break;
>>
>> /* Value read multiplied by 200kHz gives the per-lane
>> * link rate in kHz. The source rates are, however,
>> @@ -4291,24 +4273,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>> * back to symbols is
>> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>> */
>> - rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
>> -
>> - if (rate == 0)
>> - break;
>> -
>> - /*
>> - * Some broken eDP sinks illegally declare support for
>> - * HBR3 without TPS4, and are unable to produce a stable
>> - * output. Reject HBR3 when TPS4 is not available.
>> - */
>> - if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> - drm_dbg_kms(display->drm,
>> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> - encoder->base.base.id, encoder->base.name);
>> - break;
>> - }
>> -
>> - intel_dp->sink_rates[i] = rate;
>> + intel_dp->sink_rates[i] = (val * 200) / 10;
>> }
>> intel_dp->num_sink_rates = i;
>> }
>> --
>> 2.45.2
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-06-24 4:40 ` Nautiyal, Ankit K
@ 2025-06-24 16:49 ` Ville Syrjälä
2025-06-25 8:18 ` Jani Nikula
0 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjälä @ 2025-06-24 16:49 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula
On Tue, Jun 24, 2025 at 10:10:53AM +0530, Nautiyal, Ankit K wrote:
>
> On 6/23/2025 8:12 PM, Ville Syrjälä wrote:
> > On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
> >> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> >> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> >> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> >> not support TPS4. While this was intended to address instability observed
> >> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> >> and not for eDPRX.
> > I see no exception given for eDP regarding this rule. The only exception
> > allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
> > claim that these eDP sinks are violating the spec.
>
> Hmm.. Yes the spec allows eDP sinks to report DPCD_REV=1.4 and
> TPS4_SUPPORTED, so perhaps eDPs claiming HBR3 with DPCD rev other than
> rev 1.4 and not supporting TPS4 are indeed violating the spec.
>
> Would it make sense to add a condition that checks for DPCD_REV=1.4.
>
> Specifically:
>
> if DPCD_REV=1.4 and TPS4_SUPPORTED = 0, then do not prune the HBR3 rate?
>
> Or otherway if DPCD_REV!=1.4 and TPS4_SUPPORTER = 0, prune the HBR3 rate
>
> This way the patch need not be reverted, but modified to address
> instability issues for eDP panels that are not aligned with the spec.
>
> That said, the gitlab issue#5969 [1] will still need another solution
> since it seems to have DPCD rev 14 as per logs:
>
> DPCD: 14 1e 44 41 00 00 01 80 02 00 02 00 00 0b 80
I think we do need the quirk. But the commit message should IMO be
adjusted so that it doesn't claim that these panels are 100% legal.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-06-24 16:49 ` Ville Syrjälä
@ 2025-06-25 8:18 ` Jani Nikula
2025-06-26 11:31 ` Ville Syrjälä
0 siblings, 1 reply; 22+ messages in thread
From: Jani Nikula @ 2025-06-25 8:18 UTC (permalink / raw)
To: Ville Syrjälä, Nautiyal, Ankit K; +Cc: intel-gfx, intel-xe
On Tue, 24 Jun 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Jun 24, 2025 at 10:10:53AM +0530, Nautiyal, Ankit K wrote:
>>
>> On 6/23/2025 8:12 PM, Ville Syrjälä wrote:
>> > On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
>> >> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>> >> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
>> >> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
>> >> not support TPS4. While this was intended to address instability observed
>> >> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
>> >> and not for eDPRX.
>> > I see no exception given for eDP regarding this rule. The only exception
>> > allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
>> > claim that these eDP sinks are violating the spec.
>>
>> Hmm.. Yes the spec allows eDP sinks to report DPCD_REV=1.4 and
>> TPS4_SUPPORTED, so perhaps eDPs claiming HBR3 with DPCD rev other than
>> rev 1.4 and not supporting TPS4 are indeed violating the spec.
>>
>> Would it make sense to add a condition that checks for DPCD_REV=1.4.
>>
>> Specifically:
>>
>> if DPCD_REV=1.4 and TPS4_SUPPORTED = 0, then do not prune the HBR3 rate?
>>
>> Or otherway if DPCD_REV!=1.4 and TPS4_SUPPORTER = 0, prune the HBR3 rate
>>
>> This way the patch need not be reverted, but modified to address
>> instability issues for eDP panels that are not aligned with the spec.
>>
>> That said, the gitlab issue#5969 [1] will still need another solution
>> since it seems to have DPCD rev 14 as per logs:
>>
>> DPCD: 14 1e 44 41 00 00 01 80 02 00 02 00 00 0b 80
>
> I think we do need the quirk. But the commit message should IMO be
> adjusted so that it doesn't claim that these panels are 100% legal.
Right. But are you okay with reverting 584cf613c24a ("drm/i915/dp:
Reject HBR3 when sink doesn't support TPS4") i.e. allowing HBR3
*without* TPS4 by default, and quirking the panel that can't handle
HBR3?
No matter what the spec says, this seems to be common. More regressing
systems are cropping up, e.g. [1].
BR,
Jani.
[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-06-25 8:18 ` Jani Nikula
@ 2025-06-26 11:31 ` Ville Syrjälä
0 siblings, 0 replies; 22+ messages in thread
From: Ville Syrjälä @ 2025-06-26 11:31 UTC (permalink / raw)
To: Jani Nikula; +Cc: Nautiyal, Ankit K, intel-gfx, intel-xe
On Wed, Jun 25, 2025 at 11:18:03AM +0300, Jani Nikula wrote:
> On Tue, 24 Jun 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Tue, Jun 24, 2025 at 10:10:53AM +0530, Nautiyal, Ankit K wrote:
> >>
> >> On 6/23/2025 8:12 PM, Ville Syrjälä wrote:
> >> > On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
> >> >> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> >> >> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> >> >> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> >> >> not support TPS4. While this was intended to address instability observed
> >> >> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> >> >> and not for eDPRX.
> >> > I see no exception given for eDP regarding this rule. The only exception
> >> > allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
> >> > claim that these eDP sinks are violating the spec.
> >>
> >> Hmm.. Yes the spec allows eDP sinks to report DPCD_REV=1.4 and
> >> TPS4_SUPPORTED, so perhaps eDPs claiming HBR3 with DPCD rev other than
> >> rev 1.4 and not supporting TPS4 are indeed violating the spec.
> >>
> >> Would it make sense to add a condition that checks for DPCD_REV=1.4.
> >>
> >> Specifically:
> >>
> >> if DPCD_REV=1.4 and TPS4_SUPPORTED = 0, then do not prune the HBR3 rate?
> >>
> >> Or otherway if DPCD_REV!=1.4 and TPS4_SUPPORTER = 0, prune the HBR3 rate
> >>
> >> This way the patch need not be reverted, but modified to address
> >> instability issues for eDP panels that are not aligned with the spec.
> >>
> >> That said, the gitlab issue#5969 [1] will still need another solution
> >> since it seems to have DPCD rev 14 as per logs:
> >>
> >> DPCD: 14 1e 44 41 00 00 01 80 02 00 02 00 00 0b 80
> >
> > I think we do need the quirk. But the commit message should IMO be
> > adjusted so that it doesn't claim that these panels are 100% legal.
>
> Right. But are you okay with reverting 584cf613c24a ("drm/i915/dp:
> Reject HBR3 when sink doesn't support TPS4") i.e. allowing HBR3
> *without* TPS4 by default, and quirking the panel that can't handle
> HBR3?
Yeah, I think the revert+quirk for the one known bad system is the way
to go.
>
> No matter what the spec says, this seems to be common. More regressing
> systems are cropping up, e.g. [1].
>
>
> BR,
> Jani.
>
>
> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
>
>
>
>
> --
> Jani Nikula, Intel
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-07-09 5:51 [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
@ 2025-07-09 5:51 ` Ankit Nautiyal
2025-07-09 18:04 ` Ville Syrjälä
0 siblings, 1 reply; 22+ messages in thread
From: Ankit Nautiyal @ 2025-07-09 5:51 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jani.nikula, Ankit Nautiyal, Jani Nikula
This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
not support TPS4. While this was intended to address instability observed
on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
and not for eDPRX.
This change inadvertently causes blank screens on some eDP panels that do
not advertise TPS4 support, and require HBR3 to operate at their fixed
native resolution [2].
Revert the commit to restore functionality for such panels.
[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
1 file changed, 7 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f48912f308df..92abf819e60e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
static int max_dprx_rate(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
- int max_rate;
-
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
- max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- else
- max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+ return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- max_rate = 540000;
- }
-
- return max_rate;
+ return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
}
static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4273,9 +4255,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
static void
intel_edp_set_sink_rates(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
intel_dp->num_sink_rates = 0;
if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4286,7 +4265,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
sink_rates, sizeof(sink_rates));
for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
- int rate;
+ int val = le16_to_cpu(sink_rates[i]);
+
+ if (val == 0)
+ break;
/* Value read multiplied by 200kHz gives the per-lane
* link rate in kHz. The source rates are, however,
@@ -4294,24 +4276,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
* back to symbols is
* (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
*/
- rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
- if (rate == 0)
- break;
-
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- break;
- }
-
- intel_dp->sink_rates[i] = rate;
+ intel_dp->sink_rates[i] = (val * 200) / 10;
}
intel_dp->num_sink_rates = i;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-07-09 5:51 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-07-09 18:04 ` Ville Syrjälä
2025-07-10 4:47 ` Nautiyal, Ankit K
0 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjälä @ 2025-07-09 18:04 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula
On Wed, Jul 09, 2025 at 11:21:42AM +0530, Ankit Nautiyal wrote:
> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> not support TPS4. While this was intended to address instability observed
> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> and not for eDPRX.
That last claim is still not really supported by the spec AFAICS.
I think the best justification is that the Windows driver allows
this.
>
> This change inadvertently causes blank screens on some eDP panels that do
> not advertise TPS4 support, and require HBR3 to operate at their fixed
> native resolution [2].
>
> Revert the commit to restore functionality for such panels.
>
> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
> [2] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
> 1 file changed, 7 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index f48912f308df..92abf819e60e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
>
> static int max_dprx_rate(struct intel_dp *intel_dp)
> {
> - struct intel_display *display = to_intel_display(intel_dp);
> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> - int max_rate;
> -
> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> - max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> - else
> - max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> + return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>
> - /*
> - * Some broken eDP sinks illegally declare support for
> - * HBR3 without TPS4, and are unable to produce a stable
> - * output. Reject HBR3 when TPS4 is not available.
> - */
> - if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> - drm_dbg_kms(display->drm,
> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> - encoder->base.base.id, encoder->base.name);
> - max_rate = 540000;
> - }
> -
> - return max_rate;
> + return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> }
>
> static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4273,9 +4255,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
> static void
> intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> {
> - struct intel_display *display = to_intel_display(intel_dp);
> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -
> intel_dp->num_sink_rates = 0;
>
> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4286,7 +4265,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> sink_rates, sizeof(sink_rates));
>
> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> - int rate;
> + int val = le16_to_cpu(sink_rates[i]);
> +
> + if (val == 0)
> + break;
>
> /* Value read multiplied by 200kHz gives the per-lane
> * link rate in kHz. The source rates are, however,
> @@ -4294,24 +4276,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
> * back to symbols is
> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
> */
> - rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> -
> - if (rate == 0)
> - break;
> -
> - /*
> - * Some broken eDP sinks illegally declare support for
> - * HBR3 without TPS4, and are unable to produce a stable
> - * output. Reject HBR3 when TPS4 is not available.
> - */
> - if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> - drm_dbg_kms(display->drm,
> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> - encoder->base.base.id, encoder->base.name);
> - break;
> - }
> -
> - intel_dp->sink_rates[i] = rate;
> + intel_dp->sink_rates[i] = (val * 200) / 10;
> }
> intel_dp->num_sink_rates = i;
> }
> --
> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-07-09 18:04 ` Ville Syrjälä
@ 2025-07-10 4:47 ` Nautiyal, Ankit K
0 siblings, 0 replies; 22+ messages in thread
From: Nautiyal, Ankit K @ 2025-07-10 4:47 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula
On 7/9/2025 11:34 PM, Ville Syrjälä wrote:
> On Wed, Jul 09, 2025 at 11:21:42AM +0530, Ankit Nautiyal wrote:
>> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
>> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
>> not support TPS4. While this was intended to address instability observed
>> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
>> and not for eDPRX.
> That last claim is still not really supported by the spec AFAICS.
>
> I think the best justification is that the Windows driver allows
> this.
Alright, I will update the commit message and send again.
Thanks & Regards,
Ankit
>
>> This change inadvertently causes blank screens on some eDP panels that do
>> not advertise TPS4 support, and require HBR3 to operate at their fixed
>> native resolution [2].
>>
>> Revert the commit to restore functionality for such panels.
>>
>> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>> [2] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
>>
>> Cc: Jani Nikula <jani.nikula@linux.intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>> 1 file changed, 7 insertions(+), 42 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index f48912f308df..92abf819e60e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
>>
>> static int max_dprx_rate(struct intel_dp *intel_dp)
>> {
>> - struct intel_display *display = to_intel_display(intel_dp);
>> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> - int max_rate;
>> -
>> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
>> - max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>> - else
>> - max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> + return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>
>> - /*
>> - * Some broken eDP sinks illegally declare support for
>> - * HBR3 without TPS4, and are unable to produce a stable
>> - * output. Reject HBR3 when TPS4 is not available.
>> - */
>> - if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> - drm_dbg_kms(display->drm,
>> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> - encoder->base.base.id, encoder->base.name);
>> - max_rate = 540000;
>> - }
>> -
>> - return max_rate;
>> + return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> }
>>
>> static int max_dprx_lane_count(struct intel_dp *intel_dp)
>> @@ -4273,9 +4255,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>> static void
>> intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>> {
>> - struct intel_display *display = to_intel_display(intel_dp);
>> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> -
>> intel_dp->num_sink_rates = 0;
>>
>> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
>> @@ -4286,7 +4265,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>> sink_rates, sizeof(sink_rates));
>>
>> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
>> - int rate;
>> + int val = le16_to_cpu(sink_rates[i]);
>> +
>> + if (val == 0)
>> + break;
>>
>> /* Value read multiplied by 200kHz gives the per-lane
>> * link rate in kHz. The source rates are, however,
>> @@ -4294,24 +4276,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>> * back to symbols is
>> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>> */
>> - rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
>> -
>> - if (rate == 0)
>> - break;
>> -
>> - /*
>> - * Some broken eDP sinks illegally declare support for
>> - * HBR3 without TPS4, and are unable to produce a stable
>> - * output. Reject HBR3 when TPS4 is not available.
>> - */
>> - if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> - drm_dbg_kms(display->drm,
>> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> - encoder->base.base.id, encoder->base.name);
>> - break;
>> - }
>> -
>> - intel_dp->sink_rates[i] = rate;
>> + intel_dp->sink_rates[i] = (val * 200) / 10;
>> }
>> intel_dp->num_sink_rates = i;
>> }
>> --
>> 2.45.2
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
2025-07-10 5:20 [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
@ 2025-07-10 5:20 ` Ankit Nautiyal
0 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-07-10 5:20 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jani.nikula, Ankit Nautiyal, Jani Nikula
This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
not support TPS4.
While this was intended to address instability observed on certain eDP
panels [1], there seem to be edp panels that do not follow the
specification. These eDP panels do not advertise TPS4 support, but require
HBR3 to operate at their fixed native resolution [2].
As a result, the change causes blank screens on such panels. Apparently,
Windows driver does not enforce this restriction, and the issue is not seen
there.
Therefore, revert the commit to restore functionality for such panels,
and align behaviour with Windows driver.
[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
v2: Update the commit message with better justification. (Ville)
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
1 file changed, 7 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f48912f308df..92abf819e60e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
static int max_dprx_rate(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
- int max_rate;
-
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
- max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- else
- max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+ return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- max_rate = 540000;
- }
-
- return max_rate;
+ return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
}
static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4273,9 +4255,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
static void
intel_edp_set_sink_rates(struct intel_dp *intel_dp)
{
- struct intel_display *display = to_intel_display(intel_dp);
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
intel_dp->num_sink_rates = 0;
if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4286,7 +4265,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
sink_rates, sizeof(sink_rates));
for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
- int rate;
+ int val = le16_to_cpu(sink_rates[i]);
+
+ if (val == 0)
+ break;
/* Value read multiplied by 200kHz gives the per-lane
* link rate in kHz. The source rates are, however,
@@ -4294,24 +4276,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
* back to symbols is
* (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
*/
- rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
- if (rate == 0)
- break;
-
- /*
- * Some broken eDP sinks illegally declare support for
- * HBR3 without TPS4, and are unable to produce a stable
- * output. Reject HBR3 when TPS4 is not available.
- */
- if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
- drm_dbg_kms(display->drm,
- "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
- encoder->base.base.id, encoder->base.name);
- break;
- }
-
- intel_dp->sink_rates[i] = rate;
+ intel_dp->sink_rates[i] = (val * 200) / 10;
}
intel_dp->num_sink_rates = i;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
end of thread, other threads:[~2025-07-10 5:31 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-05-14 8:43 [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4 Ankit Nautiyal
2025-05-14 8:43 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-05-14 10:02 ` Jani Nikula
2025-05-14 10:47 ` Jani Nikula
2025-05-14 11:33 ` Nautiyal, Ankit K
2025-05-14 8:43 ` [PATCH 2/2] drm/dp: Add quirk for panel with HBR3 without TPS4 Ankit Nautiyal
2025-05-14 9:58 ` Jani Nikula
2025-05-14 11:56 ` ✗ Fi.CI.SPARSE: warning for Add quirk for panels that support " Patchwork
2025-05-14 12:17 ` ✓ i915.CI.BAT: success " Patchwork
2025-05-14 20:55 ` ✓ i915.CI.Full: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2025-06-10 10:04 [PATCH 0/2] Add kernel param to limit the eDP rate to HBR2 Ankit Nautiyal
2025-06-10 10:04 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-06-10 12:15 ` Jani Nikula
2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
2025-06-20 12:44 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-06-23 14:42 ` Ville Syrjälä
2025-06-24 4:40 ` Nautiyal, Ankit K
2025-06-24 16:49 ` Ville Syrjälä
2025-06-25 8:18 ` Jani Nikula
2025-06-26 11:31 ` Ville Syrjälä
2025-07-09 5:51 [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
2025-07-09 5:51 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-07-09 18:04 ` Ville Syrjälä
2025-07-10 4:47 ` Nautiyal, Ankit K
2025-07-10 5:20 [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
2025-07-10 5:20 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
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