From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA41DC433F5 for ; Tue, 19 Oct 2021 10:28:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B67976115A for ; Tue, 19 Oct 2021 10:28:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B67976115A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 487576E237; Tue, 19 Oct 2021 10:28:18 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 74D296E237 for ; Tue, 19 Oct 2021 10:28:17 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10141"; a="289326262" X-IronPort-AV: E=Sophos;i="5.85,384,1624345200"; d="scan'208";a="289326262" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2021 03:28:16 -0700 X-IronPort-AV: E=Sophos;i="5.85,384,1624345200"; d="scan'208";a="483166339" Received: from jsanz-mobl1.ger.corp.intel.com (HELO localhost) ([10.251.211.239]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2021 03:28:13 -0700 From: Jani Nikula To: Ville =?utf-8?B?U3lyasOkbMOk?= Cc: Vandita Kulkarni , intel-gfx@lists.freedesktop.org, imre.deak@intel.com, matthew.d.roper@intel.com In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20211018065207.30587-1-vandita.kulkarni@intel.com> <20211018065207.30587-2-vandita.kulkarni@intel.com> <875ytts527.fsf@intel.com> Date: Tue, 19 Oct 2021 13:28:10 +0300 Message-ID: <87r1chqpfp.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/dsi/xelpd: Fix the bit mask for wakeup GB X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, 19 Oct 2021, Ville Syrj=C3=A4l=C3=A4 wrote: > On Tue, Oct 19, 2021 at 01:05:20PM +0300, Jani Nikula wrote: >> On Mon, 18 Oct 2021, Vandita Kulkarni wrote: >>=20 >> Commit message goes here. >>=20 >> > Fixes: f87c46c43175 ("drm/i915/dsi/xelpd: Add WA to program LP to HS w= akeup guardband") >> > Signed-off-by: Vandita Kulkarni >> > --- >> > drivers/gpu/drm/i915/display/icl_dsi.c | 2 +- >> > drivers/gpu/drm/i915/i915_reg.h | 3 ++- >> > 2 files changed, 3 insertions(+), 2 deletions(-) >> > >> > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/= i915/display/icl_dsi.c >> > index 9ee62707ec72..8c166f92f8bd 100644 >> > --- a/drivers/gpu/drm/i915/display/icl_dsi.c >> > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c >> > @@ -1271,7 +1271,7 @@ static void adlp_set_lp_hs_wakeup_gb(struct inte= l_encoder *encoder) >> > if (DISPLAY_VER(i915) =3D=3D 13) { >> > for_each_dsi_port(port, intel_dsi->ports) >> > intel_de_rmw(i915, TGL_DSI_CHKN_REG(port), >> > - TGL_DSI_CHKN_LSHS_GB, 0x4); >> > + TGL_DSI_CHKN_LSHS_GB_MASK, TGL_DSI_CHKN_LSHS_GB_MASK); >>=20 >> I think you mean the value should be TGL_DSI_CHKN_LSHS_GB. > > IMO the value should never be named that. It should be > TGL_DSI_CHKN_LSHS_GB_. Alternatively, #define TGL_DSI_CHKN_LSHS_GB(byte_clocks) REG_FIELD_PREP(TGL_DSI_CHKN_LSHS= _GB_MASK, (byte_clocks)) and intel_de_rmw(i915, TGL_DSI_CHKN_REG(port), TGL_DSI_CHKN_LSHS_GB_MASK, TGL_DSI_CHKN_LSHS_GB(4)); ? We're using the value in a specific place that references a w/a, so the magic 4 isn't too bad. BR, Jani. --=20 Jani Nikula, Intel Open Source Graphics Center