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From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Chauhan, Madhav" <madhav.chauhan@intel.com>,
	Patchwork <patchwork@emeril.freedesktop.org>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: ✗ Fi.CI.BAT: failure for GLK MIPI DSI VIDEO MODE PATCHES (rev5)
Date: Thu, 16 Feb 2017 20:14:48 +0200	[thread overview]
Message-ID: <87r32ydmuf.fsf@intel.com> (raw)
In-Reply-To: <FDE0F82259988449BC0C053E4EF090C947FD55D2@BGSMSX104.gar.corp.intel.com>

On Thu, 16 Feb 2017, "Chauhan, Madhav" <madhav.chauhan@intel.com> wrote:
>> -----Original Message-----
>> From: Jani Nikula [mailto:jani.nikula@linux.intel.com]
>> Sent: Thursday, February 16, 2017 8:49 PM
>> To: Patchwork <patchwork@emeril.freedesktop.org>; Chauhan, Madhav
>> <madhav.chauhan@intel.com>
>> Cc: intel-gfx@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for GLK MIPI DSI VIDEO MODE
>> PATCHES (rev5)
>> 
>> On Tue, 14 Feb 2017, Patchwork <patchwork@emeril.freedesktop.org>
>> wrote:
>> > drivers/gpu/drm/i915/intel_dsi_pll.c: In function ‘intel_compute_dsi_pll’:
>> > drivers/gpu/drm/i915/intel_dsi_pll.c:513:45: error: ‘dsi_ratio_max’ may be
>> used uninitialized in this function [-Werror=maybe-uninitialized]
>> >   if (dsi_ratio < dsi_ratio_min || dsi_ratio > dsi_ratio_max) {
>> >                                              ^
>> > drivers/gpu/drm/i915/intel_dsi_pll.c:492:31: note: ‘dsi_ratio_max’ was
>> declared here
>> >   u8 dsi_ratio, dsi_ratio_min, dsi_ratio_max;
>> >                                ^
>> >   LD      drivers/tty/serial/built-in.o
>> >   LD [M]  drivers/net/ethernet/intel/e1000/e1000.o
>> > cc1: all warnings being treated as errors
>> > scripts/Makefile.build:294: recipe for target
>> > 'drivers/gpu/drm/i915/intel_dsi_pll.o' failed
>> > make[4]: *** [drivers/gpu/drm/i915/intel_dsi_pll.o] Error 1
>> > make[4]: *** Waiting for unfinished jobs....
>> 
>> The series didn't get tested because of this. Please update the series and
>> repost, and do remember to add the Reviewed-by tags to the patches I've
>> reviewed so far.
>
> Agree. Surprised to see why I didn’t get this error during compilation
> in my local environment. Used x86_64_defconfig. Any idea ??

The CI usees DRM_I915_WERROR=y, among other debug config options.

BR,
Jani.


>
>> 
>> Thanks,
>> Jani.
>> 
>> 
>> 
>> --
>> Jani Nikula, Intel Open Source Technology Center

-- 
Jani Nikula, Intel Open Source Technology Center
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  reply	other threads:[~2017-02-16 18:14 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-14 13:16 [GLK MIPI DSI V5 0/8] GLK MIPI DSI VIDEO MODE PATCHES Madhav Chauhan
2017-02-14 13:16 ` [GLK MIPI DSI V5 1/8] drm/i915/glk: Program dphy param reg for GLK Madhav Chauhan
2017-02-16 14:47   ` Jani Nikula
2017-02-14 13:16 ` [GLK MIPI DSI V5 2/8] drm/i915/glk: Program new MIPI DSI PHY registers " Madhav Chauhan
2017-02-16 14:50   ` Jani Nikula
2017-02-14 13:16 ` [GLK MIPI DSI V5 3/8] drm/i915/glk: Add MIPIIO Enable/disable sequence Madhav Chauhan
2017-02-16 15:07   ` Jani Nikula
2017-02-17  5:23     ` Chauhan, Madhav
2017-02-14 13:16 ` [GLK MIPI DSI V5 4/8] drm/i915: Set the Z inversion overlap field Madhav Chauhan
2017-02-16 15:18   ` Jani Nikula
2017-02-14 13:16 ` [GLK MIPI DSI V5 5/8] drm/i915/glk: Add DSI PLL divider range for glk Madhav Chauhan
2017-02-16 15:13   ` Jani Nikula
2017-02-14 13:16 ` [GLK MIPI DSI V5 6/8] drm/i915i/glk: Program MIPI_CLOCK_CTRL only for BXT Madhav Chauhan
2017-02-16 15:15   ` Jani Nikula
2017-02-14 13:16 ` [GLK MIPI DSI V5 7/8] drm/i915/glk: Program txesc clock divider for GLK Madhav Chauhan
2017-02-14 13:16 ` [GLK MIPI DSI V5 8/8] drm/i915/glk: Validate only DSI PORT A PLL divider Madhav Chauhan
2017-02-14 16:32 ` ✗ Fi.CI.BAT: failure for GLK MIPI DSI VIDEO MODE PATCHES (rev5) Patchwork
2017-02-16 15:19   ` Jani Nikula
2017-02-16 16:05     ` Chauhan, Madhav
2017-02-16 18:14       ` Jani Nikula [this message]
2017-02-17  7:36         ` Chauhan, Madhav

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