From: Gustavo Sousa <gustavo.sousa@intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
<intel-gfx@lists.freedesktop.org>
Cc: Matt Roper <matthew.d.roper@intel.com>
Subject: Re: [PATCH 3/4] drm/i915/bw: Rename struct intel_sa_info to intel_display_bw_params
Date: Wed, 8 Apr 2026 16:51:01 -0300 [thread overview]
Message-ID: <87se95cjtm.fsf@intel.com> (raw)
In-Reply-To: <62fbacf46642c5b3ab7b36f01f5dd82b5c73b32f@intel.com>
Jani Nikula <jani.nikula@linux.intel.com> writes:
> On Wed, 08 Apr 2026, Gustavo Sousa <gustavo.sousa@intel.com> wrote:
>> To align with struct intel_platform_bw_params, rename struct
>> intel_sa_info to intel_display_bw_params. Also add comments to contrast
>> their purposes.
>>
>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_bw.c | 38 ++++++++++++++++++++-------------
>> 1 file changed, 23 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
>> index 654876215ace..64c6f18346bb 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bw.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
>> @@ -375,6 +375,10 @@ static int icl_sagv_max_dclk(const struct intel_qgv_info *qi)
>> return dclk;
>> }
>>
>> +/*
>> + * Bandwidth parameters that are tied to the platform (as opposed to struct
>> + * intel_display_bw_params).
>> + */
>> struct intel_platform_bw_params {
>> u8 deprogbwlimit;
>> u8 derating;
>> @@ -496,34 +500,38 @@ static const struct intel_platform_bw_params *get_platform_bw_params(struct inte
>> return ret;
>> }
>>
>> -struct intel_sa_info {
>> +/*
>> + * Bandwidth parameters that are tied to the display IP (as opposed to struct
>> + * intel_platform_bw_params).
>> + */
>> +struct intel_display_bw_params {
>> u16 displayrtids;
>> u8 deburst;
>> };
>>
>> -static const struct intel_sa_info icl_sa_info = {
>> +static const struct intel_display_bw_params icl_disp_bw_params = {
>> .deburst = 8,
>> .displayrtids = 128,
>> };
>>
>> -static const struct intel_sa_info tgl_sa_info = {
>> +static const struct intel_display_bw_params tgl_disp_bw_params = {
>> .deburst = 16,
>> .displayrtids = 256,
>> };
>>
>> -static const struct intel_sa_info rkl_sa_info = {
>> +static const struct intel_display_bw_params rkl_disp_bw_params = {
>> .deburst = 8,
>> .displayrtids = 128,
>> };
>>
>> -static const struct intel_sa_info xelpdp_sa_info = {
>> +static const struct intel_display_bw_params xelpdp_disp_bw_params = {
>> .deburst = 32,
>> .displayrtids = 256,
>> };
>
> So if these are tied to IP, why are they still named after platforms?
Decided to use xelpdp for the one above and platform names for the other
ones because xelpdp is where we trully have IP disaggregation.
That said, I could try to use IP release names for the other ones as
well. So, something like below?
s/tgl_disp_bw_params/xe_d_bw_params/
s/rkl_disp_bw_params/xe_d_rkl_bw_params/
s/xelpdp_disp_bw_params/xe_lpdp_bw_params/
And what to do with icl_disp_bw_params? Do we have a suitable display
release name for it?
--
Gustavo Sousa
>
> Nitpick, you'll never see me use "disp" abbreviation. It just doesn't
> abbreviate enough, only makes stuff harder to read.
>
>>
>> static int icl_get_bw_info(struct intel_display *display,
>> const struct dram_info *dram_info,
>> - const struct intel_sa_info *sa)
>> + const struct intel_display_bw_params *disp_bw_params)
>> {
>> struct intel_qgv_info qi = {};
>> const struct intel_platform_bw_params *plat_bw_params = get_platform_bw_params(display);
>> @@ -544,7 +552,7 @@ static int icl_get_bw_info(struct intel_display *display,
>>
>> dclk_max = icl_sagv_max_dclk(&qi);
>> maxdebw = min(plat_bw_params->deprogbwlimit * 1000, dclk_max * 16 * 6 / 10);
>> - ipqdepth = min(ipqdepthpch, sa->displayrtids / num_channels);
>> + ipqdepth = min(ipqdepthpch, disp_bw_params->displayrtids / num_channels);
>> qi.deinterleave = DIV_ROUND_UP(num_channels, is_y_tile ? 4 : 2);
>>
>> for (i = 0; i < num_groups; i++) {
>> @@ -552,7 +560,7 @@ static int icl_get_bw_info(struct intel_display *display,
>> int clpchgroup;
>> int j;
>>
>> - clpchgroup = (sa->deburst * qi.deinterleave / num_channels) << i;
>> + clpchgroup = (disp_bw_params->deburst * qi.deinterleave / num_channels) << i;
>> bi->num_planes = (ipqdepth - clpchgroup) / clpchgroup + 1;
>>
>> bi->num_qgv_points = qi.num_points;
>> @@ -595,7 +603,7 @@ static int icl_get_bw_info(struct intel_display *display,
>>
>> static int tgl_get_bw_info(struct intel_display *display,
>> const struct dram_info *dram_info,
>> - const struct intel_sa_info *sa)
>> + const struct intel_display_bw_params *disp_bw_params)
>> {
>> struct intel_qgv_info qi = {};
>> const struct intel_platform_bw_params *plat_bw_params = get_platform_bw_params(display);
>> @@ -634,7 +642,7 @@ static int tgl_get_bw_info(struct intel_display *display,
>> peakbw = num_channels * DIV_ROUND_UP(qi.channel_width, 8) * dclk_max;
>> maxdebw = min(plat_bw_params->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 100);
>>
>> - ipqdepth = min(ipqdepthpch, sa->displayrtids / num_channels);
>> + ipqdepth = min(ipqdepthpch, disp_bw_params->displayrtids / num_channels);
>> /*
>> * clperchgroup = 4kpagespermempage * clperchperblock,
>> * clperchperblock = 8 / num_channels * interleave
>> @@ -647,7 +655,7 @@ static int tgl_get_bw_info(struct intel_display *display,
>> int clpchgroup;
>> int j;
>>
>> - clpchgroup = (sa->deburst * qi.deinterleave / num_channels) << i;
>> + clpchgroup = (disp_bw_params->deburst * qi.deinterleave / num_channels) << i;
>>
>> if (i < num_groups - 1) {
>> bi_next = &display->bw.max[i + 1];
>> @@ -886,16 +894,16 @@ void intel_bw_init_hw(struct intel_display *display)
>> if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
>> xe2_hpd_get_bw_info(display, dram_info);
>> } else if (DISPLAY_VER(display) >= 14) {
>> - tgl_get_bw_info(display, dram_info, &xelpdp_sa_info);
>> + tgl_get_bw_info(display, dram_info, &xelpdp_disp_bw_params);
>> } else if (display->platform.dg2) {
>> dg2_get_bw_info(display);
>> } else if (DISPLAY_VER(display) >= 12) {
>> if (display->platform.rocketlake)
>> - tgl_get_bw_info(display, dram_info, &rkl_sa_info);
>> + tgl_get_bw_info(display, dram_info, &rkl_disp_bw_params);
>> else
>> - tgl_get_bw_info(display, dram_info, &tgl_sa_info);
>> + tgl_get_bw_info(display, dram_info, &tgl_disp_bw_params);
>> } else if (DISPLAY_VER(display) == 11) {
>> - icl_get_bw_info(display, dram_info, &icl_sa_info);
>> + icl_get_bw_info(display, dram_info, &icl_disp_bw_params);
>> }
>> }
>
> --
> Jani Nikula, Intel
next prev parent reply other threads:[~2026-04-08 19:51 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-08 18:52 [PATCH 0/4] drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs Gustavo Sousa
2026-04-08 18:52 ` [PATCH 1/4] drm/i915/bw: Extract platform-specific parameters Gustavo Sousa
2026-04-08 19:16 ` Jani Nikula
2026-04-08 19:41 ` Gustavo Sousa
2026-04-09 23:12 ` Matt Roper
2026-04-10 14:39 ` Gustavo Sousa
2026-04-10 17:33 ` Matt Roper
2026-04-10 21:15 ` Gustavo Sousa
2026-04-08 18:53 ` [PATCH 2/4] drm/i915/bw: Deduplicate intel_sa_info instances Gustavo Sousa
2026-04-09 23:26 ` Matt Roper
2026-04-10 14:49 ` Gustavo Sousa
2026-04-10 17:36 ` Matt Roper
2026-04-08 18:53 ` [PATCH 3/4] drm/i915/bw: Rename struct intel_sa_info to intel_display_bw_params Gustavo Sousa
2026-04-08 19:20 ` Jani Nikula
2026-04-08 19:51 ` Gustavo Sousa [this message]
2026-04-09 23:32 ` Matt Roper
2026-04-08 18:53 ` [PATCH 4/4] drm/i915/bw: Extract get_display_bw_params() Gustavo Sousa
2026-04-08 19:21 ` Jani Nikula
2026-04-09 1:23 ` ✓ i915.CI.BAT: success for drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs Patchwork
2026-04-09 8:33 ` ✓ i915.CI.Full: " Patchwork
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