From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D5ACC433EF for ; Wed, 20 Jul 2022 19:08:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B1D7E113BFF; Wed, 20 Jul 2022 19:08:51 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6AE7B113C22 for ; Wed, 20 Jul 2022 19:08:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658344130; x=1689880130; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=rnTHDfScIbISmFCioZ/jR0EQAqOrCaKWMG0AhThvUp4=; b=JW7nJPPadlQH0z1ZVUfyXEm3R40dA56QOjmxp5XXVfPoI3xyxVUq9rh1 WWKdffWCprYtxGZDTHXKmEA2J9uiO0qoFm32RuRPzrY11hov7rkB68REG 9i2p/vZsuvIAQOQbOxy5YHVMMBMg64H8y5ln+99iusxS+i9pza57JRXCZ KzaC6VhUxG4LbFQi1to6TjDYFxStnLHV/dPHXWh6faCEVc3LmDBAC1k6c HkWqZUoAQdzIcoQAo4iZ/13SZjNlcPbMz1ZWJ2eH8oHbtkZvPceLigtCZ TefXXl0+kxcQWKjued64Ct4hAFAO9hFZrsQbWc5ErfG6nCqkkIXyT387T g==; X-IronPort-AV: E=McAfee;i="6400,9594,10414"; a="273703625" X-IronPort-AV: E=Sophos;i="5.92,287,1650956400"; d="scan'208";a="273703625" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2022 12:08:49 -0700 X-IronPort-AV: E=Sophos;i="5.92,287,1650956400"; d="scan'208";a="925348084" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.252.135.190]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2022 12:08:49 -0700 Date: Wed, 20 Jul 2022 12:08:48 -0700 Message-ID: <87sfmvr48v.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Alan Previn In-Reply-To: <20220509210151.1843173-7-alan.previn.teres.alexis@intel.com> References: <20220509210151.1843173-1-alan.previn.teres.alexis@intel.com> <20220509210151.1843173-7-alan.previn.teres.alexis@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [Intel-gfx 6/6] drm/i915/guc: Move guc_log_relay_chan debugfs path to uc X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 09 May 2022 14:01:51 -0700, Alan Previn wrote: > > All other GuC Relay Logging debugfs handles including recent > additions are under the 'i915/gt/uc/path' so let's also move > 'guc_log_relay_chan' to its proper home. > > Signed-off-by: Alan Previn > --- > drivers/gpu/drm/i915/gt/uc/intel_guc.h | 2 ++ > drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 5 ++++- > drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c | 2 ++ > 3 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h > index 3f3373f68123..72deac11df8a 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h > @@ -41,6 +41,8 @@ struct intel_guc { > struct intel_guc_slpc slpc; > /** @capture: the error-state-capture module's data and objects */ > struct intel_guc_state_capture *capture; > + /** @dbgfs_node: the debugfs path for guc file handles */ > + struct dentry *dbgfs_node; > > /** @sched_engine: Global engine used to submit requests to GuC */ > struct i915_sched_engine *sched_engine; > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c > index 793a06a16874..f6578565fed6 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c > @@ -419,8 +419,11 @@ static int guc_log_relay_create(struct intel_guc_log *log) > */ > n_subbufs = intel_guc_log_relay_subbuf_count(log); > > + if (!guc->dbgfs_node) > + return -ENOENT; Once again, why is this check needed? The patch is otherwise fine. > + > guc_log_relay_chan = relay_open("guc_log_relay_chan", > - dev_priv->drm.primary->debugfs_root, > + guc->dbgfs_node, > subbuf_size, n_subbufs, > &relay_callbacks, dev_priv); > if (!guc_log_relay_chan) { > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c > index 284d6fbc2d08..2f93cc4e408a 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c > @@ -54,6 +54,8 @@ void intel_uc_debugfs_register(struct intel_uc *uc, struct dentry *gt_root) > if (IS_ERR(root)) > return; > > + uc->guc.dbgfs_node = root; > + > intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), uc); > > intel_guc_debugfs_register(&uc->guc, root); > -- > 2.25.1 >