Re: [PATCH v3 09/23] drm/i915: Always preallocate gen6/7 ppgtt

[Mika Kuoppala <mika.kuoppala@linux.intel.com>]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> The hardware does not cope very well with us changing the PD within an
> active context (the context must be idle for it to re-read the PD). As
> we only check whether the page is idle before changing the entry (and on
> through the PD tree), we cannot reliably replace PD entries on
> gen6/gen7. To fully avoid changing the tree at runtime, preallocate it
> on init.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Noticed that gen6_ppgtt_alloc is quite redundant.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 24 ++++++++++++++----------
>  1 file changed, 14 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 679238c9371b..9077d0bd4e08 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2102,6 +2102,12 @@ static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
>  	if (ppgtt->node.start < ggtt->mappable_end)
>  		DRM_DEBUG("Forced to use aperture for PDEs\n");
>  
> +	ppgtt->pd.base.ggtt_offset =
> +		ppgtt->node.start / PAGE_SIZE * sizeof(gen6_pte_t);
> +
> +	ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm +
> +		ppgtt->pd.base.ggtt_offset / sizeof(gen6_pte_t);
> +
>  	return 0;
>  
>  err_out:
> @@ -2144,7 +2150,6 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
>  	if (ret)
>  		return ret;
>  
> -	ppgtt->base.allocate_va_range = gen6_alloc_va_range;
>  	ppgtt->base.clear_range = gen6_ppgtt_clear_range;
>  	ppgtt->base.insert_entries = gen6_ppgtt_insert_entries;
>  	ppgtt->base.unbind_vma = ppgtt_unbind_vma;
> @@ -2154,22 +2159,21 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
>  	ppgtt->base.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
>  	ppgtt->debug_dump = gen6_dump_ppgtt;
>  
> -	ppgtt->pd.base.ggtt_offset =
> -		ppgtt->node.start / PAGE_SIZE * sizeof(gen6_pte_t);
> -
> -	ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm +
> -		ppgtt->pd.base.ggtt_offset / sizeof(gen6_pte_t);
> -
>  	gen6_scratch_va_range(ppgtt, 0, ppgtt->base.total);
> -
>  	gen6_write_page_range(dev_priv, &ppgtt->pd, 0, ppgtt->base.total);
>  
> +	ret = gen6_alloc_va_range(&ppgtt->base, 0, ppgtt->base.total);
> +	if (ret) {
> +		gen6_ppgtt_cleanup(&ppgtt->base);
> +		return ret;
> +	}
> +
>  	DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
>  			 ppgtt->node.size >> 20,
>  			 ppgtt->node.start / PAGE_SIZE);
>  
> -	DRM_DEBUG("Adding PPGTT at offset %x\n",
> -		  ppgtt->pd.base.ggtt_offset << 10);
> +	DRM_DEBUG_DRIVER("Adding PPGTT at offset %x\n",
> +			 ppgtt->pd.base.ggtt_offset << 10);
>  
>  	return 0;
>  }
> -- 
> 2.11.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx