From mboxrd@z Thu Jan 1 00:00:00 1970 From: Francisco Jerez Subject: Re: [PATCH] drm/i915: Resurrect golden context on gen6/7 Date: Thu, 01 Oct 2015 19:13:11 +0300 Message-ID: <87si5uin3c.fsf@riseup.net> References: <1443715610-14254-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1310163265==" Return-path: Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) by gabe.freedesktop.org (Postfix) with ESMTPS id 27C786E368 for ; Thu, 1 Oct 2015 09:14:12 -0700 (PDT) In-Reply-To: <1443715610-14254-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Intel Graphics Development Cc: Daniel Vetter , Daniel Vetter , stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org --===============1310163265== Content-Type: multipart/signed; boundary="==-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" --==-=-= Content-Type: multipart/mixed; boundary="=-=-=" --=-=-= Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Daniel Vetter writes: > In > > commit 8f0e2b9d95a88ca5d8349deef2375644faf184ae > Author: Daniel Vetter > Date: Tue Dec 2 16:19:07 2014 +0100 > > drm/i915: Move golden context init into ->init_context > > I've shuffled around per-ctx init code a bit for legacy contexts but > accidentally dropped the render state init call on gen6/7. Resurrect > it. > > Reported-by: Francisco Jerez > Cc: Francisco Jerez > Cc: Dave Gordon > Cc: Thomas Daniel > Cc: stable@vger.kernel.org > Signed-off-by: Daniel Vetter I'm not terribly familiar with this code but the change looks sensible to me, this patch is: Reviewed-by: Francisco Jerez > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i9= 15/intel_ringbuffer.c > index 16a4eada60a1..53920f01f264 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -2637,6 +2637,7 @@ int intel_init_render_ring_buffer(struct drm_device= *dev) > GEN8_RING_SEMAPHORE_INIT; > } > } else if (INTEL_INFO(dev)->gen >=3D 6) { > + ring->init_context =3D i915_gem_render_state_init; > ring->add_request =3D gen6_add_request; > ring->flush =3D gen7_render_ring_flush; > if (INTEL_INFO(dev)->gen =3D=3D 6) > --=20 > 2.5.1 --=-=-=-- --==-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iF4EAREIAAYFAlYNW5cACgkQg5k4nX1Sv1vAQAD+LEwUWlYqwTIPawpeO6uszutp oSHi9rpFrZtfR3bp8RkA/2vz1oV9FBd9+hEu6DLvYONwg1tzLehB32tLBuxDY11p =+oC0 -----END PGP SIGNATURE----- --==-=-=-- --===============1310163265== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK --===============1310163265==--