Re: [PATCH 5/9] drm/i915/psr: Inline psr2 caps checks.

[Jani Nikula <jani.nikula@linux.intel.com>]

On Fri, 26 Jan 2018, Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> wrote:
> Add a macro to check for a bit offset in a DPCD reg, use this macro to
> eliminate three functions and a local.

IMO less readable with this change.

BR,
Jani.


>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 66 ++++++++++++----------------------------
>  1 file changed, 19 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 83874bcd1142..9f83a7430e39 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -56,73 +56,45 @@
>  #include "intel_drv.h"
>  #include "i915_drv.h"
>  
> -static bool intel_dp_get_y_cord_status(struct intel_dp *intel_dp)
> -{
> -	uint8_t psr_caps = 0;
> -
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_CAPS, &psr_caps) != 1)
> -		return false;
> -	return psr_caps & DP_PSR2_SU_Y_COORDINATE_REQUIRED;
> -}
> -
> -static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
> -{
> -	uint8_t dprx = 0;
> -
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST,
> -			      &dprx) != 1)
> -		return false;
> -	return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
> -}
> -
> -static bool intel_dp_get_alpm_status(struct intel_dp *intel_dp)
> -{
> -	uint8_t alpm_caps = 0;
> -
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP,
> -			      &alpm_caps) != 1)
> -		return false;
> -	return alpm_caps & DP_ALPM_CAP;
> -}
> +#define DPCD_READB(_reg, _off) ({ u8 _buf;				       \
> +	drm_dp_dpcd_readb(&intel_dp->aux, _reg, &_buf) == 1 ? _buf & _off : 0; \
> +})
>  
>  void intel_psr_init_dpcd(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv =
>  		to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
> +	struct i915_psr *psr = &dev_priv->psr;
>  
>  	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
>  			 sizeof(intel_dp->psr_dpcd));
>  
>  	if (intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED) {
> -		dev_priv->psr.sink_support = true;
> +		psr->sink_support = true;
>  		DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
>  	}
>  
>  	if (INTEL_GEN(dev_priv) >= 9 &&
>  	    (intel_dp->psr_dpcd[0] & DP_PSR2_IS_SUPPORTED)) {
> -		uint8_t frame_sync_cap;
> -
> -		dev_priv->psr.sink_support = true;
> -		if (drm_dp_dpcd_readb(&intel_dp->aux,
> -				      DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP,
> -				      &frame_sync_cap) != 1)
> -			frame_sync_cap = 0;
> -		dev_priv->psr.aux_frame_sync = frame_sync_cap & DP_AUX_FRAME_SYNC_CAP;
> +		psr->sink_support = true;
> +		psr->aux_frame_sync = DPCD_READB(DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP,
> +						DP_AUX_FRAME_SYNC_CAP);
>  		/* PSR2 needs frame sync as well */
> -		dev_priv->psr.psr2_support = dev_priv->psr.aux_frame_sync;
> +		psr->psr2_support = psr->aux_frame_sync;
>  		DRM_DEBUG_KMS("PSR2 %s on sink",
> -			      dev_priv->psr.psr2_support ? "supported" : "not supported");
> -
> -		if (dev_priv->psr.psr2_support) {
> -			dev_priv->psr.y_cord_support =
> -				intel_dp_get_y_cord_status(intel_dp);
> -			dev_priv->psr.colorimetry_support =
> -				intel_dp_get_colorimetry_status(intel_dp);
> -			dev_priv->psr.alpm =
> -				intel_dp_get_alpm_status(intel_dp);
> +			      psr->psr2_support ? "supported" : "not supported");
> +
> +		if (psr->psr2_support) {
> +			psr->y_cord_support = DPCD_READB(DP_PSR_CAPS,
> +							DP_PSR2_SU_Y_COORDINATE_REQUIRED);
> +			psr->colorimetry_support = DPCD_READB(DP_DPRX_FEATURE_ENUMERATION_LIST,
> +							     DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED);
> +			psr->alpm = DPCD_READB(DP_RECEIVER_ALPM_CAP,
> +					      DP_ALPM_CAP);
>  		}
>  	}
>  }
> +#undef DPCD_READB
>  
>  static bool vlv_is_psr_active_on_pipe(struct drm_device *dev, int pipe)
>  {

-- 
Jani Nikula, Intel Open Source Technology Center
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