* [PATCH] drm/i915: Enable runtime pm
@ 2017-11-07 16:18 Daniel Vetter
2017-11-07 16:38 ` ✗ Fi.CI.BAT: failure for " Patchwork
` (3 more replies)
0 siblings, 4 replies; 19+ messages in thread
From: Daniel Vetter @ 2017-11-07 16:18 UTC (permalink / raw)
To: Intel Graphics Development
Cc: Zanoni, Paulo R, Takashi Iwai, Daniel Vetter, Kaskinen, Tanu,
Liam Girdwood, Daniel Vetter
Now that we have CI, and that pm_rpm fully passes (I guess the audio
folks have implemented proper runtime pm for snd-hda, hooray, pls
confirm) it's time to enable this again by default.
Real goal here is to have 1 configuration only that we fully support,
instead of tons of different codes with every user/customer tuning it
differently. And really, power stuff should work by default, and
should be enabled by everywhere where it is save to do so.
v2: Completely new commit message, a few years passed since v1 ...
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Liam Girdwood <liam.r.girdwood@intel.com>
Cc: "Yang, Libin" <libin.yang@intel.com>
Cc: "Lin, Mengdong" <mengdong.lin@intel.com>
Cc: "Li, Jocelyn" <jocelyn.li@intel.com>
Cc: "Kaskinen, Tanu" <tanu.kaskinen@intel.com>
Cc: "Zanoni, Paulo R" <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 8315499452dc..dc24d008d8d4 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3232,7 +3232,7 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv)
struct pci_dev *pdev = dev_priv->drm.pdev;
struct device *kdev = &pdev->dev;
- pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */
+ pm_runtime_set_autosuspend_delay(kdev, 100);
pm_runtime_mark_last_busy(kdev);
/*
@@ -3251,6 +3251,8 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv)
pm_runtime_use_autosuspend(kdev);
}
+ pm_runtime_allow(kdev);
+
/*
* The core calls the driver load handler with an RPM reference held.
* We drop that here and will reacquire it during unloading in
--
2.15.0.rc2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread* ✗ Fi.CI.BAT: failure for drm/i915: Enable runtime pm 2017-11-07 16:18 [PATCH] drm/i915: Enable runtime pm Daniel Vetter @ 2017-11-07 16:38 ` Patchwork 2017-11-07 16:45 ` [PATCH] " Jani Nikula ` (2 subsequent siblings) 3 siblings, 0 replies; 19+ messages in thread From: Patchwork @ 2017-11-07 16:38 UTC (permalink / raw) To: Daniel Vetter; +Cc: intel-gfx == Series Details == Series: drm/i915: Enable runtime pm URL : https://patchwork.freedesktop.org/series/33359/ State : failure == Summary == Series 33359v1 drm/i915: Enable runtime pm https://patchwork.freedesktop.org/api/1.0/series/33359/revisions/1/mbox/ Test chamelium: Subgroup dp-crc-fast: pass -> DMESG-WARN (fi-kbl-7500u) fdo#102514 Test gem_exec_nop: Subgroup basic-series: pass -> DMESG-FAIL (fi-glk-dsi) Test gem_exec_parallel: Subgroup basic: pass -> SKIP (fi-glk-dsi) Test gem_exec_reloc: Subgroup basic-cpu: pass -> SKIP (fi-glk-dsi) Subgroup basic-gtt: pass -> SKIP (fi-glk-dsi) Subgroup basic-cpu-gtt: pass -> SKIP (fi-glk-dsi) Subgroup basic-gtt-cpu: pass -> SKIP (fi-glk-dsi) Subgroup basic-cpu-read: pass -> SKIP (fi-glk-dsi) Subgroup basic-gtt-read: pass -> SKIP (fi-glk-dsi) Subgroup basic-write-cpu: pass -> SKIP (fi-glk-dsi) Subgroup basic-write-gtt: pass -> SKIP (fi-glk-dsi) Subgroup basic-write-read: pass -> SKIP (fi-glk-dsi) Subgroup basic-cpu-noreloc: pass -> SKIP (fi-glk-dsi) Subgroup basic-gtt-noreloc: pass -> SKIP (fi-glk-dsi) Subgroup basic-cpu-gtt-noreloc: pass -> SKIP (fi-glk-dsi) Subgroup basic-gtt-cpu-noreloc: pass -> SKIP (fi-glk-dsi) Subgroup basic-cpu-read-noreloc: pass -> SKIP (fi-glk-dsi) Subgroup basic-gtt-read-noreloc: pass -> SKIP (fi-glk-dsi) Subgroup basic-write-cpu-noreloc: pass -> SKIP (fi-glk-dsi) Subgroup basic-write-gtt-noreloc: pass -> SKIP (fi-glk-dsi) Subgroup basic-write-read-noreloc: pass -> SKIP (fi-glk-dsi) Subgroup basic-cpu-active: pass -> SKIP (fi-glk-dsi) Subgroup basic-gtt-active: pass -> SKIP (fi-glk-dsi) Subgroup basic-cpu-gtt-active: pass -> SKIP (fi-glk-dsi) Subgroup basic-gtt-cpu-active: pass -> SKIP (fi-glk-dsi) Subgroup basic-cpu-read-active: pass -> SKIP (fi-glk-dsi) Subgroup basic-gtt-read-active: pass -> SKIP (fi-glk-dsi) Subgroup basic-write-cpu-active: pass -> SKIP (fi-glk-dsi) Subgroup basic-write-gtt-active: pass -> SKIP (fi-glk-dsi) Subgroup basic-write-read-active: pass -> SKIP (fi-glk-dsi) Subgroup basic-softpin: pass -> SKIP (fi-glk-dsi) Test gem_exec_store: Subgroup basic-all: pass -> SKIP (fi-glk-dsi) Subgroup basic-blt: pass -> SKIP (fi-glk-dsi) Subgroup basic-bsd: pass -> SKIP (fi-glk-dsi) Subgroup basic-default: pass -> SKIP (fi-glk-dsi) Subgroup basic-render: pass -> SKIP (fi-glk-dsi) Subgroup basic-vebox: pass -> SKIP (fi-glk-dsi) Test gem_exec_suspend: Subgroup basic: pass -> SKIP (fi-glk-dsi) Subgroup basic-s3: pass -> SKIP (fi-glk-dsi) Subgroup basic-s4-devices: pass -> SKIP (fi-glk-dsi) Test gem_linear_blits: Subgroup basic: pass -> SKIP (fi-glk-dsi) Test gem_render_linear_blits: Subgroup basic: pass -> SKIP (fi-glk-dsi) Test gem_render_tiled_blits: Subgroup basic: pass -> SKIP (fi-glk-dsi) Test gem_ringfill: Subgroup basic-default: WARNING: Long output truncated eb031b266f224a2b9ded3b0b5c425991fea8f8c5 drm-tip: 2017y-11m-07d-14h-27m-25s UTC integration manifest 0b80ad6c25c1 drm/i915: Enable runtime pm == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6996/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2017-11-07 16:18 [PATCH] drm/i915: Enable runtime pm Daniel Vetter 2017-11-07 16:38 ` ✗ Fi.CI.BAT: failure for " Patchwork @ 2017-11-07 16:45 ` Jani Nikula 2017-11-07 16:53 ` Daniel Vetter 2017-11-08 12:24 ` ✗ Fi.CI.BAT: warning for " Patchwork 2017-11-08 14:25 ` [PATCH] " David Weinehall 3 siblings, 1 reply; 19+ messages in thread From: Jani Nikula @ 2017-11-07 16:45 UTC (permalink / raw) To: Intel Graphics Development Cc: Zanoni, Paulo R, Takashi Iwai, Daniel Vetter, Peres, Martin, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter On Tue, 07 Nov 2017, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > Now that we have CI, and that pm_rpm fully passes (I guess the audio > folks have implemented proper runtime pm for snd-hda, hooray, pls > confirm) it's time to enable this again by default. > > Real goal here is to have 1 configuration only that we fully support, > instead of tons of different codes with every user/customer tuning it > differently. And really, power stuff should work by default, and > should be enabled by everywhere where it is save to do so. > > v2: Completely new commit message, a few years passed since v1 ... I suppose this is something that could use more than a single round of IGT CI before merging...? BR, Jani. > > Cc: Takashi Iwai <tiwai@suse.de> > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > Cc: "Yang, Libin" <libin.yang@intel.com> > Cc: "Lin, Mengdong" <mengdong.lin@intel.com> > Cc: "Li, Jocelyn" <jocelyn.li@intel.com> > Cc: "Kaskinen, Tanu" <tanu.kaskinen@intel.com> > Cc: "Zanoni, Paulo R" <paulo.r.zanoni@intel.com> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 8315499452dc..dc24d008d8d4 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -3232,7 +3232,7 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > struct pci_dev *pdev = dev_priv->drm.pdev; > struct device *kdev = &pdev->dev; > > - pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */ > + pm_runtime_set_autosuspend_delay(kdev, 100); > pm_runtime_mark_last_busy(kdev); > > /* > @@ -3251,6 +3251,8 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > pm_runtime_use_autosuspend(kdev); > } > > + pm_runtime_allow(kdev); > + > /* > * The core calls the driver load handler with an RPM reference held. > * We drop that here and will reacquire it during unloading in -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2017-11-07 16:45 ` [PATCH] " Jani Nikula @ 2017-11-07 16:53 ` Daniel Vetter 0 siblings, 0 replies; 19+ messages in thread From: Daniel Vetter @ 2017-11-07 16:53 UTC (permalink / raw) To: Jani Nikula Cc: Zanoni, Paulo R, Takashi Iwai, Daniel Vetter, Intel Graphics Development, Peres, Martin, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter On Tue, Nov 07, 2017 at 06:45:36PM +0200, Jani Nikula wrote: > On Tue, 07 Nov 2017, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > > Now that we have CI, and that pm_rpm fully passes (I guess the audio > > folks have implemented proper runtime pm for snd-hda, hooray, pls > > confirm) it's time to enable this again by default. > > > > Real goal here is to have 1 configuration only that we fully support, > > instead of tons of different codes with every user/customer tuning it > > differently. And really, power stuff should work by default, and > > should be enabled by everywhere where it is save to do so. > > > > v2: Completely new commit message, a few years passed since v1 ... > > I suppose this is something that could use more than a single round of > IGT CI before merging...? The dedicated pm_rpm tests explicitly enable this (with a timeout of 0) on all machines we run in shards. It's been green for a long time. So this just tests for accidental fallout everywhere else (timing shifts essentially), which I think is fairly low priority. Hence I'm not terribly worried about this one here. > BR, > Jani. > > > > > > > Cc: Takashi Iwai <tiwai@suse.de> > > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > > Cc: "Yang, Libin" <libin.yang@intel.com> > > Cc: "Lin, Mengdong" <mengdong.lin@intel.com> > > Cc: "Li, Jocelyn" <jocelyn.li@intel.com> > > Cc: "Kaskinen, Tanu" <tanu.kaskinen@intel.com> > > Cc: "Zanoni, Paulo R" <paulo.r.zanoni@intel.com> > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > --- > > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > > index 8315499452dc..dc24d008d8d4 100644 > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > @@ -3232,7 +3232,7 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > > struct pci_dev *pdev = dev_priv->drm.pdev; > > struct device *kdev = &pdev->dev; > > > > - pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */ > > + pm_runtime_set_autosuspend_delay(kdev, 100); Wrt the data requested for this here. On bxt (probably the slowest box we have), from the pm_rpm tests, looking at dmesg I get the following values: - device suspend: 3-4ms - device resume: 10-11ms So grand total is 15ms for a transition. On top the display will keep us out of runtime pm, as will even a mildly busy gt. I think the 100ms value isn't aggressive at all given that. -Daniel > > pm_runtime_mark_last_busy(kdev); > > > > /* > > @@ -3251,6 +3251,8 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > > pm_runtime_use_autosuspend(kdev); > > } > > > > + pm_runtime_allow(kdev); > > + > > /* > > * The core calls the driver load handler with an RPM reference held. > > * We drop that here and will reacquire it during unloading in > > -- > Jani Nikula, Intel Open Source Technology Center -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: Enable runtime pm 2017-11-07 16:18 [PATCH] drm/i915: Enable runtime pm Daniel Vetter 2017-11-07 16:38 ` ✗ Fi.CI.BAT: failure for " Patchwork 2017-11-07 16:45 ` [PATCH] " Jani Nikula @ 2017-11-08 12:24 ` Patchwork 2017-11-08 14:25 ` [PATCH] " David Weinehall 3 siblings, 0 replies; 19+ messages in thread From: Patchwork @ 2017-11-08 12:24 UTC (permalink / raw) To: Daniel Vetter; +Cc: intel-gfx == Series Details == Series: drm/i915: Enable runtime pm URL : https://patchwork.freedesktop.org/series/33359/ State : warning == Summary == Series 33359v1 drm/i915: Enable runtime pm https://patchwork.freedesktop.org/api/1.0/series/33359/revisions/1/mbox/ Test chamelium: Subgroup dp-crc-fast: pass -> DMESG-WARN (fi-kbl-7500u) fdo#102514 Test kms_pipe_crc_basic: Subgroup read-crc-pipe-b: skip -> PASS (fi-hsw-4770r) Subgroup read-crc-pipe-c-frame-sequence: pass -> SKIP (fi-hsw-4770r) fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:444s fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:456s fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:379s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:547s fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:275s fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:508s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:504s fi-byt-j1900 total:289 pass:253 dwarn:1 dfail:0 fail:0 skip:35 time:505s fi-byt-n2820 total:289 pass:249 dwarn:1 dfail:0 fail:0 skip:39 time:485s fi-cfl-s total:289 pass:254 dwarn:3 dfail:0 fail:0 skip:32 time:550s fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:428s fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:264s fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:587s fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:449s fi-hsw-4770r total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:432s fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:430s fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:503s fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:458s fi-kbl-7500u total:289 pass:263 dwarn:2 dfail:0 fail:0 skip:24 time:489s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:575s fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:476s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:590s fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:575s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:460s fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:596s fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:651s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:521s fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:505s fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:460s fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:574s fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:418s Blacklisted hosts: fi-cnl-y total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:597s fi-glk-dsi total:289 pass:191 dwarn:1 dfail:4 fail:0 skip:93 time:426s eb031b266f224a2b9ded3b0b5c425991fea8f8c5 drm-tip: 2017y-11m-07d-14h-27m-25s UTC integration manifest 0b80ad6c25c1 drm/i915: Enable runtime pm == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6996/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2017-11-07 16:18 [PATCH] drm/i915: Enable runtime pm Daniel Vetter ` (2 preceding siblings ...) 2017-11-08 12:24 ` ✗ Fi.CI.BAT: warning for " Patchwork @ 2017-11-08 14:25 ` David Weinehall 2017-11-16 18:24 ` David Weinehall 3 siblings, 1 reply; 19+ messages in thread From: David Weinehall @ 2017-11-08 14:25 UTC (permalink / raw) To: Daniel Vetter Cc: Zanoni, Paulo R, Takashi Iwai, Intel Graphics Development, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter On Tue, Nov 07, 2017 at 05:18:21PM +0100, Daniel Vetter wrote: > Now that we have CI, and that pm_rpm fully passes (I guess the audio > folks have implemented proper runtime pm for snd-hda, hooray, pls > confirm) it's time to enable this again by default. > > Real goal here is to have 1 configuration only that we fully support, > instead of tons of different codes with every user/customer tuning it > differently. And really, power stuff should work by default, and > should be enabled by everywhere where it is save to do so. > > v2: Completely new commit message, a few years passed since v1 ... > > Cc: Takashi Iwai <tiwai@suse.de> > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > Cc: "Yang, Libin" <libin.yang@intel.com> > Cc: "Lin, Mengdong" <mengdong.lin@intel.com> > Cc: "Li, Jocelyn" <jocelyn.li@intel.com> > Cc: "Kaskinen, Tanu" <tanu.kaskinen@intel.com> > Cc: "Zanoni, Paulo R" <paulo.r.zanoni@intel.com> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> lgtm, Reviewed-by: David Weinehall <david.weinehall@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 8315499452dc..dc24d008d8d4 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -3232,7 +3232,7 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > struct pci_dev *pdev = dev_priv->drm.pdev; > struct device *kdev = &pdev->dev; > > - pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */ > + pm_runtime_set_autosuspend_delay(kdev, 100); > pm_runtime_mark_last_busy(kdev); > > /* > @@ -3251,6 +3251,8 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > pm_runtime_use_autosuspend(kdev); > } > > + pm_runtime_allow(kdev); > + > /* > * The core calls the driver load handler with an RPM reference held. > * We drop that here and will reacquire it during unloading in > -- > 2.15.0.rc2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2017-11-08 14:25 ` [PATCH] " David Weinehall @ 2017-11-16 18:24 ` David Weinehall 2017-11-16 20:45 ` Paulo Zanoni 2017-11-17 8:39 ` David Weinehall 0 siblings, 2 replies; 19+ messages in thread From: David Weinehall @ 2017-11-16 18:24 UTC (permalink / raw) To: Daniel Vetter, Intel Graphics Development, Zanoni, Paulo R, Takashi Iwai, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter On Wed, Nov 08, 2017 at 04:25:42PM +0200, David Weinehall wrote: > On Tue, Nov 07, 2017 at 05:18:21PM +0100, Daniel Vetter wrote: > > Now that we have CI, and that pm_rpm fully passes (I guess the audio > > folks have implemented proper runtime pm for snd-hda, hooray, pls > > confirm) it's time to enable this again by default. > > > > Real goal here is to have 1 configuration only that we fully support, > > instead of tons of different codes with every user/customer tuning it > > differently. And really, power stuff should work by default, and > > should be enabled by everywhere where it is save to do so. > > > > v2: Completely new commit message, a few years passed since v1 ... > > > > Cc: Takashi Iwai <tiwai@suse.de> > > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > > Cc: "Yang, Libin" <libin.yang@intel.com> > > Cc: "Lin, Mengdong" <mengdong.lin@intel.com> > > Cc: "Li, Jocelyn" <jocelyn.li@intel.com> > > Cc: "Kaskinen, Tanu" <tanu.kaskinen@intel.com> > > Cc: "Zanoni, Paulo R" <paulo.r.zanoni@intel.com> > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > lgtm, > > Reviewed-by: David Weinehall <david.weinehall@linux.intel.com> Been testing a bit; test results are a bit discouraging when it comes to idle power consumption. Our nightly test suite logs idle power consumption before running any tests, after running all tests, and then finally after running powertop --auto-tune. The before and after cases are similar with and without patch, but not so for the auto-tune case. Without this patch, powertop --auto-tune yields a massive improvement (on NUC6i5 the power consumption drops with more than a factor of 3), while with this patch the power consumption just drops with 10% or so. Judging by the powertop output it seems as though we're getting a lot of interrupts from i915. * * * Top 10 Power Consumers * * * With patch: Usage;Events/s;Category;Description 0,5%; 75,1;Interrupt;[124] i915 0,3%; 48,4;Process;/usr/lib/xorg/Xorg -core :0 -seat seat0 -auth /var/run/lightdm/root/:0 -nolisten tcp vt7 -novtswitch 0,1%; 42,8;Timer;hrtimer_wakeup 0,0%; 34,9;Timer;tick_sched_timer 4,2%; 1,1;kWork;i915_hpd_poll_init_work 0,1%; 14,0;Process;python2 /opt/scripts/dut/dutlaunch/launch2.py --workspace=/opt/jenkins/workspace/Custom_test --iterations=1 idlepower_before un 0,0%; 13,3;Process;[rcu_preempt] 0,8%; 1,7;Process;python /opt/scripts/dut/perf-meter.py --avgskip 1 --name perf-meter --infofile /tmp/testname GLBenchmark testfw_app synmark2 he 0,0%; 3,0;Process;compiz 0,7%; 0,11;kWork;output_poll_execute Without the patch: Usage;Events/s;Category;Description 0,0%; 29,1;Timer;tick_sched_timer 0,1%; 19,9;Process;python2 /opt/scripts/dut/dutlaunch/launch.py --workspace=/opt/jenkins/workspace/Nightly_kernel_test/kernel/1510773665/SKL_6260U 0,0%; 13,2;Process;[rcu_preempt] 0,8%; 1,6;Process;python /opt/scripts/dut/perf-meter.py --avgskip 1 --name perf-meter --infofile /tmp/testname GLBenchmark testfw_app synmark2 he 0,0%; 2,5;Process;compiz 0,0%; 1,5;Process;java -jar slave.jar 0,0%; 1,2;Interrupt;[3] net_rx(softirq) 0,0%; 1,0;kWork;pci_pme_list_scan 0,0%; 0,9;Interrupt;[121] xhci_hcd 0,1%; 0,5;Process;perf-meter As can be seen the i915 driver doesn't even show up without the patch, while it's the main culprit with the patch. Just to eliminate DMC issues I'm going to do another run, but with DMC v1.27 instead of v1.26. Kind regards, David > > > --- > > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > > index 8315499452dc..dc24d008d8d4 100644 > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > @@ -3232,7 +3232,7 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > > struct pci_dev *pdev = dev_priv->drm.pdev; > > struct device *kdev = &pdev->dev; > > > > - pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */ > > + pm_runtime_set_autosuspend_delay(kdev, 100); > > pm_runtime_mark_last_busy(kdev); > > > > /* > > @@ -3251,6 +3251,8 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > > pm_runtime_use_autosuspend(kdev); > > } > > > > + pm_runtime_allow(kdev); > > + > > /* > > * The core calls the driver load handler with an RPM reference held. > > * We drop that here and will reacquire it during unloading in > > -- > > 2.15.0.rc2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2017-11-16 18:24 ` David Weinehall @ 2017-11-16 20:45 ` Paulo Zanoni 2017-11-16 21:11 ` Chris Wilson 2017-11-17 8:39 ` David Weinehall 1 sibling, 1 reply; 19+ messages in thread From: Paulo Zanoni @ 2017-11-16 20:45 UTC (permalink / raw) To: David Weinehall, Daniel Vetter, Intel Graphics Development, Takashi Iwai, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter Em Qui, 2017-11-16 às 20:24 +0200, David Weinehall escreveu: > On Wed, Nov 08, 2017 at 04:25:42PM +0200, David Weinehall wrote: > > On Tue, Nov 07, 2017 at 05:18:21PM +0100, Daniel Vetter wrote: > > > Now that we have CI, and that pm_rpm fully passes (I guess the > > > audio > > > folks have implemented proper runtime pm for snd-hda, hooray, pls > > > confirm) it's time to enable this again by default. > > > > > > Real goal here is to have 1 configuration only that we fully > > > support, > > > instead of tons of different codes with every user/customer > > > tuning it > > > differently. And really, power stuff should work by default, and > > > should be enabled by everywhere where it is save to do so. > > > > > > v2: Completely new commit message, a few years passed since v1 > > > ... > > > > > > Cc: Takashi Iwai <tiwai@suse.de> > > > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > > > Cc: "Yang, Libin" <libin.yang@intel.com> > > > Cc: "Lin, Mengdong" <mengdong.lin@intel.com> > > > Cc: "Li, Jocelyn" <jocelyn.li@intel.com> > > > Cc: "Kaskinen, Tanu" <tanu.kaskinen@intel.com> > > > Cc: "Zanoni, Paulo R" <paulo.r.zanoni@intel.com> > > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > > > lgtm, > > > > Reviewed-by: David Weinehall <david.weinehall@linux.intel.com> > > Been testing a bit; test results are a bit discouraging when it comes > to > idle power consumption. > > Our nightly test suite logs idle power consumption before running any > tests, after running all tests, and then finally after running > powertop --auto-tune. > > The before and after cases are similar with and without patch, > but not so for the auto-tune case. > > Without this patch, powertop --auto-tune yields a massive improvement > (on NUC6i5 the power consumption drops with more than a factor of 3), > while with this patch the power consumption just drops with 10% or > so. What happens if you keep the autosuspend delay to 10000? > > Judging by the powertop output it seems as though we're getting a lot > of > interrupts from i915. > > * * * Top 10 Power Consumers * * * > > With patch: > > Usage;Events/s;Category;Description > 0,5%; 75,1;Interrupt;[124] i915 > 0,3%; 48,4;Process;/usr/lib/xorg/Xorg -core :0 -seat seat0 -auth > /var/run/lightdm/root/:0 -nolisten tcp vt7 -novtswitch > 0,1%; 42,8;Timer;hrtimer_wakeup > 0,0%; 34,9;Timer;tick_sched_timer > 4,2%; 1,1;kWork;i915_hpd_poll_init_work > 0,1%; 14,0;Process;python2 /opt/scripts/dut/dutlaunch/launch2.py -- > workspace=/opt/jenkins/workspace/Custom_test --iterations=1 > idlepower_before un > 0,0%; 13,3;Process;[rcu_preempt] > 0,8%; 1,7;Process;python /opt/scripts/dut/perf-meter.py --avgskip > 1 --name perf-meter --infofile /tmp/testname GLBenchmark testfw_app > synmark2 he > 0,0%; 3,0;Process;compiz > 0,7%; 0,11;kWork;output_poll_execute > > Without the patch: > > Usage;Events/s;Category;Description > 0,0%; 29,1;Timer;tick_sched_timer > 0,1%; 19,9;Process;python2 /opt/scripts/dut/dutlaunch/launch.py -- > workspace=/opt/jenkins/workspace/Nightly_kernel_test/kernel/151077366 > 5/SKL_6260U > 0,0%; 13,2;Process;[rcu_preempt] > 0,8%; 1,6;Process;python /opt/scripts/dut/perf-meter.py --avgskip > 1 --name perf-meter --infofile /tmp/testname GLBenchmark testfw_app > synmark2 he > 0,0%; 2,5;Process;compiz > 0,0%; 1,5;Process;java -jar slave.jar > 0,0%; 1,2;Interrupt;[3] net_rx(softirq) > 0,0%; 1,0;kWork;pci_pme_list_scan > 0,0%; 0,9;Interrupt;[121] xhci_hcd > 0,1%; 0,5;Process;perf-meter > > As can be seen the i915 driver doesn't even show up without the > patch, > while it's the main culprit with the patch. > > Just to eliminate DMC issues I'm going to do another run, but with > DMC > v1.27 instead of v1.26. > > > Kind regards, David > > > > > > --- > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++- > > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > > > b/drivers/gpu/drm/i915/intel_runtime_pm.c > > > index 8315499452dc..dc24d008d8d4 100644 > > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > > @@ -3232,7 +3232,7 @@ void intel_runtime_pm_enable(struct > > > drm_i915_private *dev_priv) > > > struct pci_dev *pdev = dev_priv->drm.pdev; > > > struct device *kdev = &pdev->dev; > > > > > > - pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */ > > > + pm_runtime_set_autosuspend_delay(kdev, 100); > > > pm_runtime_mark_last_busy(kdev); > > > > > > /* > > > @@ -3251,6 +3251,8 @@ void intel_runtime_pm_enable(struct > > > drm_i915_private *dev_priv) > > > pm_runtime_use_autosuspend(kdev); > > > } > > > > > > + pm_runtime_allow(kdev); > > > + > > > /* > > > * The core calls the driver load handler with an RPM > > > reference held. > > > * We drop that here and will reacquire it during > > > unloading in > > > -- > > > 2.15.0.rc2 > > > > > > _______________________________________________ > > > Intel-gfx mailing list > > > Intel-gfx@lists.freedesktop.org > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2017-11-16 20:45 ` Paulo Zanoni @ 2017-11-16 21:11 ` Chris Wilson 0 siblings, 0 replies; 19+ messages in thread From: Chris Wilson @ 2017-11-16 21:11 UTC (permalink / raw) To: Paulo Zanoni, David Weinehall, Daniel Vetter, Intel Graphics Development, Takashi Iwai, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter Quoting Paulo Zanoni (2017-11-16 20:45:26) > Em Qui, 2017-11-16 às 20:24 +0200, David Weinehall escreveu: > > On Wed, Nov 08, 2017 at 04:25:42PM +0200, David Weinehall wrote: > > > On Tue, Nov 07, 2017 at 05:18:21PM +0100, Daniel Vetter wrote: > > > > Now that we have CI, and that pm_rpm fully passes (I guess the > > > > audio > > > > folks have implemented proper runtime pm for snd-hda, hooray, pls > > > > confirm) it's time to enable this again by default. > > > > > > > > Real goal here is to have 1 configuration only that we fully > > > > support, > > > > instead of tons of different codes with every user/customer > > > > tuning it > > > > differently. And really, power stuff should work by default, and > > > > should be enabled by everywhere where it is save to do so. > > > > > > > > v2: Completely new commit message, a few years passed since v1 > > > > ... > > > > > > > > Cc: Takashi Iwai <tiwai@suse.de> > > > > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > > > > Cc: "Yang, Libin" <libin.yang@intel.com> > > > > Cc: "Lin, Mengdong" <mengdong.lin@intel.com> > > > > Cc: "Li, Jocelyn" <jocelyn.li@intel.com> > > > > Cc: "Kaskinen, Tanu" <tanu.kaskinen@intel.com> > > > > Cc: "Zanoni, Paulo R" <paulo.r.zanoni@intel.com> > > > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > > > > > lgtm, > > > > > > Reviewed-by: David Weinehall <david.weinehall@linux.intel.com> > > > > Been testing a bit; test results are a bit discouraging when it comes > > to > > idle power consumption. > > > > Our nightly test suite logs idle power consumption before running any > > tests, after running all tests, and then finally after running > > powertop --auto-tune. > > > > The before and after cases are similar with and without patch, > > but not so for the auto-tune case. > > > > Without this patch, powertop --auto-tune yields a massive improvement > > (on NUC6i5 the power consumption drops with more than a factor of 3), > > while with this patch the power consumption just drops with 10% or > > so. > > What happens if you keep the autosuspend delay to 10000? The problem with the extra hpd triggering a render and flip still remains, but less frequent. Remove compiz + desktop manager from the picture and see if that cures it. Then obviously you have to try each of the main desktop managers / display servers to see which have good/bad behaviour (if my hunch is correct). And if it does, we can't proceed with an aggressive default, but will have to recommend that the display managers set it according to their needs. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2017-11-16 18:24 ` David Weinehall 2017-11-16 20:45 ` Paulo Zanoni @ 2017-11-17 8:39 ` David Weinehall 1 sibling, 0 replies; 19+ messages in thread From: David Weinehall @ 2017-11-17 8:39 UTC (permalink / raw) To: Daniel Vetter, Intel Graphics Development, Zanoni, Paulo R, Takashi Iwai, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter On Thu, Nov 16, 2017 at 08:24:02PM +0200, David Weinehall wrote: > On Wed, Nov 08, 2017 at 04:25:42PM +0200, David Weinehall wrote: > > On Tue, Nov 07, 2017 at 05:18:21PM +0100, Daniel Vetter wrote: > > > Now that we have CI, and that pm_rpm fully passes (I guess the audio > > > folks have implemented proper runtime pm for snd-hda, hooray, pls > > > confirm) it's time to enable this again by default. > > > > > > Real goal here is to have 1 configuration only that we fully support, > > > instead of tons of different codes with every user/customer tuning it > > > differently. And really, power stuff should work by default, and > > > should be enabled by everywhere where it is save to do so. > > > > > > v2: Completely new commit message, a few years passed since v1 ... > > > > > > Cc: Takashi Iwai <tiwai@suse.de> > > > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > > > Cc: "Yang, Libin" <libin.yang@intel.com> > > > Cc: "Lin, Mengdong" <mengdong.lin@intel.com> > > > Cc: "Li, Jocelyn" <jocelyn.li@intel.com> > > > Cc: "Kaskinen, Tanu" <tanu.kaskinen@intel.com> > > > Cc: "Zanoni, Paulo R" <paulo.r.zanoni@intel.com> > > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > > > lgtm, > > > > Reviewed-by: David Weinehall <david.weinehall@linux.intel.com> > > Been testing a bit; test results are a bit discouraging when it comes to > idle power consumption. > > Our nightly test suite logs idle power consumption before running any > tests, after running all tests, and then finally after running > powertop --auto-tune. > > The before and after cases are similar with and without patch, > but not so for the auto-tune case. > > Without this patch, powertop --auto-tune yields a massive improvement > (on NUC6i5 the power consumption drops with more than a factor of 3), > while with this patch the power consumption just drops with 10% or so. With the 10s => 0.1s bit of the patch reverted there's no longer any --auto-tune regression. Kind regards, David _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH] drm/i915: Enable runtime pm
@ 2015-05-08 18:51 Daniel Vetter
2015-05-09 14:59 ` shuang.he
` (2 more replies)
0 siblings, 3 replies; 19+ messages in thread
From: Daniel Vetter @ 2015-05-08 18:51 UTC (permalink / raw)
To: Intel Graphics Development
Cc: Yang, Libin, Zanoni, Paulo R, Takashi Iwai, Daniel Vetter,
Kaskinen, Tanu, Liam Girdwood, Daniel Vetter
Like with every other feature that's not enabled by default we break
runtime pm support way too often by accident because the overall test
coverage isn't great. And it's been almost 2 years since we enabled
the power well code by default
commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Wed Jul 3 17:12:13 2013 -0300
drm/i915: switch disable_power_well default value to 1
It's really more than overdue for runtime pm itself to follow!
Note that in practice this wont do a hole lot yet, since we're still
gated on snd-hda-intel doing proper runtime pm. But I've discussed
this with Liam and we agreed that this needs to be done. And the audio
team is working to hold up their end of this bargain.
And the justification for updating the autosuspend delay to 100ms:
Quick measurment shows that we can do a full rpm cycle in about 5ms,
which means the delay should still be really conservative from a power
conservation pov. The only workload that would suffer from ping-pong
is also only gpu/compute with all screens off. 100ms should cover any
kind of latency with submitting follow-up batches.
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Liam Girdwood <liam.r.girdwood@intel.com>
Cc: Yang, Libin <libin.yang@intel.com>
Cc: Lin, Mengdong <mengdong.lin@intel.com>
Cc: Li, Jocelyn <jocelyn.li@intel.com>
Cc: Kaskinen, Tanu <tanu.kaskinen@intel.com>
Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 317b9b43d1c1..36ecbe275dd9 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1919,9 +1919,10 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv)
return;
}
- pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */
+ pm_runtime_set_autosuspend_delay(device, 100);
pm_runtime_mark_last_busy(device);
pm_runtime_use_autosuspend(device);
+ pm_runtime_allow(device);
pm_runtime_put_autosuspend(device);
}
--
2.1.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH] drm/i915: Enable runtime pm 2015-05-08 18:51 Daniel Vetter @ 2015-05-09 14:59 ` shuang.he 2015-05-12 17:40 ` Jesse Barnes 2015-06-16 8:34 ` Daniel Vetter 2 siblings, 0 replies; 19+ messages in thread From: shuang.he @ 2015-05-09 14:59 UTC (permalink / raw) To: shuang.he, ethan.gao, intel-gfx, daniel.vetter Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) Task id: 6366 -------------------------------------Summary------------------------------------- Platform Delta drm-intel-nightly Series Applied PNV 276/276 276/276 ILK 302/302 302/302 SNB 316/316 316/316 IVB 342/342 342/342 BYT 286/286 286/286 BDW 321/321 321/321 -------------------------------------Detailed------------------------------------- Platform Test drm-intel-nightly Series Applied Note: You need to pay more attention to line start with '*' _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2015-05-08 18:51 Daniel Vetter 2015-05-09 14:59 ` shuang.he @ 2015-05-12 17:40 ` Jesse Barnes 2015-06-16 8:34 ` Daniel Vetter 2 siblings, 0 replies; 19+ messages in thread From: Jesse Barnes @ 2015-05-12 17:40 UTC (permalink / raw) To: Daniel Vetter, Intel Graphics Development Cc: Yang, Libin, Zanoni, Paulo R, Takashi Iwai, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter On 05/08/2015 11:51 AM, Daniel Vetter wrote: > Like with every other feature that's not enabled by default we break > runtime pm support way too often by accident because the overall test > coverage isn't great. And it's been almost 2 years since we enabled > the power well code by default > > commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41 > Author: Paulo Zanoni <paulo.r.zanoni@intel.com> > Date: Wed Jul 3 17:12:13 2013 -0300 > > drm/i915: switch disable_power_well default value to 1 > > It's really more than overdue for runtime pm itself to follow! > > Note that in practice this wont do a hole lot yet, since we're still > gated on snd-hda-intel doing proper runtime pm. But I've discussed > this with Liam and we agreed that this needs to be done. And the audio > team is working to hold up their end of this bargain. > > And the justification for updating the autosuspend delay to 100ms: > Quick measurment shows that we can do a full rpm cycle in about 5ms, > which means the delay should still be really conservative from a power > conservation pov. The only workload that would suffer from ping-pong > is also only gpu/compute with all screens off. 100ms should cover any > kind of latency with submitting follow-up batches. > > Cc: Takashi Iwai <tiwai@suse.de> > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > Cc: Yang, Libin <libin.yang@intel.com> > Cc: Lin, Mengdong <mengdong.lin@intel.com> > Cc: Li, Jocelyn <jocelyn.li@intel.com> > Cc: Kaskinen, Tanu <tanu.kaskinen@intel.com> > Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 317b9b43d1c1..36ecbe275dd9 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -1919,9 +1919,10 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > return; > } > > - pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */ > + pm_runtime_set_autosuspend_delay(device, 100); > pm_runtime_mark_last_busy(device); > pm_runtime_use_autosuspend(device); > + pm_runtime_allow(device); > > pm_runtime_put_autosuspend(device); > } > This also changes the timeout... it shouldn't break anything, but it would be good to get some numbers from Eero's team on this. It might be better to use a lower or higher number based on a typical desktop workload by default (though I guess the user or distro can do their own tuning and override the value too). Jesse _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2015-05-08 18:51 Daniel Vetter 2015-05-09 14:59 ` shuang.he 2015-05-12 17:40 ` Jesse Barnes @ 2015-06-16 8:34 ` Daniel Vetter 2015-06-16 10:42 ` Liam Girdwood 2015-06-16 12:23 ` Paulo Zanoni 2 siblings, 2 replies; 19+ messages in thread From: Daniel Vetter @ 2015-06-16 8:34 UTC (permalink / raw) To: Intel Graphics Development Cc: Yang, Libin, Zanoni, Paulo R, Takashi Iwai, Daniel Vetter, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter Can I get an ack on this please? The audio folks already move ahead http://permalink.gmane.org/gmane.linux.alsa.devel/139831 Would be embarassing if we are late to the party we organized ourselves ... -Daniel On Fri, May 8, 2015 at 8:51 PM, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > Like with every other feature that's not enabled by default we break > runtime pm support way too often by accident because the overall test > coverage isn't great. And it's been almost 2 years since we enabled > the power well code by default > > commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41 > Author: Paulo Zanoni <paulo.r.zanoni@intel.com> > Date: Wed Jul 3 17:12:13 2013 -0300 > > drm/i915: switch disable_power_well default value to 1 > > It's really more than overdue for runtime pm itself to follow! > > Note that in practice this wont do a hole lot yet, since we're still > gated on snd-hda-intel doing proper runtime pm. But I've discussed > this with Liam and we agreed that this needs to be done. And the audio > team is working to hold up their end of this bargain. > > And the justification for updating the autosuspend delay to 100ms: > Quick measurment shows that we can do a full rpm cycle in about 5ms, > which means the delay should still be really conservative from a power > conservation pov. The only workload that would suffer from ping-pong > is also only gpu/compute with all screens off. 100ms should cover any > kind of latency with submitting follow-up batches. > > Cc: Takashi Iwai <tiwai@suse.de> > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > Cc: Yang, Libin <libin.yang@intel.com> > Cc: Lin, Mengdong <mengdong.lin@intel.com> > Cc: Li, Jocelyn <jocelyn.li@intel.com> > Cc: Kaskinen, Tanu <tanu.kaskinen@intel.com> > Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 317b9b43d1c1..36ecbe275dd9 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -1919,9 +1919,10 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > return; > } > > - pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */ > + pm_runtime_set_autosuspend_delay(device, 100); > pm_runtime_mark_last_busy(device); > pm_runtime_use_autosuspend(device); > + pm_runtime_allow(device); > > pm_runtime_put_autosuspend(device); > } > -- > 2.1.0 > -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2015-06-16 8:34 ` Daniel Vetter @ 2015-06-16 10:42 ` Liam Girdwood 2015-06-18 7:46 ` Yang, Libin 2015-06-16 12:23 ` Paulo Zanoni 1 sibling, 1 reply; 19+ messages in thread From: Liam Girdwood @ 2015-06-16 10:42 UTC (permalink / raw) To: Daniel Vetter, Lin, Mengdong Cc: Yang, Libin, Zanoni, Paulo R, Takashi Iwai, Intel Graphics Development, Kaskinen, Tanu, Daniel Vetter On Tue, 2015-06-16 at 10:34 +0200, Daniel Vetter wrote: > Can I get an ack on this please? The audio folks already move ahead > > http://permalink.gmane.org/gmane.linux.alsa.devel/139831 > > Would be embarassing if we are late to the party we organized ourselves ... > -Daniel > > Mengdong, Libin - I assume someone has tested this ? could someone Ack. Thanks Liam > On Fri, May 8, 2015 at 8:51 PM, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > > Like with every other feature that's not enabled by default we break > > runtime pm support way too often by accident because the overall test > > coverage isn't great. And it's been almost 2 years since we enabled > > the power well code by default > > > > commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41 > > Author: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Date: Wed Jul 3 17:12:13 2013 -0300 > > > > drm/i915: switch disable_power_well default value to 1 > > > > It's really more than overdue for runtime pm itself to follow! > > > > Note that in practice this wont do a hole lot yet, since we're still > > gated on snd-hda-intel doing proper runtime pm. But I've discussed > > this with Liam and we agreed that this needs to be done. And the audio > > team is working to hold up their end of this bargain. > > > > And the justification for updating the autosuspend delay to 100ms: > > Quick measurment shows that we can do a full rpm cycle in about 5ms, > > which means the delay should still be really conservative from a power > > conservation pov. The only workload that would suffer from ping-pong > > is also only gpu/compute with all screens off. 100ms should cover any > > kind of latency with submitting follow-up batches. > > > > Cc: Takashi Iwai <tiwai@suse.de> > > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > > Cc: Yang, Libin <libin.yang@intel.com> > > Cc: Lin, Mengdong <mengdong.lin@intel.com> > > Cc: Li, Jocelyn <jocelyn.li@intel.com> > > Cc: Kaskinen, Tanu <tanu.kaskinen@intel.com> > > Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com> > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > --- > > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > > index 317b9b43d1c1..36ecbe275dd9 100644 > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > @@ -1919,9 +1919,10 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) > > return; > > } > > > > - pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */ > > + pm_runtime_set_autosuspend_delay(device, 100); > > pm_runtime_mark_last_busy(device); > > pm_runtime_use_autosuspend(device); > > + pm_runtime_allow(device); > > > > pm_runtime_put_autosuspend(device); > > } > > -- > > 2.1.0 > > > > > --------------------------------------------------------------------- Intel Corporation (UK) Limited Registered No. 1134945 (England) Registered Office: Pipers Way, Swindon SN3 1RJ VAT No: 860 2173 47 This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2015-06-16 10:42 ` Liam Girdwood @ 2015-06-18 7:46 ` Yang, Libin 0 siblings, 0 replies; 19+ messages in thread From: Yang, Libin @ 2015-06-18 7:46 UTC (permalink / raw) To: Girdwood, Liam R, Daniel Vetter, Lin, Mengdong Cc: Zanoni, Paulo R, Takashi Iwai, Intel Graphics Development, Kaskinen, Tanu, Vetter, Daniel, Zhang, KeqiaoX K Hi Liam, > -----Original Message----- > From: Girdwood, Liam R > Sent: Tuesday, June 16, 2015 6:42 PM > To: Daniel Vetter; Lin, Mengdong; Yang, Libin > Cc: Intel Graphics Development; Takashi Iwai; Yang, Libin; Lin, > Mengdong; Li, Jocelyn; Kaskinen, Tanu; Zanoni, Paulo R; Vetter, Daniel > Subject: Re: [PATCH] drm/i915: Enable runtime pm > > On Tue, 2015-06-16 at 10:34 +0200, Daniel Vetter wrote: > > Can I get an ack on this please? The audio folks already move ahead > > > > http://permalink.gmane.org/gmane.linux.alsa.devel/139831 > > > > Would be embarassing if we are late to the party we organized > ourselves ... > > -Daniel > > > > > > Mengdong, Libin - I assume someone has tested this ? could someone > Ack. Our patches are ready for this feature. Suppose Keqiao has test this feature. > > Thanks > > Liam > > > On Fri, May 8, 2015 at 8:51 PM, Daniel Vetter <daniel.vetter@ffwll.ch> > wrote: > > > Like with every other feature that's not enabled by default we > break > > > runtime pm support way too often by accident because the overall > test > > > coverage isn't great. And it's been almost 2 years since we enabled > > > the power well code by default > > > > > > commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41 > > > Author: Paulo Zanoni <paulo.r.zanoni@intel.com> > > > Date: Wed Jul 3 17:12:13 2013 -0300 > > > > > > drm/i915: switch disable_power_well default value to 1 > > > > > > It's really more than overdue for runtime pm itself to follow! > > > > > > Note that in practice this wont do a hole lot yet, since we're still > > > gated on snd-hda-intel doing proper runtime pm. But I've > discussed > > > this with Liam and we agreed that this needs to be done. And the > audio > > > team is working to hold up their end of this bargain. > > > > > > And the justification for updating the autosuspend delay to 100ms: > > > Quick measurment shows that we can do a full rpm cycle in about > 5ms, > > > which means the delay should still be really conservative from a > power > > > conservation pov. The only workload that would suffer from ping- > pong > > > is also only gpu/compute with all screens off. 100ms should cover > any > > > kind of latency with submitting follow-up batches. > > > > > > Cc: Takashi Iwai <tiwai@suse.de> > > > Cc: Liam Girdwood <liam.r.girdwood@intel.com> > > > Cc: Yang, Libin <libin.yang@intel.com> > > > Cc: Lin, Mengdong <mengdong.lin@intel.com> > > > Cc: Li, Jocelyn <jocelyn.li@intel.com> > > > Cc: Kaskinen, Tanu <tanu.kaskinen@intel.com> > > > Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com> > > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > > --- > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 ++- > > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > > > index 317b9b43d1c1..36ecbe275dd9 100644 > > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > > @@ -1919,9 +1919,10 @@ void intel_runtime_pm_enable(struct > drm_i915_private *dev_priv) > > > return; > > > } > > > > > > - pm_runtime_set_autosuspend_delay(device, 10000); /* 10s > */ > > > + pm_runtime_set_autosuspend_delay(device, 100); > > > pm_runtime_mark_last_busy(device); > > > pm_runtime_use_autosuspend(device); > > > + pm_runtime_allow(device); > > > > > > pm_runtime_put_autosuspend(device); > > > } > > > -- > > > 2.1.0 > > > > > > > > > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2015-06-16 8:34 ` Daniel Vetter 2015-06-16 10:42 ` Liam Girdwood @ 2015-06-16 12:23 ` Paulo Zanoni 2015-06-16 12:26 ` Paulo Zanoni 1 sibling, 1 reply; 19+ messages in thread From: Paulo Zanoni @ 2015-06-16 12:23 UTC (permalink / raw) To: Daniel Vetter Cc: Yang, Libin, Conselvan De Oliveira, Ander, Zanoni, Paulo R, Takashi Iwai, Intel Graphics Development, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter 2015-06-16 5:34 GMT-03:00 Daniel Vetter <daniel.vetter@ffwll.ch>: > Can I get an ack on this please? The audio folks already move ahead > > http://permalink.gmane.org/gmane.linux.alsa.devel/139831 > > Would be embarassing if we are late to the party we organized ourselves ... The situation is already embarassing for us :) pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ sudo ./pm_rpm --quick 2>&1 | tee pm_rpm.txt (lots of stuff) pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ ./sumario.sh pm_rpm.txt Subtest drm-resources-equal: FAIL (5.897s) Subtest dpms-lpsp: FAIL (10.045s) Subtest dpms-non-lpsp: FAIL (10.027s) Subtest cursor-dpms: FAIL (12.693s) Subtest legacy-planes-dpms: FAIL (12.636s) Subtest universal-planes-dpms: FAIL (12.719s) Subtest dpms-mode-unset-lpsp: FAIL (12.588s) Subtest dpms-mode-unset-non-lpsp: FAIL (10.234s) Subtest fences-dpms: FAIL (11.726s) Total: 41 SUCCESS: 32 FAIL: 9 SKIP: 0 pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ edmesg [ 166.007957] WARNING: CPU: 1 PID: 1648 at drivers/gpu/drm/i915/intel_uncore.c:620 hsw_unclaimed_reg_debug+0x75/0xa0 [i915]() [ 174.944917] WARNING: CPU: 1 PID: 1648 at drivers/gpu/drm/i915/intel_uncore.c:620 hsw_unclaimed_reg_debug+0x75/0xa0 [i915]() [ 327.095531] WARNING: CPU: 0 PID: 1648 at drivers/gpu/drm/i915/i915_gem.c:5316 i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() [ 327.096026] WARNING: CPU: 0 PID: 1648 at drivers/gpu/drm/i915/i915_gem.c:5316 i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() [ 327.096597] WARNING: CPU: 0 PID: 1648 at drivers/gpu/drm/i915/i915_gem.c:5316 i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() [ 327.096866] WARNING: CPU: 0 PID: 1648 at drivers/gpu/drm/i915/i915_gem.c:5316 i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() [ 327.097089] WARNING: CPU: 0 PID: 1648 at drivers/gpu/drm/i915/i915_gem.c:5316 i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() [ 327.097323] WARNING: CPU: 0 PID: 1648 at drivers/gpu/drm/i915/i915_gem.c:5316 i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() [ 327.097534] WARNING: CPU: 0 PID: 1648 at drivers/gpu/drm/i915/i915_gem.c:5316 i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() [ 327.097767] WARNING: CPU: 0 PID: 1648 at drivers/gpu/drm/i915/i915_gem.c:5316 i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ lspci -nn | grep VGA 00:02.0 VGA compatible controller [0300]: Intel Corporation Broadwell-U Integrated Graphics [8086:1616] (rev 09) Please notice that, if I remember correctly, just a few weeks ago we were passing everything, although we were having some dmesg WARNs. Now we're not even passing the tests anymore :( And I only see 2 pm_rpm bugs on bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90863 https://bugs.freedesktop.org/show_bug.cgi?id=90546 Why isn't PRTS/QA cathing stuff!? I'm sorry, but for now, I just can't give the ACK. > -Daniel > > > On Fri, May 8, 2015 at 8:51 PM, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: >> Like with every other feature that's not enabled by default we break >> runtime pm support way too often by accident because the overall test >> coverage isn't great. And it's been almost 2 years since we enabled >> the power well code by default >> >> commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41 >> Author: Paulo Zanoni <paulo.r.zanoni@intel.com> >> Date: Wed Jul 3 17:12:13 2013 -0300 >> >> drm/i915: switch disable_power_well default value to 1 >> >> It's really more than overdue for runtime pm itself to follow! >> >> Note that in practice this wont do a hole lot yet, since we're still >> gated on snd-hda-intel doing proper runtime pm. But I've discussed >> this with Liam and we agreed that this needs to be done. And the audio >> team is working to hold up their end of this bargain. >> >> And the justification for updating the autosuspend delay to 100ms: >> Quick measurment shows that we can do a full rpm cycle in about 5ms, >> which means the delay should still be really conservative from a power >> conservation pov. The only workload that would suffer from ping-pong >> is also only gpu/compute with all screens off. 100ms should cover any >> kind of latency with submitting follow-up batches. >> >> Cc: Takashi Iwai <tiwai@suse.de> >> Cc: Liam Girdwood <liam.r.girdwood@intel.com> >> Cc: Yang, Libin <libin.yang@intel.com> >> Cc: Lin, Mengdong <mengdong.lin@intel.com> >> Cc: Li, Jocelyn <jocelyn.li@intel.com> >> Cc: Kaskinen, Tanu <tanu.kaskinen@intel.com> >> Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com> >> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> >> --- >> drivers/gpu/drm/i915/intel_runtime_pm.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c >> index 317b9b43d1c1..36ecbe275dd9 100644 >> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c >> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c >> @@ -1919,9 +1919,10 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) >> return; >> } >> >> - pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */ >> + pm_runtime_set_autosuspend_delay(device, 100); >> pm_runtime_mark_last_busy(device); >> pm_runtime_use_autosuspend(device); >> + pm_runtime_allow(device); >> >> pm_runtime_put_autosuspend(device); >> } >> -- >> 2.1.0 >> > > > > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2015-06-16 12:23 ` Paulo Zanoni @ 2015-06-16 12:26 ` Paulo Zanoni 2015-06-16 18:40 ` Jesse Barnes 0 siblings, 1 reply; 19+ messages in thread From: Paulo Zanoni @ 2015-06-16 12:26 UTC (permalink / raw) To: Daniel Vetter Cc: Yang, Libin, Conselvan De Oliveira, Ander, Zanoni, Paulo R, Takashi Iwai, Intel Graphics Development, Kaskinen, Tanu, Liam Girdwood, Daniel Vetter 2015-06-16 9:23 GMT-03:00 Paulo Zanoni <przanoni@gmail.com>: > 2015-06-16 5:34 GMT-03:00 Daniel Vetter <daniel.vetter@ffwll.ch>: >> Can I get an ack on this please? The audio folks already move ahead >> >> http://permalink.gmane.org/gmane.linux.alsa.devel/139831 >> >> Would be embarassing if we are late to the party we organized ourselves ... > > The situation is already embarassing for us :) > > pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ sudo ./pm_rpm --quick 2>&1 > | tee pm_rpm.txt > (lots of stuff) > pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ ./sumario.sh pm_rpm.txt For details, please see: http://people.freedesktop.org/~pzanoni/pm_rpm.txt http://people.freedesktop.org/~pzanoni/dmesg.txt > Subtest drm-resources-equal: FAIL (5.897s) > Subtest dpms-lpsp: FAIL (10.045s) > Subtest dpms-non-lpsp: FAIL (10.027s) > Subtest cursor-dpms: FAIL (12.693s) > Subtest legacy-planes-dpms: FAIL (12.636s) > Subtest universal-planes-dpms: FAIL (12.719s) > Subtest dpms-mode-unset-lpsp: FAIL (12.588s) > Subtest dpms-mode-unset-non-lpsp: FAIL (10.234s) > Subtest fences-dpms: FAIL (11.726s) > > Total: 41 > SUCCESS: 32 > FAIL: 9 > SKIP: 0 > pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ edmesg > [ 166.007957] WARNING: CPU: 1 PID: 1648 at > drivers/gpu/drm/i915/intel_uncore.c:620 > hsw_unclaimed_reg_debug+0x75/0xa0 [i915]() > [ 174.944917] WARNING: CPU: 1 PID: 1648 at > drivers/gpu/drm/i915/intel_uncore.c:620 > hsw_unclaimed_reg_debug+0x75/0xa0 [i915]() > [ 327.095531] WARNING: CPU: 0 PID: 1648 at > drivers/gpu/drm/i915/i915_gem.c:5316 > i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() > [ 327.096026] WARNING: CPU: 0 PID: 1648 at > drivers/gpu/drm/i915/i915_gem.c:5316 > i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() > [ 327.096597] WARNING: CPU: 0 PID: 1648 at > drivers/gpu/drm/i915/i915_gem.c:5316 > i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() > [ 327.096866] WARNING: CPU: 0 PID: 1648 at > drivers/gpu/drm/i915/i915_gem.c:5316 > i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() > [ 327.097089] WARNING: CPU: 0 PID: 1648 at > drivers/gpu/drm/i915/i915_gem.c:5316 > i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() > [ 327.097323] WARNING: CPU: 0 PID: 1648 at > drivers/gpu/drm/i915/i915_gem.c:5316 > i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() > [ 327.097534] WARNING: CPU: 0 PID: 1648 at > drivers/gpu/drm/i915/i915_gem.c:5316 > i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() > [ 327.097767] WARNING: CPU: 0 PID: 1648 at > drivers/gpu/drm/i915/i915_gem.c:5316 > i915_gem_obj_ggtt_offset_view+0xad/0x100 [i915]() > pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ lspci -nn | grep VGA > 00:02.0 VGA compatible controller [0300]: Intel Corporation > Broadwell-U Integrated Graphics [8086:1616] (rev 09) > > Please notice that, if I remember correctly, just a few weeks ago we > were passing everything, although we were having some dmesg WARNs. Now > we're not even passing the tests anymore :( > > And I only see 2 pm_rpm bugs on bugzilla: > https://bugs.freedesktop.org/show_bug.cgi?id=90863 > https://bugs.freedesktop.org/show_bug.cgi?id=90546 > > Why isn't PRTS/QA cathing stuff!? > > I'm sorry, but for now, I just can't give the ACK. > >> -Daniel >> >> >> On Fri, May 8, 2015 at 8:51 PM, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: >>> Like with every other feature that's not enabled by default we break >>> runtime pm support way too often by accident because the overall test >>> coverage isn't great. And it's been almost 2 years since we enabled >>> the power well code by default >>> >>> commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41 >>> Author: Paulo Zanoni <paulo.r.zanoni@intel.com> >>> Date: Wed Jul 3 17:12:13 2013 -0300 >>> >>> drm/i915: switch disable_power_well default value to 1 >>> >>> It's really more than overdue for runtime pm itself to follow! >>> >>> Note that in practice this wont do a hole lot yet, since we're still >>> gated on snd-hda-intel doing proper runtime pm. But I've discussed >>> this with Liam and we agreed that this needs to be done. And the audio >>> team is working to hold up their end of this bargain. >>> >>> And the justification for updating the autosuspend delay to 100ms: >>> Quick measurment shows that we can do a full rpm cycle in about 5ms, >>> which means the delay should still be really conservative from a power >>> conservation pov. The only workload that would suffer from ping-pong >>> is also only gpu/compute with all screens off. 100ms should cover any >>> kind of latency with submitting follow-up batches. >>> >>> Cc: Takashi Iwai <tiwai@suse.de> >>> Cc: Liam Girdwood <liam.r.girdwood@intel.com> >>> Cc: Yang, Libin <libin.yang@intel.com> >>> Cc: Lin, Mengdong <mengdong.lin@intel.com> >>> Cc: Li, Jocelyn <jocelyn.li@intel.com> >>> Cc: Kaskinen, Tanu <tanu.kaskinen@intel.com> >>> Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com> >>> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> >>> --- >>> drivers/gpu/drm/i915/intel_runtime_pm.c | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c >>> index 317b9b43d1c1..36ecbe275dd9 100644 >>> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c >>> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c >>> @@ -1919,9 +1919,10 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv) >>> return; >>> } >>> >>> - pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */ >>> + pm_runtime_set_autosuspend_delay(device, 100); >>> pm_runtime_mark_last_busy(device); >>> pm_runtime_use_autosuspend(device); >>> + pm_runtime_allow(device); >>> >>> pm_runtime_put_autosuspend(device); >>> } >>> -- >>> 2.1.0 >>> >> >> >> >> -- >> Daniel Vetter >> Software Engineer, Intel Corporation >> +41 (0) 79 365 57 48 - http://blog.ffwll.ch >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > Paulo Zanoni -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH] drm/i915: Enable runtime pm 2015-06-16 12:26 ` Paulo Zanoni @ 2015-06-16 18:40 ` Jesse Barnes 0 siblings, 0 replies; 19+ messages in thread From: Jesse Barnes @ 2015-06-16 18:40 UTC (permalink / raw) To: Paulo Zanoni, Daniel Vetter Cc: Yang, Libin, Conselvan De Oliveira, Ander, Zanoni, Paulo R, Kaskinen, Tanu, Intel Graphics Development, Takashi Iwai, Liam Girdwood, Daniel Vetter On 06/16/2015 05:26 AM, Paulo Zanoni wrote: > 2015-06-16 9:23 GMT-03:00 Paulo Zanoni <przanoni@gmail.com>: >> 2015-06-16 5:34 GMT-03:00 Daniel Vetter <daniel.vetter@ffwll.ch>: >>> Can I get an ack on this please? The audio folks already move ahead >>> >>> http://permalink.gmane.org/gmane.linux.alsa.devel/139831 >>> >>> Would be embarassing if we are late to the party we organized ourselves ... >> >> The situation is already embarassing for us :) >> >> pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ sudo ./pm_rpm --quick 2>&1 >> | tee pm_rpm.txt >> (lots of stuff) >> pzanoni@nhoque:~/nfs/intel-gpu-tools/tests$ ./sumario.sh pm_rpm.txt > > For details, please see: > http://people.freedesktop.org/~pzanoni/pm_rpm.txt > http://people.freedesktop.org/~pzanoni/dmesg.txt > >> Subtest drm-resources-equal: FAIL (5.897s) >> Subtest dpms-lpsp: FAIL (10.045s) >> Subtest dpms-non-lpsp: FAIL (10.027s) >> Subtest cursor-dpms: FAIL (12.693s) >> Subtest legacy-planes-dpms: FAIL (12.636s) >> Subtest universal-planes-dpms: FAIL (12.719s) >> Subtest dpms-mode-unset-lpsp: FAIL (12.588s) >> Subtest dpms-mode-unset-non-lpsp: FAIL (10.234s) >> Subtest fences-dpms: FAIL (11.726s) Ugg... I'd like to make sure we have bugs on these and at least some kind of plan to fix them before enabling by default, otherwise we're just asking for another 'disable by default' patch just before the next release... Jesse _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2017-11-17 8:39 UTC | newest] Thread overview: 19+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-11-07 16:18 [PATCH] drm/i915: Enable runtime pm Daniel Vetter 2017-11-07 16:38 ` ✗ Fi.CI.BAT: failure for " Patchwork 2017-11-07 16:45 ` [PATCH] " Jani Nikula 2017-11-07 16:53 ` Daniel Vetter 2017-11-08 12:24 ` ✗ Fi.CI.BAT: warning for " Patchwork 2017-11-08 14:25 ` [PATCH] " David Weinehall 2017-11-16 18:24 ` David Weinehall 2017-11-16 20:45 ` Paulo Zanoni 2017-11-16 21:11 ` Chris Wilson 2017-11-17 8:39 ` David Weinehall -- strict thread matches above, loose matches on Subject: below -- 2015-05-08 18:51 Daniel Vetter 2015-05-09 14:59 ` shuang.he 2015-05-12 17:40 ` Jesse Barnes 2015-06-16 8:34 ` Daniel Vetter 2015-06-16 10:42 ` Liam Girdwood 2015-06-18 7:46 ` Yang, Libin 2015-06-16 12:23 ` Paulo Zanoni 2015-06-16 12:26 ` Paulo Zanoni 2015-06-16 18:40 ` Jesse Barnes
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox