From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH v2 1/1] drm/i915: Save PM interrupt register offsets in device info Date: Tue, 24 Oct 2017 20:48:48 +0300 Message-ID: <87tvyofncv.fsf@intel.com> References: <1508841673-643-1-git-send-email-sagar.a.kamble@intel.com> <150886342134.30884.9861875750276632930@mail.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id CFB4289F07 for ; Tue, 24 Oct 2017 17:49:12 +0000 (UTC) In-Reply-To: <150886342134.30884.9861875750276632930@mail.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson , Sagar Arun Kamble , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gVHVlLCAyNCBPY3QgMjAxNywgQ2hyaXMgV2lsc29uIDxjaHJpc0BjaHJpcy13aWxzb24uY28u dWs+IHdyb3RlOgo+IFF1b3RpbmcgU2FnYXIgQXJ1biBLYW1ibGUgKDIwMTctMTAtMjQgMTE6NDE6 MTMpCj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kZXZpY2VfaW5m by5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZGV2aWNlX2luZm8uYwo+PiBpbmRleCA4 NzVkNDI4Li5kMWE0OTExIDEwMDY0NAo+PiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRl bF9kZXZpY2VfaW5mby5jCj4+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rldmlj ZV9pbmZvLmMKPj4gQEAgLTQ2Miw0ICs0NjIsMTUgQEAgdm9pZCBpbnRlbF9kZXZpY2VfaW5mb19y dW50aW1lX2luaXQoc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmRldl9wcml2KQo+PiAgICAgICAg ICAgICAgICAgICAgICAgICAgaW5mby0+c3NldS5oYXNfc3Vic2xpY2VfcGcgPyAieSIgOiAibiIp Owo+PiAgICAgICAgIERSTV9ERUJVR19EUklWRVIoImhhcyBFVSBwb3dlciBnYXRpbmc6ICVzXG4i LAo+PiAgICAgICAgICAgICAgICAgICAgICAgICAgaW5mby0+c3NldS5oYXNfZXVfcGcgPyAieSIg OiAibiIpOwo+PiArCj4+ICsgICAgICAgLyogSW5pdGlhbGl6ZSBQTSBpbnRlcnJ1cHQgcmVnaXN0 ZXIgb2Zmc2V0cyAqLwo+PiArICAgICAgIGlmIChJTlRFTF9HRU4oZGV2X3ByaXYpID49IDgpIHsK Pj4gKyAgICAgICAgICAgICAgIGluZm8tPnBtX2lpcl9vZmZzZXQgPSBHRU44X0dUX0lJUigyKTsK Pj4gKyAgICAgICAgICAgICAgIGluZm8tPnBtX2ltcl9vZmZzZXQgPSBHRU44X0dUX0lNUigyKTsK Pj4gKyAgICAgICAgICAgICAgIGluZm8tPnBtX2llcl9vZmZzZXQgPSBHRU44X0dUX0lFUigyKTsK Pj4gKyAgICAgICB9IGVsc2Ugewo+PiArICAgICAgICAgICAgICAgaW5mby0+cG1faWlyX29mZnNl dCA9IEdFTjZfUE1JSVI7Cj4+ICsgICAgICAgICAgICAgICBpbmZvLT5wbV9pbXJfb2Zmc2V0ID0g R0VONl9QTUlNUjsKPj4gKyAgICAgICAgICAgICAgIGluZm8tPnBtX2llcl9vZmZzZXQgPSBHRU42 X1BNSUVSOwo+PiArICAgICAgIH0KPgo+IElmIHlvdSBhcmUgZ29pbmcgdG8gdGFrZSBhbm90aGVy IHBhc3MgYXQgdGhpcywgbW92ZSB0aGVzZSBpbnRvIHRoZQo+IHN0YXRpYyB0YWJsZXMgaW4gaTkx NV9wY2kuYwo+Cj4gVXBkYXRpbmcgR0VONl9GRUFUVVJFUyBhbmQgR0VOOF9GRUFUVVJFUyB3aWxs IHRoZW4gcGVyY29sYXRlIGludG8KPiBpbmRpdmlkdWFsIHBsYXRmb3JtIGRlZmluZXMuCgpMaWtl IEkgd3JvdGUgaW4gcmVwbHkgdG8gdjEsIEknbSBub3QgY29udmluY2VkIHdlIHNob3VsZCBkbyB0 aGlzIGF0IGFsbC4KCldoYXQgbWFrZXMgKnRoZXNlKiByZWdpc3RlcnMgc28gaW1wb3J0YW50IHRo ZXkgbXVzdCBiZSBpbiBkZXZpY2UgaW5mbz8KV2hhdCBtYWtlcyBtb3N0IG9mIGk5MTVfcmVnLmgg c28gdW5pbXBvcnRhbnQgdGhleSBkb24ndCBkZXNlcnZlIHRoZSBzYW1lCnRyZWF0bWVudD8gV2hl cmUgZG8geW91IGRyYXcgdGhlIGxpbmU/CgpJJ2QgZHJhdyB0aGUgbGluZSBhdCwgbm8gcmVnaXN0 ZXJzIGF0IGRldmljZSBpbmZvLgoKQlIsCkphbmkuCgotLSAKSmFuaSBOaWt1bGEsIEludGVsIE9w ZW4gU291cmNlIFRlY2hub2xvZ3kgQ2VudGVyCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3Rz LmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xp c3RpbmZvL2ludGVsLWdmeAo=