[PATCH] drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection

[PATCH] drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection

[Jani Nikula]

c9c4b6f6c283 ("drm/i915: fix swizzle detection for gen3") added a
complicated check for I915G/I945G. Pineview and other gen3 devices match
IS_MOBILE() anyway. Simplify.

Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_fence_reg.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 09193cfb5d8b..e03983973252 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -513,8 +513,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_i915_private *dev_priv)
 		swizzle_x = I915_BIT_6_SWIZZLE_NONE;
 		swizzle_y = I915_BIT_6_SWIZZLE_NONE;
 	} else if (IS_MOBILE(dev_priv) ||
-		   (IS_GEN3(dev_priv) &&
-		    !IS_G33(dev_priv) && !IS_PINEVIEW(dev_priv))) {
+		   IS_I915G(dev_priv) || IS_I945G(dev_priv)) {
 		uint32_t dcc;
 
 		/* On 9xx chipsets, channel interleave by the CPU is
-- 
2.1.4

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✗ Fi.CI.BAT: failure for drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection

[Patchwork]

== Series Details ==

Series: drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection
URL   : https://patchwork.freedesktop.org/series/16738/
State : failure

== Summary ==

Series 16738v1 drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection
https://patchwork.freedesktop.org/api/1.0/series/16738/revisions/1/mbox/

Test gem_ringfill:
        Subgroup basic-default-hang:
                incomplete -> PASS       (fi-snb-2600)
                pass       -> INCOMPLETE (fi-ivb-3520m)

fi-bdw-5557u     total:247  pass:233  dwarn:0   dfail:0   fail:0   skip:14 
fi-bsw-n3050     total:247  pass:208  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-t5700     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-j1900     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-hsw-4770r     total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-ilk-650       total:247  pass:195  dwarn:0   dfail:0   fail:0   skip:52 
fi-ivb-3520m     total:118  pass:105  dwarn:0   dfail:0   fail:0   skip:12 
fi-ivb-3770      total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-kbl-7500u     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6260u     total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-skl-6700hq    total:247  pass:227  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k     total:247  pass:224  dwarn:3   dfail:0   fail:0   skip:20 
fi-skl-6770hq    total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-snb-2520m     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-snb-2600      total:247  pass:215  dwarn:0   dfail:0   fail:0   skip:32 

d4ed6d3718cc5f9f2832177d292f425466a8a460 drm-tip: 2016y-12m-13d-10h-41m-44s UTC integration manifest
5f86459 drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3273/
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Re: [PATCH] drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection

[Daniel Vetter]

On Tue, Dec 13, 2016 at 01:10:59PM +0200, Jani Nikula wrote:
> c9c4b6f6c283 ("drm/i915: fix swizzle detection for gen3") added a
> complicated check for I915G/I945G. Pineview and other gen3 devices match
> IS_MOBILE() anyway. Simplify.
> 
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_fence_reg.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> index 09193cfb5d8b..e03983973252 100644
> --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> @@ -513,8 +513,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_i915_private *dev_priv)
>  		swizzle_x = I915_BIT_6_SWIZZLE_NONE;
>  		swizzle_y = I915_BIT_6_SWIZZLE_NONE;
>  	} else if (IS_MOBILE(dev_priv) ||
> -		   (IS_GEN3(dev_priv) &&
> -		    !IS_G33(dev_priv) && !IS_PINEVIEW(dev_priv))) {
> +		   IS_I915G(dev_priv) || IS_I945G(dev_priv)) {

Seems to miss i915gm and i945gm. Hm, but then you mention those are
mobile. Then I guess it's a bikeshed, but at least a correct one.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Daniel

>  		uint32_t dcc;
>  
>  		/* On 9xx chipsets, channel interleave by the CPU is
> -- 
> 2.1.4
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH] drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection

[Chris Wilson]

On Wed, Dec 14, 2016 at 02:00:11PM +0100, Daniel Vetter wrote:
> On Tue, Dec 13, 2016 at 01:10:59PM +0200, Jani Nikula wrote:
> > c9c4b6f6c283 ("drm/i915: fix swizzle detection for gen3") added a
> > complicated check for I915G/I945G. Pineview and other gen3 devices match
> > IS_MOBILE() anyway. Simplify.
> > 
> > Cc: Daniel Vetter <daniel@ffwll.ch>
> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem_fence_reg.c | 3 +--
> >  1 file changed, 1 insertion(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> > index 09193cfb5d8b..e03983973252 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> > @@ -513,8 +513,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_i915_private *dev_priv)
> >  		swizzle_x = I915_BIT_6_SWIZZLE_NONE;
> >  		swizzle_y = I915_BIT_6_SWIZZLE_NONE;
> >  	} else if (IS_MOBILE(dev_priv) ||
> > -		   (IS_GEN3(dev_priv) &&
> > -		    !IS_G33(dev_priv) && !IS_PINEVIEW(dev_priv))) {
> > +		   IS_I915G(dev_priv) || IS_I945G(dev_priv)) {
> 
> Seems to miss i915gm and i945gm. Hm, but then you mention those are
> mobile. Then I guess it's a bikeshed, but at least a correct one.

Considering the discussion over the last few days, I'd rather see
IS_MOBILE() phased out and not relied upon even more.
/bikeshed
-Chris

-- 
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Re: [PATCH] drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection

[Jani Nikula]

On Wed, 14 Dec 2016, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Wed, Dec 14, 2016 at 02:00:11PM +0100, Daniel Vetter wrote:
>> On Tue, Dec 13, 2016 at 01:10:59PM +0200, Jani Nikula wrote:
>> > c9c4b6f6c283 ("drm/i915: fix swizzle detection for gen3") added a
>> > complicated check for I915G/I945G. Pineview and other gen3 devices match
>> > IS_MOBILE() anyway. Simplify.
>> > 
>> > Cc: Daniel Vetter <daniel@ffwll.ch>
>> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/i915_gem_fence_reg.c | 3 +--
>> >  1 file changed, 1 insertion(+), 2 deletions(-)
>> > 
>> > diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
>> > index 09193cfb5d8b..e03983973252 100644
>> > --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
>> > +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
>> > @@ -513,8 +513,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_i915_private *dev_priv)
>> >  		swizzle_x = I915_BIT_6_SWIZZLE_NONE;
>> >  		swizzle_y = I915_BIT_6_SWIZZLE_NONE;
>> >  	} else if (IS_MOBILE(dev_priv) ||
>> > -		   (IS_GEN3(dev_priv) &&
>> > -		    !IS_G33(dev_priv) && !IS_PINEVIEW(dev_priv))) {
>> > +		   IS_I915G(dev_priv) || IS_I945G(dev_priv)) {
>> 
>> Seems to miss i915gm and i945gm. Hm, but then you mention those are
>> mobile. Then I guess it's a bikeshed, but at least a correct one.
>
> Considering the discussion over the last few days, I'd rather see
> IS_MOBILE() phased out and not relied upon even more.
> /bikeshed

I'm afraid I already pushed (thanks for the review Daniel).

Last I looked, IS_MOBILE() seems like difficult to untangle, and this is
not one of the hard spots. Simpler conditions should actually be
helpful.

BR,
Jani.



-- 
Jani Nikula, Intel Open Source Technology Center
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