[PATCH v2 2/4] drm/i915/gen9: Add WaDisableCtxRestoreArbitration workaround

Arun Siluvery
2015-07-07T17:41:52Z

In Indirect and Per context w/a batch buffer,
+WaDisableCtxRestoreArbitration

v2: SKL revision id was used for BXT, copy paste error found during
internal review (Bob Beckett).

Cc: Robert Beckett <robert.beckett@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
---
drivers/gpu/drm/i915/intel_lrc.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 1e88b3b..e84fc52 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1274,10 +1274,13 @@ static int gen9_init_indirectctx_bb(struct intel_engine_cs *ring,
uint32_t *const batch,
uint32_t *offset)
{
+ struct drm_device *dev = ring->dev;
uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);

- /* FIXME: Replace me with WA */
- wa_ctx_emit(batch, MI_NOOP);
+ /* WaDisableCtxRestoreArbitration:skl,bxt */
+ if ((IS_SKYLAKE(dev) && (INTEL_REVID(dev) <= SKL_REVID_D0)) ||
+ (IS_BROXTON(dev) && (INTEL_REVID(dev) == BXT_REVID_A0)))
+ wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_DISABLE);

/* Pad to end of cacheline */
while (index % CACHELINE_DWORDS)
@@ -1291,8 +1294,14 @@ static int gen9_init_perctx_bb(struct intel_engine_cs *ring,
uint32_t *const batch,
uint32_t *offset)
{
+ struct drm_device *dev = ring->dev;
uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);

+ /* WaDisableCtxRestoreArbitration:skl,bxt */
+ if ((IS_SKYLAKE(dev) && (INTEL_REVID(dev) <= SKL_REVID_D0)) ||
+ (IS_BROXTON(dev) && (INTEL_REVID(dev) == BXT_REVID_A0)))
+ wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_ENABLE);
+
wa_ctx_emit(batch, MI_BATCH_BUFFER_END);

return wa_ctx_end(wa_ctx, *offset = index, 1);
--
1.9.1