From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eric Anholt <eric@anholt.net>
Subject: Re: [PATCH 2/3] drm/i915: Force sync command ordering
	(Gen6+)
Date: Wed, 07 Dec 2011 12:54:07 -0800
Message-ID: <87ty5cf6hc.fsf@eliezer.anholt.net>
References: <1319337685-26195-1-git-send-email-ben@bwidawsk.net>
	<1319337685-26195-2-git-send-email-ben@bwidawsk.net>
	<87fwgwfcvy.fsf@eliezer.anholt.net>
	<20111207103841.7627b5fe@jbarnes-desktop>
	<20111207115805.13f5cfde@jbarnes-desktop>
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="===============1069032042=="
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
In-Reply-To: <20111207115805.13f5cfde@jbarnes-desktop>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Ben Widawsky <ben@bwidawsk.net>, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

--===============1069032042==
Content-Type: multipart/signed; boundary="=-=-=";
	micalg=pgp-sha1; protocol="application/pgp-signature"

--=-=-=
Content-Transfer-Encoding: quoted-printable

On Wed, 7 Dec 2011 11:58:05 -0800, Jesse Barnes <jbarnes@virtuousgeek.org> =
wrote:
> On Wed, 7 Dec 2011 10:38:41 -0800
> Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>=20
> > On Wed, 07 Dec 2011 10:35:45 -0800
> > Eric Anholt <eric@anholt.net> wrote:
> >=20
> > > On Sat, 22 Oct 2011 19:41:24 -0700, Ben Widawsky <ben@bwidawsk.net> w=
rote:
> > > > The docs say this is required for Gen7, and since the bit was added=
 for
> > > > Gen6, we are also setting it there pit pf paranoia. Particularly as
> > > > Chris points out, if PIPE_CONTROL counts as a 3d state packet.
> > > >=20
> > > > This was found through doc inspection by Ken and applies to Gen6+;
> > > >=20
> > > > Cc: Keith Packard <keithp@keithp.com>
> > > > Reported-by: Kenneth Graunke <kenneth@whitecape.org>
> > > > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> > > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > > Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> > >=20
> > > Reviewed-by: Eric Anholt <eric@anholt.net>
> > >=20
> > > however, it doesn't appear to help Ivybridge IRQ troubles.
> >=20
> > You could try something like the below to force the use of PIPE_NOTIFY
> > instead.  Only lightly tested on IVB when we had lots of other bugs, so
> > I'm not sure if it works at all.
>=20
> Though if it's the blit ring hanging, you'd have to try using a
> flush_dw notify (if such a thing exists) instead...

Yeah, MI_FLUSH_DW as opposed to MI_STORE_DW + MI_USER_INTERRUPT.

--=-=-=
Content-Type: application/pgp-signature

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)

iEYEARECAAYFAk7f0m8ACgkQHUdvYGzw6ve+rwCfUmxBQZQFxrH502FdQK04d8wP
ugcAoIeyPh20YIbBsz7v8HtDDvdTEzTC
=V5mx
-----END PGP SIGNATURE-----
--=-=-=--

--===============1069032042==
Content-Type: text/plain; charset="us-ascii"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Content-Disposition: inline

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

--===============1069032042==--