* [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
2024-06-26 5:00 [PATCH 0/5] Add HDMI PLL Algorithm for SNPS/C10PHY Ankit Nautiyal
@ 2024-06-26 5:00 ` Ankit Nautiyal
2024-06-26 10:04 ` Jani Nikula
` (2 more replies)
2024-06-26 5:00 ` [PATCH 2/5] drm/i915/snps_phy: Use " Ankit Nautiyal
` (6 subsequent siblings)
7 siblings, 3 replies; 25+ messages in thread
From: Ankit Nautiyal @ 2024-06-26 5:00 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: jani.nikula, ville.syrjala, mika.kahola, matthew.d.roper
Add helper _intel_phy_compute_hdmi_tmds_pll to calculate the necessary
parameters for configuring the HDMI PLL for SNPS MPLLB and C10 PHY.
The pll parameters are computed for desired pixel clock, curve data
and other inputs used for interpolation and finally stored in the
pll_state. Bspec:54032
Currently the helper is used to compute PLLs for DG2 SNPS PHY.
Support for computing Plls for C10 PHY is added in subsequent patches.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
.../drm/i915/display/intel_pll_algorithm.c | 252 ++++++++++++++++++
.../drm/i915/display/intel_pll_algorithm.h | 39 +++
3 files changed, 292 insertions(+)
create mode 100644 drivers/gpu/drm/i915/display/intel_pll_algorithm.c
create mode 100644 drivers/gpu/drm/i915/display/intel_pll_algorithm.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 4022e4499382..f1a293110bc6 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -334,6 +334,7 @@ i915-y += \
display/intel_lspcon.o \
display/intel_lvds.o \
display/intel_panel.o \
+ display/intel_pll_algorithm.o \
display/intel_pps.o \
display/intel_qp_tables.o \
display/intel_sdvo.o \
diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.c b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
new file mode 100644
index 000000000000..d935715bd3ab
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
@@ -0,0 +1,252 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2024 Synopsys, Inc., Intel Corporation
+ */
+
+#include <linux/math.h>
+#include "i915_reg.h"
+#include "intel_ddi.h"
+#include "intel_ddi_buf_trans.h"
+#include "intel_de.h"
+#include "intel_display_types.h"
+#include "intel_snps_phy.h"
+#include "intel_snps_phy_regs.h"
+#include "intel_pll_algorithm.h"
+
+#define INTEL_SNPS_PHY_HDMI_4999MHZ 4999999900ull
+#define INTEL_SNPS_PHY_HDMI_16GHZ 16000000000ull
+#define INTEL_SNPS_PHY_HDMI_9999MHZ (2 * INTEL_SNPS_PHY_HDMI_4999MHZ)
+
+#define CURVE0_MULTIPLIER 1000000000
+#define CURVE1_MULTIPLIER 100
+#define CURVE2_MULTIPLIER 1000000000000
+
+static int64_t interp(s64 x, s64 x1, s64 x2, s64 y1, s64 y2)
+{
+ s64 dydx;
+
+ dydx = DIV_ROUND_UP((y2 - y1) * 100000, (x2 - x1));
+
+ return (y1 + DIV_ROUND_UP(dydx * (x - x1), 100000));
+}
+
+static void get_ana_cp_int_prop(u32 vco_clk,
+ u32 refclk_postscalar,
+ int mpll_ana_v2i,
+ int c, int a,
+ const u64 curve_freq_hz[2][8],
+ const u64 curve_0[2][8],
+ const u64 curve_1[2][8],
+ const u64 curve_2[2][8],
+ u32 *ana_cp_int,
+ u32 *ana_cp_prop)
+{
+ u64 vco_div_refclk_float;
+ u64 o_397ced90;
+ u64 o_20c634d6;
+ u64 o_20c634d4;
+ u64 o_72019306;
+ u64 o_6593e82b;
+ u64 o_5cefc329;
+ u64 o_49960328;
+ u64 o_544adb37;
+ u64 o_4ef74e66;
+ u32 ana_cp_int_temp;
+ u64 temp1, temp2, temp3, temp4;
+
+ vco_div_refclk_float = vco_clk * (1000000000000 / refclk_postscalar);
+ o_397ced90 = interp(vco_clk, curve_freq_hz[c][a], curve_freq_hz[c][a + 1],
+ curve_0[c][a], curve_0[c][a + 1]);
+
+ o_20c634d6 = interp(vco_clk, curve_freq_hz[c][a], curve_freq_hz[c][a + 1],
+ curve_2[c][a], curve_2[c][a + 1]);
+
+ o_20c634d4 = interp(vco_clk, curve_freq_hz[c][a], curve_freq_hz[c][a + 1],
+ curve_1[c][a], curve_1[c][a + 1]);
+
+ o_20c634d4 /= CURVE1_MULTIPLIER;
+
+ temp1 = o_20c634d6 * (4 - mpll_ana_v2i);
+
+ o_72019306 = temp1 / 16000;
+ o_6593e82b = temp1 / 160;
+
+ temp2 = ((112008301 * (vco_div_refclk_float / 100000)));
+ o_5cefc329 = CURVE2_MULTIPLIER * (temp2 / (o_397ced90 * (o_20c634d4 / CURVE0_MULTIPLIER)));
+
+ ana_cp_int_temp = min(DIV_ROUND_CLOSEST(o_5cefc329 / o_72019306, CURVE2_MULTIPLIER), 127);
+ ana_cp_int_temp = max(1, ana_cp_int_temp);
+
+ *ana_cp_int = ana_cp_int_temp;
+
+ o_49960328 = o_72019306 * ana_cp_int_temp;
+
+ temp3 = o_20c634d4 * (o_49960328 * o_397ced90 / CURVE0_MULTIPLIER);
+ o_544adb37 = int_sqrt(DIV_ROUND_UP(temp3, vco_div_refclk_float) * (1000000000000 / 55));
+
+ temp4 = DIV_ROUND_UP(vco_div_refclk_float, 1000000);
+ o_4ef74e66 = (1460281 * DIV_ROUND_UP(o_544adb37 * temp4, o_20c634d4));
+
+ *ana_cp_prop = max(1, min(DIV_ROUND_UP(o_4ef74e66, o_6593e82b), 127));
+}
+
+static int _intel_phy_compute_hdmi_tmds_pll(u64 pixel_clock, u32 refclk,
+ u32 ref_range,
+ u32 ana_cp_int_gs,
+ u32 ana_cp_prop_gs,
+ const u64 curve_freq_hz[2][8],
+ const u64 curve_0[2][8],
+ const u64 curve_1[2][8],
+ const u64 curve_2[2][8],
+ u32 prescaler_divider,
+ struct pll_output_params *pll_params)
+{
+ /*datarate 10khz */
+ u64 datarate = pixel_clock * 10000;
+ u32 ssc_up_spread = 1;
+ u32 mpll_div5_en = 1;
+ u32 hdmi_div = 1;
+ u32 ana_cp_int;
+ u32 ana_cp_prop;
+ u32 refclk_postscalar = refclk >> prescaler_divider;
+ u32 tx_clk_div;
+ u64 vco_clk;
+ u32 vco_div_refclk_integer;
+ u32 vco_div_refclk_fracn;
+ u32 fracn_quot;
+ u32 fracn_rem;
+ u32 fracn_den;
+ u32 fracn_en;
+ u32 pmix_en;
+ u32 multiplier;
+ int mpll_ana_v2i;
+ int ana_freq_vco;
+ int c, a, j;
+
+ if (pixel_clock < 25175 || pixel_clock > 600000)
+ return -EINVAL;
+
+ /* Select appropriate v2i point */
+ if (datarate <= INTEL_SNPS_PHY_HDMI_9999MHZ) {
+ mpll_ana_v2i = 2;
+ tx_clk_div = ilog2(INTEL_SNPS_PHY_HDMI_9999MHZ / datarate);
+ } else {
+ mpll_ana_v2i = 3;
+ tx_clk_div = ilog2(INTEL_SNPS_PHY_HDMI_16GHZ / datarate);
+ }
+ vco_clk = (datarate << tx_clk_div) >> 1;
+
+ /* Highly accurate division, calculate fraction to 32 bits of precision */
+ vco_div_refclk_integer = vco_clk / refclk_postscalar;
+ vco_div_refclk_fracn = ((vco_clk % refclk_postscalar) << 32) / refclk_postscalar;
+ fracn_quot = vco_div_refclk_fracn >> 16;
+ fracn_rem = vco_div_refclk_fracn & 0xffff;
+ fracn_rem = fracn_rem - (fracn_rem >> 15);
+ fracn_den = 0xffff;
+ fracn_en = (fracn_quot != 0 || fracn_rem != 0) ? 1 : 0;
+ pmix_en = fracn_en;
+ multiplier = (vco_div_refclk_integer - 16) * 2;
+ /* Curve selection for ana_cp_* calculations. One curve hardcoded per v2i range */
+ c = mpll_ana_v2i - 2;
+
+ /* Find the right segment of the table */
+ for (j = 0; j < 8; j += 2) {
+ if (vco_clk <= curve_freq_hz[c][j + 1]) {
+ a = j;
+ ana_freq_vco = 3 - (a >> 1);
+ break;
+ }
+ }
+
+ get_ana_cp_int_prop(vco_clk, refclk_postscalar, mpll_ana_v2i, c, a,
+ curve_freq_hz, curve_0, curve_1, curve_2,
+ &ana_cp_int, &ana_cp_prop);
+
+ pll_params->ssc_up_spread = ssc_up_spread;
+ pll_params->mpll_div5_en = mpll_div5_en;
+ pll_params->hdmi_div = hdmi_div;
+ pll_params->ana_cp_int = ana_cp_int;
+ pll_params->refclk_postscalar = refclk_postscalar;
+ pll_params->tx_clk_div = tx_clk_div;
+ pll_params->fracn_quot = fracn_quot;
+ pll_params->fracn_rem = fracn_rem;
+ pll_params->fracn_den = fracn_den;
+ pll_params->fracn_en = fracn_en;
+ pll_params->pmix_en = pmix_en;
+ pll_params->multiplier = multiplier;
+ pll_params->ana_cp_prop = ana_cp_prop;
+ pll_params->mpll_ana_v2i = mpll_ana_v2i;
+ pll_params->ana_freq_vco = ana_freq_vco;
+
+ return 0;
+}
+
+int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_state *pll_state)
+{
+ struct pll_output_params pll_params;
+ u32 refclk = 100000000;
+ u32 prescaler_divider = 1;
+ u32 ref_range = 3;
+ u32 ana_cp_int_gs = 64;
+ u32 ana_cp_prop_gs = 124;
+ int ret;
+ /* x axis frequencies. One curve in each array per v2i point */
+ const u64 dg2_curve_freq_hz[2][8] = {
+ {2500000000, 3000000000, 3000000000, 3500000000, 3500000000, 4000000000, 4000000000, 5000000000},
+ {4000000000, 4600000000, 4601000000, 5400000000, 5401000000, 6600000000, 6601000000, 8001000000}};
+
+ /* y axis heights multiplied with 1000000000 */
+ const u64 dg2_curve_0[2][8] = {
+ {34149871, 39803269, 36034544, 40601014, 35646940, 40016109, 35127987, 41889522},
+ {70000000, 78770454, 70451838, 80427119, 70991400, 84230173, 72945921, 87064218}};
+
+ /* Multiplied with 100 */
+ const u64 dg2_curve_1[2][8] = {
+ {85177000000000, 79385227160000, 95672603580000, 88857207160000, 109379790900000, 103528193900000, 131941242400000, 117279000000000},
+ {60255000000000, 55569000000000, 72036000000000, 69509000000000, 81785000000000, 731030000000000, 96591000000000, 69077000000000}};
+
+ /* Multiplied with 1000000000000 */
+ const u64 dg2_curve_2[2][8] = {
+ {2186930000, 2835287134, 2395395343, 2932270687, 2351887545, 2861031697, 2294149152, 3091730000},
+ {4560000000, 5570000000, 4610000000, 5770000000, 4670000000, 6240000000, 4890000000, 6600000000}
+ };
+
+ ret = _intel_phy_compute_hdmi_tmds_pll(pixel_clock, refclk, ref_range,
+ ana_cp_int_gs, ana_cp_prop_gs,
+ dg2_curve_freq_hz, dg2_curve_0,
+ dg2_curve_1, dg2_curve_2, prescaler_divider,
+ &pll_params);
+
+ if (ret)
+ return ret;
+
+ pll_state->clock = pixel_clock;
+ pll_state->ref_control =
+ REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, ref_range);
+ pll_state->mpllb_cp =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, pll_params.ana_cp_int) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, pll_params.ana_cp_prop) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, ana_cp_int_gs) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, ana_cp_prop_gs);
+ pll_state->mpllb_div =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, pll_params.mpll_div5_en) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_TX_CLK_DIV, pll_params.tx_clk_div) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, pll_params.pmix_en) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, pll_params.mpll_ana_v2i) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, pll_params.ana_freq_vco);
+ pll_state->mpllb_div2 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, prescaler_divider) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, pll_params.multiplier) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, pll_params.hdmi_div);
+ pll_state->mpllb_fracn1 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_EN, pll_params.fracn_en) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, pll_params.fracn_den);
+ pll_state->mpllb_fracn2 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, pll_params.fracn_quot) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, pll_params.fracn_rem);
+ pll_state->mpllb_sscen =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_UP_SPREAD, pll_params.ssc_up_spread);
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.h b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
new file mode 100644
index 000000000000..83a620fb3db2
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2024 Synopsys, Inc., Intel Corporation
+ */
+
+#ifndef __INTEL_PLL_ALGORITHM_H__
+#define __INTEL_PLL_ALGORITHM_H__
+
+#include <linux/types.h>
+
+struct drm_i915_private;
+struct intel_atomic_state;
+struct intel_crtc;
+struct intel_crtc_state;
+struct intel_encoder;
+struct intel_mpllb_state;
+enum phy;
+
+struct pll_output_params {
+ u32 ssc_up_spread;
+ u32 mpll_div5_en;
+ u32 hdmi_div;
+ u32 ana_cp_int;
+ u32 ana_cp_prop;
+ u32 refclk_postscalar;
+ u32 tx_clk_div;
+ u32 fracn_quot;
+ u32 fracn_rem;
+ u32 fracn_den;
+ u32 fracn_en;
+ u32 pmix_en;
+ u32 multiplier;
+ int mpll_ana_v2i;
+ int ana_freq_vco;
+};
+
+int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_state *pll_state);
+
+#endif /* __INTEL_PLL_ALGORITHM_H__ */
--
2.40.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
2024-06-26 5:00 ` [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2 Ankit Nautiyal
@ 2024-06-26 10:04 ` Jani Nikula
2024-06-27 16:41 ` Nautiyal, Ankit K
2024-06-26 18:12 ` kernel test robot
2024-06-26 18:46 ` kernel test robot
2 siblings, 1 reply; 25+ messages in thread
From: Jani Nikula @ 2024-06-26 10:04 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Add helper _intel_phy_compute_hdmi_tmds_pll to calculate the necessary
> parameters for configuring the HDMI PLL for SNPS MPLLB and C10 PHY.
>
> The pll parameters are computed for desired pixel clock, curve data
> and other inputs used for interpolation and finally stored in the
> pll_state. Bspec:54032
>
> Currently the helper is used to compute PLLs for DG2 SNPS PHY.
> Support for computing Plls for C10 PHY is added in subsequent patches.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Okay, usually the high level review should come first, but there are so
many annoying details here that they distract review. See inline.
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
> .../drm/i915/display/intel_pll_algorithm.c | 252 ++++++++++++++++++
> .../drm/i915/display/intel_pll_algorithm.h | 39 +++
> 3 files changed, 292 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/display/intel_pll_algorithm.c
> create mode 100644 drivers/gpu/drm/i915/display/intel_pll_algorithm.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 4022e4499382..f1a293110bc6 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -334,6 +334,7 @@ i915-y += \
> display/intel_lspcon.o \
> display/intel_lvds.o \
> display/intel_panel.o \
> + display/intel_pll_algorithm.o \
We probably need to figure out a new name for this. That's too generic
for what it is.
> display/intel_pps.o \
> display/intel_qp_tables.o \
> display/intel_sdvo.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.c b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
> new file mode 100644
> index 000000000000..d935715bd3ab
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
> @@ -0,0 +1,252 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2024 Synopsys, Inc., Intel Corporation
> + */
> +
> +#include <linux/math.h>
Blank line here.
> +#include "i915_reg.h"
> +#include "intel_ddi.h"
> +#include "intel_ddi_buf_trans.h"
> +#include "intel_de.h"
> +#include "intel_display_types.h"
> +#include "intel_snps_phy.h"
> +#include "intel_snps_phy_regs.h"
> +#include "intel_pll_algorithm.h"
Do you really need all of the includes here?
> +
> +#define INTEL_SNPS_PHY_HDMI_4999MHZ 4999999900ull
> +#define INTEL_SNPS_PHY_HDMI_16GHZ 16000000000ull
> +#define INTEL_SNPS_PHY_HDMI_9999MHZ (2 * INTEL_SNPS_PHY_HDMI_4999MHZ)
> +
> +#define CURVE0_MULTIPLIER 1000000000
> +#define CURVE1_MULTIPLIER 100
> +#define CURVE2_MULTIPLIER 1000000000000
> +
> +static int64_t interp(s64 x, s64 x1, s64 x2, s64 y1, s64 y2)
Please use kernel types instead of C99 types.
> +{
> + s64 dydx;
> +
> + dydx = DIV_ROUND_UP((y2 - y1) * 100000, (x2 - x1));
> +
> + return (y1 + DIV_ROUND_UP(dydx * (x - x1), 100000));
> +}
> +
> +static void get_ana_cp_int_prop(u32 vco_clk,
> + u32 refclk_postscalar,
> + int mpll_ana_v2i,
> + int c, int a,
> + const u64 curve_freq_hz[2][8],
> + const u64 curve_0[2][8],
> + const u64 curve_1[2][8],
> + const u64 curve_2[2][8],
> + u32 *ana_cp_int,
> + u32 *ana_cp_prop)
> +{
> + u64 vco_div_refclk_float;
> + u64 o_397ced90;
> + u64 o_20c634d6;
> + u64 o_20c634d4;
> + u64 o_72019306;
> + u64 o_6593e82b;
> + u64 o_5cefc329;
> + u64 o_49960328;
> + u64 o_544adb37;
> + u64 o_4ef74e66;
That's pretty obfuscated. Result of some automated conversion? Can we
have some more sensible names?
> + u32 ana_cp_int_temp;
> + u64 temp1, temp2, temp3, temp4;
> +
> + vco_div_refclk_float = vco_clk * (1000000000000 / refclk_postscalar);
> + o_397ced90 = interp(vco_clk, curve_freq_hz[c][a], curve_freq_hz[c][a + 1],
> + curve_0[c][a], curve_0[c][a + 1]);
> +
> + o_20c634d6 = interp(vco_clk, curve_freq_hz[c][a], curve_freq_hz[c][a + 1],
> + curve_2[c][a], curve_2[c][a + 1]);
> +
> + o_20c634d4 = interp(vco_clk, curve_freq_hz[c][a], curve_freq_hz[c][a + 1],
> + curve_1[c][a], curve_1[c][a + 1]);
> +
> + o_20c634d4 /= CURVE1_MULTIPLIER;
> +
> + temp1 = o_20c634d6 * (4 - mpll_ana_v2i);
> +
> + o_72019306 = temp1 / 16000;
> + o_6593e82b = temp1 / 160;
> +
> + temp2 = ((112008301 * (vco_div_refclk_float / 100000)));
> + o_5cefc329 = CURVE2_MULTIPLIER * (temp2 / (o_397ced90 * (o_20c634d4 / CURVE0_MULTIPLIER)));
> +
> + ana_cp_int_temp = min(DIV_ROUND_CLOSEST(o_5cefc329 / o_72019306, CURVE2_MULTIPLIER), 127);
> + ana_cp_int_temp = max(1, ana_cp_int_temp);
> +
> + *ana_cp_int = ana_cp_int_temp;
> +
> + o_49960328 = o_72019306 * ana_cp_int_temp;
> +
> + temp3 = o_20c634d4 * (o_49960328 * o_397ced90 / CURVE0_MULTIPLIER);
> + o_544adb37 = int_sqrt(DIV_ROUND_UP(temp3, vco_div_refclk_float) * (1000000000000 / 55));
> +
> + temp4 = DIV_ROUND_UP(vco_div_refclk_float, 1000000);
> + o_4ef74e66 = (1460281 * DIV_ROUND_UP(o_544adb37 * temp4, o_20c634d4));
> +
> + *ana_cp_prop = max(1, min(DIV_ROUND_UP(o_4ef74e66, o_6593e82b), 127));
> +}
> +
> +static int _intel_phy_compute_hdmi_tmds_pll(u64 pixel_clock, u32 refclk,
What's with the underscore prefix? It's not a convention we have.
> + u32 ref_range,
> + u32 ana_cp_int_gs,
> + u32 ana_cp_prop_gs,
> + const u64 curve_freq_hz[2][8],
> + const u64 curve_0[2][8],
> + const u64 curve_1[2][8],
> + const u64 curve_2[2][8],
> + u32 prescaler_divider,
> + struct pll_output_params *pll_params)
> +{
> + /*datarate 10khz */
Please put space around /* and */.
> + u64 datarate = pixel_clock * 10000;
> + u32 ssc_up_spread = 1;
> + u32 mpll_div5_en = 1;
> + u32 hdmi_div = 1;
> + u32 ana_cp_int;
> + u32 ana_cp_prop;
> + u32 refclk_postscalar = refclk >> prescaler_divider;
> + u32 tx_clk_div;
> + u64 vco_clk;
> + u32 vco_div_refclk_integer;
> + u32 vco_div_refclk_fracn;
> + u32 fracn_quot;
> + u32 fracn_rem;
> + u32 fracn_den;
> + u32 fracn_en;
> + u32 pmix_en;
> + u32 multiplier;
> + int mpll_ana_v2i;
> + int ana_freq_vco;
> + int c, a, j;
> +
> + if (pixel_clock < 25175 || pixel_clock > 600000)
> + return -EINVAL;
> +
> + /* Select appropriate v2i point */
> + if (datarate <= INTEL_SNPS_PHY_HDMI_9999MHZ) {
> + mpll_ana_v2i = 2;
> + tx_clk_div = ilog2(INTEL_SNPS_PHY_HDMI_9999MHZ / datarate);
> + } else {
> + mpll_ana_v2i = 3;
> + tx_clk_div = ilog2(INTEL_SNPS_PHY_HDMI_16GHZ / datarate);
> + }
> + vco_clk = (datarate << tx_clk_div) >> 1;
> +
> + /* Highly accurate division, calculate fraction to 32 bits of precision */
> + vco_div_refclk_integer = vco_clk / refclk_postscalar;
> + vco_div_refclk_fracn = ((vco_clk % refclk_postscalar) << 32) / refclk_postscalar;
> + fracn_quot = vco_div_refclk_fracn >> 16;
> + fracn_rem = vco_div_refclk_fracn & 0xffff;
> + fracn_rem = fracn_rem - (fracn_rem >> 15);
> + fracn_den = 0xffff;
> + fracn_en = (fracn_quot != 0 || fracn_rem != 0) ? 1 : 0;
> + pmix_en = fracn_en;
> + multiplier = (vco_div_refclk_integer - 16) * 2;
> + /* Curve selection for ana_cp_* calculations. One curve hardcoded per v2i range */
> + c = mpll_ana_v2i - 2;
> +
> + /* Find the right segment of the table */
> + for (j = 0; j < 8; j += 2) {
i is the usual loop variable.
> + if (vco_clk <= curve_freq_hz[c][j + 1]) {
> + a = j;
> + ana_freq_vco = 3 - (a >> 1);
> + break;
> + }
> + }
> +
> + get_ana_cp_int_prop(vco_clk, refclk_postscalar, mpll_ana_v2i, c, a,
> + curve_freq_hz, curve_0, curve_1, curve_2,
> + &ana_cp_int, &ana_cp_prop);
> +
> + pll_params->ssc_up_spread = ssc_up_spread;
> + pll_params->mpll_div5_en = mpll_div5_en;
> + pll_params->hdmi_div = hdmi_div;
> + pll_params->ana_cp_int = ana_cp_int;
> + pll_params->refclk_postscalar = refclk_postscalar;
> + pll_params->tx_clk_div = tx_clk_div;
> + pll_params->fracn_quot = fracn_quot;
> + pll_params->fracn_rem = fracn_rem;
> + pll_params->fracn_den = fracn_den;
> + pll_params->fracn_en = fracn_en;
> + pll_params->pmix_en = pmix_en;
> + pll_params->multiplier = multiplier;
> + pll_params->ana_cp_prop = ana_cp_prop;
> + pll_params->mpll_ana_v2i = mpll_ana_v2i;
> + pll_params->ana_freq_vco = ana_freq_vco;
> +
> + return 0;
> +}
> +
> +int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_state *pll_state)
> +{
> + struct pll_output_params pll_params;
> + u32 refclk = 100000000;
> + u32 prescaler_divider = 1;
> + u32 ref_range = 3;
> + u32 ana_cp_int_gs = 64;
> + u32 ana_cp_prop_gs = 124;
> + int ret;
> + /* x axis frequencies. One curve in each array per v2i point */
> + const u64 dg2_curve_freq_hz[2][8] = {
> + {2500000000, 3000000000, 3000000000, 3500000000, 3500000000, 4000000000, 4000000000, 5000000000},
> + {4000000000, 4600000000, 4601000000, 5400000000, 5401000000, 6600000000, 6601000000, 8001000000}};
> +
> + /* y axis heights multiplied with 1000000000 */
> + const u64 dg2_curve_0[2][8] = {
> + {34149871, 39803269, 36034544, 40601014, 35646940, 40016109, 35127987, 41889522},
> + {70000000, 78770454, 70451838, 80427119, 70991400, 84230173, 72945921, 87064218}};
> +
> + /* Multiplied with 100 */
> + const u64 dg2_curve_1[2][8] = {
> + {85177000000000, 79385227160000, 95672603580000, 88857207160000, 109379790900000, 103528193900000, 131941242400000, 117279000000000},
> + {60255000000000, 55569000000000, 72036000000000, 69509000000000, 81785000000000, 731030000000000, 96591000000000, 69077000000000}};
> +
> + /* Multiplied with 1000000000000 */
> + const u64 dg2_curve_2[2][8] = {
> + {2186930000, 2835287134, 2395395343, 2932270687, 2351887545, 2861031697, 2294149152, 3091730000},
> + {4560000000, 5570000000, 4610000000, 5770000000, 4670000000, 6240000000, 4890000000, 6600000000}
> + };
These can be static const instead of on the stack. Please put spaces
between { } and the numbers. Please put the final }; on a line of its
own. Put these as first variables in the function.
Just eyeballing, the constants look big enough to warrant ULL.
> +
> + ret = _intel_phy_compute_hdmi_tmds_pll(pixel_clock, refclk, ref_range,
> + ana_cp_int_gs, ana_cp_prop_gs,
> + dg2_curve_freq_hz, dg2_curve_0,
> + dg2_curve_1, dg2_curve_2, prescaler_divider,
> + &pll_params);
> +
> + if (ret)
> + return ret;
> +
> + pll_state->clock = pixel_clock;
> + pll_state->ref_control =
> + REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, ref_range);
> + pll_state->mpllb_cp =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, pll_params.ana_cp_int) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, pll_params.ana_cp_prop) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, ana_cp_int_gs) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, ana_cp_prop_gs);
> + pll_state->mpllb_div =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, pll_params.mpll_div5_en) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_TX_CLK_DIV, pll_params.tx_clk_div) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, pll_params.pmix_en) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, pll_params.mpll_ana_v2i) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, pll_params.ana_freq_vco);
> + pll_state->mpllb_div2 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, prescaler_divider) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, pll_params.multiplier) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, pll_params.hdmi_div);
> + pll_state->mpllb_fracn1 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_EN, pll_params.fracn_en) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, pll_params.fracn_den);
> + pll_state->mpllb_fracn2 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, pll_params.fracn_quot) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, pll_params.fracn_rem);
> + pll_state->mpllb_sscen =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_UP_SPREAD, pll_params.ssc_up_spread);
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.h b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
> new file mode 100644
> index 000000000000..83a620fb3db2
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
> @@ -0,0 +1,39 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2024 Synopsys, Inc., Intel Corporation
> + */
> +
> +#ifndef __INTEL_PLL_ALGORITHM_H__
> +#define __INTEL_PLL_ALGORITHM_H__
> +
> +#include <linux/types.h>
> +
> +struct drm_i915_private;
> +struct intel_atomic_state;
> +struct intel_crtc;
> +struct intel_crtc_state;
> +struct intel_encoder;
> +struct intel_mpllb_state;
> +enum phy;
What's the deal with the forward declarations? You need exactly one of
them in this file.
> +
> +struct pll_output_params {
> + u32 ssc_up_spread;
> + u32 mpll_div5_en;
> + u32 hdmi_div;
> + u32 ana_cp_int;
> + u32 ana_cp_prop;
> + u32 refclk_postscalar;
> + u32 tx_clk_div;
> + u32 fracn_quot;
> + u32 fracn_rem;
> + u32 fracn_den;
> + u32 fracn_en;
> + u32 pmix_en;
> + u32 multiplier;
> + int mpll_ana_v2i;
> + int ana_freq_vco;
> +};
This is internal to the implementation and should be in the .c file.
> +
> +int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_state *pll_state);
Usually context params go first.
> +
> +#endif /* __INTEL_PLL_ALGORITHM_H__ */
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
2024-06-26 10:04 ` Jani Nikula
@ 2024-06-27 16:41 ` Nautiyal, Ankit K
0 siblings, 0 replies; 25+ messages in thread
From: Nautiyal, Ankit K @ 2024-06-27 16:41 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On 6/26/2024 3:34 PM, Jani Nikula wrote:
> On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Add helper _intel_phy_compute_hdmi_tmds_pll to calculate the necessary
>> parameters for configuring the HDMI PLL for SNPS MPLLB and C10 PHY.
>>
>> The pll parameters are computed for desired pixel clock, curve data
>> and other inputs used for interpolation and finally stored in the
>> pll_state. Bspec:54032
>>
>> Currently the helper is used to compute PLLs for DG2 SNPS PHY.
>> Support for computing Plls for C10 PHY is added in subsequent patches.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Okay, usually the high level review should come first, but there are so
> many annoying details here that they distract review. See inline.
Thanks Jani for the review and comments. This is indeed need more polishing.
I was more focused on getting the precision right to avoid floating
point math, and overlooked some of the avoidable mistakes.
Also some of the names of variables were retained from the original
algorithm to trace them back for review.
Will address the review comments and send new version. Please find my
responses inline.
>
>> ---
>> drivers/gpu/drm/i915/Makefile | 1 +
>> .../drm/i915/display/intel_pll_algorithm.c | 252 ++++++++++++++++++
>> .../drm/i915/display/intel_pll_algorithm.h | 39 +++
>> 3 files changed, 292 insertions(+)
>> create mode 100644 drivers/gpu/drm/i915/display/intel_pll_algorithm.c
>> create mode 100644 drivers/gpu/drm/i915/display/intel_pll_algorithm.h
>>
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index 4022e4499382..f1a293110bc6 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -334,6 +334,7 @@ i915-y += \
>> display/intel_lspcon.o \
>> display/intel_lvds.o \
>> display/intel_panel.o \
>> + display/intel_pll_algorithm.o \
> We probably need to figure out a new name for this. That's too generic
> for what it is.
Hmm. Whether intel_snps_hdmi_pll.c works? I am open for any name that is
more relevant.
>
>> display/intel_pps.o \
>> display/intel_qp_tables.o \
>> display/intel_sdvo.o \
>> diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.c b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
>> new file mode 100644
>> index 000000000000..d935715bd3ab
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
>> @@ -0,0 +1,252 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2024 Synopsys, Inc., Intel Corporation
>> + */
>> +
>> +#include <linux/math.h>
> Blank line here.
>
>> +#include "i915_reg.h"
>> +#include "intel_ddi.h"
>> +#include "intel_ddi_buf_trans.h"
>> +#include "intel_de.h"
>> +#include "intel_display_types.h"
>> +#include "intel_snps_phy.h"
>> +#include "intel_snps_phy_regs.h"
>> +#include "intel_pll_algorithm.h"
> Do you really need all of the includes here?
I'll recheck this.
>
>> +
>> +#define INTEL_SNPS_PHY_HDMI_4999MHZ 4999999900ull
>> +#define INTEL_SNPS_PHY_HDMI_16GHZ 16000000000ull
>> +#define INTEL_SNPS_PHY_HDMI_9999MHZ (2 * INTEL_SNPS_PHY_HDMI_4999MHZ)
>> +
>> +#define CURVE0_MULTIPLIER 1000000000
>> +#define CURVE1_MULTIPLIER 100
>> +#define CURVE2_MULTIPLIER 1000000000000
>> +
>> +static int64_t interp(s64 x, s64 x1, s64 x2, s64 y1, s64 y2)
> Please use kernel types instead of C99 types.
Will fix this to s64.
>
>> +{
>> + s64 dydx;
>> +
>> + dydx = DIV_ROUND_UP((y2 - y1) * 100000, (x2 - x1));
>> +
>> + return (y1 + DIV_ROUND_UP(dydx * (x - x1), 100000));
>> +}
>> +
>> +static void get_ana_cp_int_prop(u32 vco_clk,
>> + u32 refclk_postscalar,
>> + int mpll_ana_v2i,
>> + int c, int a,
>> + const u64 curve_freq_hz[2][8],
>> + const u64 curve_0[2][8],
>> + const u64 curve_1[2][8],
>> + const u64 curve_2[2][8],
>> + u32 *ana_cp_int,
>> + u32 *ana_cp_prop)
>> +{
>> + u64 vco_div_refclk_float;
>> + u64 o_397ced90;
>> + u64 o_20c634d6;
>> + u64 o_20c634d4;
>> + u64 o_72019306;
>> + u64 o_6593e82b;
>> + u64 o_5cefc329;
>> + u64 o_49960328;
>> + u64 o_544adb37;
>> + u64 o_4ef74e66;
> That's pretty obfuscated. Result of some automated conversion? Can we
> have some more sensible names?
I just used the same name as it appear in the algorithm to make sure I
am not missing anything.
I will rename these intermediate things to more sensible names.
>
>> + u32 ana_cp_int_temp;
>> + u64 temp1, temp2, temp3, temp4;
>> +
>> + vco_div_refclk_float = vco_clk * (1000000000000 / refclk_postscalar);
>> + o_397ced90 = interp(vco_clk, curve_freq_hz[c][a], curve_freq_hz[c][a + 1],
>> + curve_0[c][a], curve_0[c][a + 1]);
>> +
>> + o_20c634d6 = interp(vco_clk, curve_freq_hz[c][a], curve_freq_hz[c][a + 1],
>> + curve_2[c][a], curve_2[c][a + 1]);
>> +
>> + o_20c634d4 = interp(vco_clk, curve_freq_hz[c][a], curve_freq_hz[c][a + 1],
>> + curve_1[c][a], curve_1[c][a + 1]);
>> +
>> + o_20c634d4 /= CURVE1_MULTIPLIER;
>> +
>> + temp1 = o_20c634d6 * (4 - mpll_ana_v2i);
>> +
>> + o_72019306 = temp1 / 16000;
>> + o_6593e82b = temp1 / 160;
>> +
>> + temp2 = ((112008301 * (vco_div_refclk_float / 100000)));
>> + o_5cefc329 = CURVE2_MULTIPLIER * (temp2 / (o_397ced90 * (o_20c634d4 / CURVE0_MULTIPLIER)));
>> +
>> + ana_cp_int_temp = min(DIV_ROUND_CLOSEST(o_5cefc329 / o_72019306, CURVE2_MULTIPLIER), 127);
>> + ana_cp_int_temp = max(1, ana_cp_int_temp);
>> +
>> + *ana_cp_int = ana_cp_int_temp;
>> +
>> + o_49960328 = o_72019306 * ana_cp_int_temp;
>> +
>> + temp3 = o_20c634d4 * (o_49960328 * o_397ced90 / CURVE0_MULTIPLIER);
>> + o_544adb37 = int_sqrt(DIV_ROUND_UP(temp3, vco_div_refclk_float) * (1000000000000 / 55));
>> +
>> + temp4 = DIV_ROUND_UP(vco_div_refclk_float, 1000000);
>> + o_4ef74e66 = (1460281 * DIV_ROUND_UP(o_544adb37 * temp4, o_20c634d4));
>> +
>> + *ana_cp_prop = max(1, min(DIV_ROUND_UP(o_4ef74e66, o_6593e82b), 127));
>> +}
>> +
>> +static int _intel_phy_compute_hdmi_tmds_pll(u64 pixel_clock, u32 refclk,
> What's with the underscore prefix? It's not a convention we have.
Will do away with the underscore.
>
>> + u32 ref_range,
>> + u32 ana_cp_int_gs,
>> + u32 ana_cp_prop_gs,
>> + const u64 curve_freq_hz[2][8],
>> + const u64 curve_0[2][8],
>> + const u64 curve_1[2][8],
>> + const u64 curve_2[2][8],
>> + u32 prescaler_divider,
>> + struct pll_output_params *pll_params)
>> +{
>> + /*datarate 10khz */
> Please put space around /* and */.
>
>> + u64 datarate = pixel_clock * 10000;
>> + u32 ssc_up_spread = 1;
>> + u32 mpll_div5_en = 1;
>> + u32 hdmi_div = 1;
>> + u32 ana_cp_int;
>> + u32 ana_cp_prop;
>> + u32 refclk_postscalar = refclk >> prescaler_divider;
>> + u32 tx_clk_div;
>> + u64 vco_clk;
>> + u32 vco_div_refclk_integer;
>> + u32 vco_div_refclk_fracn;
>> + u32 fracn_quot;
>> + u32 fracn_rem;
>> + u32 fracn_den;
>> + u32 fracn_en;
>> + u32 pmix_en;
>> + u32 multiplier;
>> + int mpll_ana_v2i;
>> + int ana_freq_vco;
>> + int c, a, j;
>> +
>> + if (pixel_clock < 25175 || pixel_clock > 600000)
>> + return -EINVAL;
>> +
>> + /* Select appropriate v2i point */
>> + if (datarate <= INTEL_SNPS_PHY_HDMI_9999MHZ) {
>> + mpll_ana_v2i = 2;
>> + tx_clk_div = ilog2(INTEL_SNPS_PHY_HDMI_9999MHZ / datarate);
>> + } else {
>> + mpll_ana_v2i = 3;
>> + tx_clk_div = ilog2(INTEL_SNPS_PHY_HDMI_16GHZ / datarate);
>> + }
>> + vco_clk = (datarate << tx_clk_div) >> 1;
>> +
>> + /* Highly accurate division, calculate fraction to 32 bits of precision */
>> + vco_div_refclk_integer = vco_clk / refclk_postscalar;
>> + vco_div_refclk_fracn = ((vco_clk % refclk_postscalar) << 32) / refclk_postscalar;
>> + fracn_quot = vco_div_refclk_fracn >> 16;
>> + fracn_rem = vco_div_refclk_fracn & 0xffff;
>> + fracn_rem = fracn_rem - (fracn_rem >> 15);
>> + fracn_den = 0xffff;
>> + fracn_en = (fracn_quot != 0 || fracn_rem != 0) ? 1 : 0;
>> + pmix_en = fracn_en;
>> + multiplier = (vco_div_refclk_integer - 16) * 2;
>> + /* Curve selection for ana_cp_* calculations. One curve hardcoded per v2i range */
>> + c = mpll_ana_v2i - 2;
>> +
>> + /* Find the right segment of the table */
>> + for (j = 0; j < 8; j += 2) {
> i is the usual loop variable.
Agreed.
>
>> + if (vco_clk <= curve_freq_hz[c][j + 1]) {
>> + a = j;
>> + ana_freq_vco = 3 - (a >> 1);
>> + break;
>> + }
>> + }
>> +
>> + get_ana_cp_int_prop(vco_clk, refclk_postscalar, mpll_ana_v2i, c, a,
>> + curve_freq_hz, curve_0, curve_1, curve_2,
>> + &ana_cp_int, &ana_cp_prop);
>> +
>> + pll_params->ssc_up_spread = ssc_up_spread;
>> + pll_params->mpll_div5_en = mpll_div5_en;
>> + pll_params->hdmi_div = hdmi_div;
>> + pll_params->ana_cp_int = ana_cp_int;
>> + pll_params->refclk_postscalar = refclk_postscalar;
>> + pll_params->tx_clk_div = tx_clk_div;
>> + pll_params->fracn_quot = fracn_quot;
>> + pll_params->fracn_rem = fracn_rem;
>> + pll_params->fracn_den = fracn_den;
>> + pll_params->fracn_en = fracn_en;
>> + pll_params->pmix_en = pmix_en;
>> + pll_params->multiplier = multiplier;
>> + pll_params->ana_cp_prop = ana_cp_prop;
>> + pll_params->mpll_ana_v2i = mpll_ana_v2i;
>> + pll_params->ana_freq_vco = ana_freq_vco;
>> +
>> + return 0;
>> +}
>> +
>> +int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_state *pll_state)
>> +{
>> + struct pll_output_params pll_params;
>> + u32 refclk = 100000000;
>> + u32 prescaler_divider = 1;
>> + u32 ref_range = 3;
>> + u32 ana_cp_int_gs = 64;
>> + u32 ana_cp_prop_gs = 124;
>> + int ret;
>> + /* x axis frequencies. One curve in each array per v2i point */
>> + const u64 dg2_curve_freq_hz[2][8] = {
>> + {2500000000, 3000000000, 3000000000, 3500000000, 3500000000, 4000000000, 4000000000, 5000000000},
>> + {4000000000, 4600000000, 4601000000, 5400000000, 5401000000, 6600000000, 6601000000, 8001000000}};
>> +
>> + /* y axis heights multiplied with 1000000000 */
>> + const u64 dg2_curve_0[2][8] = {
>> + {34149871, 39803269, 36034544, 40601014, 35646940, 40016109, 35127987, 41889522},
>> + {70000000, 78770454, 70451838, 80427119, 70991400, 84230173, 72945921, 87064218}};
>> +
>> + /* Multiplied with 100 */
>> + const u64 dg2_curve_1[2][8] = {
>> + {85177000000000, 79385227160000, 95672603580000, 88857207160000, 109379790900000, 103528193900000, 131941242400000, 117279000000000},
>> + {60255000000000, 55569000000000, 72036000000000, 69509000000000, 81785000000000, 731030000000000, 96591000000000, 69077000000000}};
>> +
>> + /* Multiplied with 1000000000000 */
>> + const u64 dg2_curve_2[2][8] = {
>> + {2186930000, 2835287134, 2395395343, 2932270687, 2351887545, 2861031697, 2294149152, 3091730000},
>> + {4560000000, 5570000000, 4610000000, 5770000000, 4670000000, 6240000000, 4890000000, 6600000000}
>> + };
> These can be static const instead of on the stack. Please put spaces
> between { } and the numbers. Please put the final }; on a line of its
> own. Put these as first variables in the function.
>
> Just eyeballing, the constants look big enough to warrant ULL.
Alright, will do the suggested changes.
>
>> +
>> + ret = _intel_phy_compute_hdmi_tmds_pll(pixel_clock, refclk, ref_range,
>> + ana_cp_int_gs, ana_cp_prop_gs,
>> + dg2_curve_freq_hz, dg2_curve_0,
>> + dg2_curve_1, dg2_curve_2, prescaler_divider,
>> + &pll_params);
>> +
>> + if (ret)
>> + return ret;
>> +
>> + pll_state->clock = pixel_clock;
>> + pll_state->ref_control =
>> + REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, ref_range);
>> + pll_state->mpllb_cp =
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, pll_params.ana_cp_int) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, pll_params.ana_cp_prop) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, ana_cp_int_gs) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, ana_cp_prop_gs);
>> + pll_state->mpllb_div =
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, pll_params.mpll_div5_en) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_TX_CLK_DIV, pll_params.tx_clk_div) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, pll_params.pmix_en) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, pll_params.mpll_ana_v2i) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, pll_params.ana_freq_vco);
>> + pll_state->mpllb_div2 =
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, prescaler_divider) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, pll_params.multiplier) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, pll_params.hdmi_div);
>> + pll_state->mpllb_fracn1 =
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_EN, pll_params.fracn_en) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, pll_params.fracn_den);
>> + pll_state->mpllb_fracn2 =
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, pll_params.fracn_quot) |
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, pll_params.fracn_rem);
>> + pll_state->mpllb_sscen =
>> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_UP_SPREAD, pll_params.ssc_up_spread);
>> +
>> + return 0;
>> +}
>> diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.h b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
>> new file mode 100644
>> index 000000000000..83a620fb3db2
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
>> @@ -0,0 +1,39 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2024 Synopsys, Inc., Intel Corporation
>> + */
>> +
>> +#ifndef __INTEL_PLL_ALGORITHM_H__
>> +#define __INTEL_PLL_ALGORITHM_H__
>> +
>> +#include <linux/types.h>
>> +
>> +struct drm_i915_private;
>> +struct intel_atomic_state;
>> +struct intel_crtc;
>> +struct intel_crtc_state;
>> +struct intel_encoder;
>> +struct intel_mpllb_state;
>> +enum phy;
> What's the deal with the forward declarations? You need exactly one of
> them in this file.
I'll re-check this.
>
>> +
>> +struct pll_output_params {
>> + u32 ssc_up_spread;
>> + u32 mpll_div5_en;
>> + u32 hdmi_div;
>> + u32 ana_cp_int;
>> + u32 ana_cp_prop;
>> + u32 refclk_postscalar;
>> + u32 tx_clk_div;
>> + u32 fracn_quot;
>> + u32 fracn_rem;
>> + u32 fracn_den;
>> + u32 fracn_en;
>> + u32 pmix_en;
>> + u32 multiplier;
>> + int mpll_ana_v2i;
>> + int ana_freq_vco;
>> +};
> This is internal to the implementation and should be in the .c file.
Noted, will move to the .c file as suggested.
>
>> +
>> +int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_state *pll_state);
> Usually context params go first.
Alright will move pll_state first.
Thanks & Regards,
Ankit
>
>> +
>> +#endif /* __INTEL_PLL_ALGORITHM_H__ */
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
2024-06-26 5:00 ` [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2 Ankit Nautiyal
2024-06-26 10:04 ` Jani Nikula
@ 2024-06-26 18:12 ` kernel test robot
2024-06-26 18:46 ` kernel test robot
2 siblings, 0 replies; 25+ messages in thread
From: kernel test robot @ 2024-06-26 18:12 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe
Cc: oe-kbuild-all, jani.nikula, ville.syrjala, mika.kahola,
matthew.d.roper
Hi Ankit,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-intel/for-linux-next-fixes drm-tip/drm-tip drm-xe/drm-xe-next linus/master v6.10-rc5 next-20240625]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Ankit-Nautiyal/drm-i915-display-Add-support-for-SNPS-PHY-HDMI-PLL-algorithm-for-DG2/20240626-131209
base: git://anongit.freedesktop.org/drm-intel for-linux-next
patch link: https://lore.kernel.org/r/20240626050056.3996349-2-ankit.k.nautiyal%40intel.com
patch subject: [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
config: i386-buildonly-randconfig-006-20240626 (https://download.01.org/0day-ci/archive/20240627/202406270107.cweaZpry-lkp@intel.com/config)
compiler: gcc-13 (Ubuntu 13.2.0-4ubuntu3) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240627/202406270107.cweaZpry-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202406270107.cweaZpry-lkp@intel.com/
All errors (new ones prefixed by >>):
ld: drivers/gpu/drm/i915/display/intel_pll_algorithm.o: in function `get_ana_cp_int_prop.constprop.0':
>> intel_pll_algorithm.c:(.text+0x2b): undefined reference to `__divdi3'
>> ld: intel_pll_algorithm.c:(.text+0xc2): undefined reference to `__divdi3'
ld: intel_pll_algorithm.c:(.text+0xef): undefined reference to `__divdi3'
ld: intel_pll_algorithm.c:(.text+0x153): undefined reference to `__divdi3'
ld: intel_pll_algorithm.c:(.text+0x180): undefined reference to `__divdi3'
ld: drivers/gpu/drm/i915/display/intel_pll_algorithm.o:intel_pll_algorithm.c:(.text+0x235): more undefined references to `__divdi3' follow
ld: drivers/gpu/drm/i915/display/intel_pll_algorithm.o: in function `get_ana_cp_int_prop.constprop.0':
>> intel_pll_algorithm.c:(.text+0x282): undefined reference to `__udivdi3'
>> ld: intel_pll_algorithm.c:(.text+0x2f2): undefined reference to `__udivdi3'
ld: intel_pll_algorithm.c:(.text+0x31b): undefined reference to `__udivdi3'
ld: intel_pll_algorithm.c:(.text+0x33e): undefined reference to `__udivdi3'
ld: intel_pll_algorithm.c:(.text+0x36c): undefined reference to `__udivdi3'
ld: drivers/gpu/drm/i915/display/intel_pll_algorithm.o:intel_pll_algorithm.c:(.text+0x384): more undefined references to `__udivdi3' follow
ld: drivers/gpu/drm/i915/display/intel_pll_algorithm.o: in function `intel_snps_phy_compute_hdmi_tmds_pll':
>> intel_pll_algorithm.c:(.text+0x602): undefined reference to `__udivmoddi4'
ld: intel_pll_algorithm.c:(.text+0x61e): undefined reference to `__udivdi3'
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
2024-06-26 5:00 ` [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2 Ankit Nautiyal
2024-06-26 10:04 ` Jani Nikula
2024-06-26 18:12 ` kernel test robot
@ 2024-06-26 18:46 ` kernel test robot
2 siblings, 0 replies; 25+ messages in thread
From: kernel test robot @ 2024-06-26 18:46 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe
Cc: llvm, oe-kbuild-all, jani.nikula, ville.syrjala, mika.kahola,
matthew.d.roper
Hi Ankit,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-intel/for-linux-next-fixes drm-tip/drm-tip drm-xe/drm-xe-next linus/master v6.10-rc5 next-20240625]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Ankit-Nautiyal/drm-i915-display-Add-support-for-SNPS-PHY-HDMI-PLL-algorithm-for-DG2/20240626-131209
base: git://anongit.freedesktop.org/drm-intel for-linux-next
patch link: https://lore.kernel.org/r/20240626050056.3996349-2-ankit.k.nautiyal%40intel.com
patch subject: [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
config: i386-randconfig-011-20240626 (https://download.01.org/0day-ci/archive/20240627/202406270253.GoXTAfRN-lkp@intel.com/config)
compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240627/202406270253.GoXTAfRN-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202406270253.GoXTAfRN-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/i915/display/intel_pll_algorithm.c:153:14: error: variable 'a' is used uninitialized whenever 'for' loop exits because its condition is false [-Werror,-Wsometimes-uninitialized]
153 | for (j = 0; j < 8; j += 2) {
| ^~~~~
drivers/gpu/drm/i915/display/intel_pll_algorithm.c:161:67: note: uninitialized use occurs here
161 | get_ana_cp_int_prop(vco_clk, refclk_postscalar, mpll_ana_v2i, c, a,
| ^
drivers/gpu/drm/i915/display/intel_pll_algorithm.c:153:14: note: remove the condition if it is always true
153 | for (j = 0; j < 8; j += 2) {
| ^~~~~
drivers/gpu/drm/i915/display/intel_pll_algorithm.c:124:10: note: initialize the variable 'a' to silence this warning
124 | int c, a, j;
| ^
| = 0
>> drivers/gpu/drm/i915/display/intel_pll_algorithm.c:153:14: error: variable 'ana_freq_vco' is used uninitialized whenever 'for' loop exits because its condition is false [-Werror,-Wsometimes-uninitialized]
153 | for (j = 0; j < 8; j += 2) {
| ^~~~~
drivers/gpu/drm/i915/display/intel_pll_algorithm.c:179:29: note: uninitialized use occurs here
179 | pll_params->ana_freq_vco = ana_freq_vco;
| ^~~~~~~~~~~~
drivers/gpu/drm/i915/display/intel_pll_algorithm.c:153:14: note: remove the condition if it is always true
153 | for (j = 0; j < 8; j += 2) {
| ^~~~~
drivers/gpu/drm/i915/display/intel_pll_algorithm.c:123:18: note: initialize the variable 'ana_freq_vco' to silence this warning
123 | int ana_freq_vco;
| ^
| = 0
2 errors generated.
vim +153 drivers/gpu/drm/i915/display/intel_pll_algorithm.c
92
93 static int _intel_phy_compute_hdmi_tmds_pll(u64 pixel_clock, u32 refclk,
94 u32 ref_range,
95 u32 ana_cp_int_gs,
96 u32 ana_cp_prop_gs,
97 const u64 curve_freq_hz[2][8],
98 const u64 curve_0[2][8],
99 const u64 curve_1[2][8],
100 const u64 curve_2[2][8],
101 u32 prescaler_divider,
102 struct pll_output_params *pll_params)
103 {
104 /*datarate 10khz */
105 u64 datarate = pixel_clock * 10000;
106 u32 ssc_up_spread = 1;
107 u32 mpll_div5_en = 1;
108 u32 hdmi_div = 1;
109 u32 ana_cp_int;
110 u32 ana_cp_prop;
111 u32 refclk_postscalar = refclk >> prescaler_divider;
112 u32 tx_clk_div;
113 u64 vco_clk;
114 u32 vco_div_refclk_integer;
115 u32 vco_div_refclk_fracn;
116 u32 fracn_quot;
117 u32 fracn_rem;
118 u32 fracn_den;
119 u32 fracn_en;
120 u32 pmix_en;
121 u32 multiplier;
122 int mpll_ana_v2i;
123 int ana_freq_vco;
124 int c, a, j;
125
126 if (pixel_clock < 25175 || pixel_clock > 600000)
127 return -EINVAL;
128
129 /* Select appropriate v2i point */
130 if (datarate <= INTEL_SNPS_PHY_HDMI_9999MHZ) {
131 mpll_ana_v2i = 2;
132 tx_clk_div = ilog2(INTEL_SNPS_PHY_HDMI_9999MHZ / datarate);
133 } else {
134 mpll_ana_v2i = 3;
135 tx_clk_div = ilog2(INTEL_SNPS_PHY_HDMI_16GHZ / datarate);
136 }
137 vco_clk = (datarate << tx_clk_div) >> 1;
138
139 /* Highly accurate division, calculate fraction to 32 bits of precision */
140 vco_div_refclk_integer = vco_clk / refclk_postscalar;
141 vco_div_refclk_fracn = ((vco_clk % refclk_postscalar) << 32) / refclk_postscalar;
142 fracn_quot = vco_div_refclk_fracn >> 16;
143 fracn_rem = vco_div_refclk_fracn & 0xffff;
144 fracn_rem = fracn_rem - (fracn_rem >> 15);
145 fracn_den = 0xffff;
146 fracn_en = (fracn_quot != 0 || fracn_rem != 0) ? 1 : 0;
147 pmix_en = fracn_en;
148 multiplier = (vco_div_refclk_integer - 16) * 2;
149 /* Curve selection for ana_cp_* calculations. One curve hardcoded per v2i range */
150 c = mpll_ana_v2i - 2;
151
152 /* Find the right segment of the table */
> 153 for (j = 0; j < 8; j += 2) {
154 if (vco_clk <= curve_freq_hz[c][j + 1]) {
155 a = j;
156 ana_freq_vco = 3 - (a >> 1);
157 break;
158 }
159 }
160
161 get_ana_cp_int_prop(vco_clk, refclk_postscalar, mpll_ana_v2i, c, a,
162 curve_freq_hz, curve_0, curve_1, curve_2,
163 &ana_cp_int, &ana_cp_prop);
164
165 pll_params->ssc_up_spread = ssc_up_spread;
166 pll_params->mpll_div5_en = mpll_div5_en;
167 pll_params->hdmi_div = hdmi_div;
168 pll_params->ana_cp_int = ana_cp_int;
169 pll_params->refclk_postscalar = refclk_postscalar;
170 pll_params->tx_clk_div = tx_clk_div;
171 pll_params->fracn_quot = fracn_quot;
172 pll_params->fracn_rem = fracn_rem;
173 pll_params->fracn_den = fracn_den;
174 pll_params->fracn_en = fracn_en;
175 pll_params->pmix_en = pmix_en;
176 pll_params->multiplier = multiplier;
177 pll_params->ana_cp_prop = ana_cp_prop;
178 pll_params->mpll_ana_v2i = mpll_ana_v2i;
179 pll_params->ana_freq_vco = ana_freq_vco;
180
181 return 0;
182 }
183
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 2/5] drm/i915/snps_phy: Use HDMI PLL algorithm for DG2
2024-06-26 5:00 [PATCH 0/5] Add HDMI PLL Algorithm for SNPS/C10PHY Ankit Nautiyal
2024-06-26 5:00 ` [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2 Ankit Nautiyal
@ 2024-06-26 5:00 ` Ankit Nautiyal
2024-06-26 10:07 ` Jani Nikula
2024-06-26 5:00 ` [PATCH 3/5] drm/i915/cx0_phy_regs: Add C10 registers bits Ankit Nautiyal
` (5 subsequent siblings)
7 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2024-06-26 5:00 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: jani.nikula, ville.syrjala, mika.kahola, matthew.d.roper
Try SNPS_PHY HDMI tables computed using the algorithm, before using
consolidated tables.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_snps_phy.c | 20 ++++++++-----------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index e6df1f92def5..10fe28af0d11 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -12,6 +12,7 @@
#include "intel_display_types.h"
#include "intel_snps_phy.h"
#include "intel_snps_phy_regs.h"
+#include "intel_pll_algorithm.h"
/**
* DOC: Synopsis PHY support
@@ -1787,22 +1788,14 @@ intel_mpllb_tables_get(struct intel_crtc_state *crtc_state,
int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,
struct intel_encoder *encoder)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
const struct intel_mpllb_state * const *tables;
int i;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
- if (intel_snps_phy_check_hdmi_link_rate(crtc_state->port_clock)
- != MODE_OK) {
- /*
- * FIXME: Can only support fixed HDMI frequencies
- * until we have a proper algorithm under a valid
- * license.
- */
- drm_dbg_kms(&i915->drm, "Can't support HDMI link rate %d\n",
- crtc_state->port_clock);
- return -EINVAL;
- }
+ /* try computed SNPS_PHY HDMI tables before using consolidated tables */
+ if (intel_snps_phy_compute_hdmi_tmds_pll(crtc_state->port_clock,
+ &crtc_state->dpll_hw_state.mpllb) == 0)
+ return 0;
}
tables = intel_mpllb_tables_get(crtc_state, encoder);
@@ -1991,6 +1984,9 @@ int intel_snps_phy_check_hdmi_link_rate(int clock)
return MODE_OK;
}
+ if (clock >= 25175 && clock <= 594000)
+ return MODE_OK;
+
return MODE_CLOCK_RANGE;
}
--
2.40.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 2/5] drm/i915/snps_phy: Use HDMI PLL algorithm for DG2
2024-06-26 5:00 ` [PATCH 2/5] drm/i915/snps_phy: Use " Ankit Nautiyal
@ 2024-06-26 10:07 ` Jani Nikula
2024-06-27 17:02 ` Nautiyal, Ankit K
0 siblings, 1 reply; 25+ messages in thread
From: Jani Nikula @ 2024-06-26 10:07 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Try SNPS_PHY HDMI tables computed using the algorithm, before using
> consolidated tables.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_snps_phy.c | 20 ++++++++-----------
> 1 file changed, 8 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> index e6df1f92def5..10fe28af0d11 100644
> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> @@ -12,6 +12,7 @@
> #include "intel_display_types.h"
> #include "intel_snps_phy.h"
> #include "intel_snps_phy_regs.h"
> +#include "intel_pll_algorithm.h"
Keep includes sorted.
>
> /**
> * DOC: Synopsis PHY support
> @@ -1787,22 +1788,14 @@ intel_mpllb_tables_get(struct intel_crtc_state *crtc_state,
> int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,
> struct intel_encoder *encoder)
> {
> - struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> const struct intel_mpllb_state * const *tables;
> int i;
>
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> - if (intel_snps_phy_check_hdmi_link_rate(crtc_state->port_clock)
> - != MODE_OK) {
> - /*
> - * FIXME: Can only support fixed HDMI frequencies
> - * until we have a proper algorithm under a valid
> - * license.
> - */
> - drm_dbg_kms(&i915->drm, "Can't support HDMI link rate %d\n",
> - crtc_state->port_clock);
> - return -EINVAL;
> - }
> + /* try computed SNPS_PHY HDMI tables before using consolidated tables */
Computed tables vs. consolidated tables? Huh?
Anyway, I think we have two choices here:
- Always use computed values.
- Prefer fixed tables, fall back to computed values.
But we definitely should not try to compute first and fall back to fixed
tables.
> + if (intel_snps_phy_compute_hdmi_tmds_pll(crtc_state->port_clock,
> + &crtc_state->dpll_hw_state.mpllb) == 0)
> + return 0;
> }
>
> tables = intel_mpllb_tables_get(crtc_state, encoder);
> @@ -1991,6 +1984,9 @@ int intel_snps_phy_check_hdmi_link_rate(int clock)
> return MODE_OK;
> }
>
> + if (clock >= 25175 && clock <= 594000)
> + return MODE_OK;
> +
How's this related to the patch at hand?
> return MODE_CLOCK_RANGE;
> }
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 2/5] drm/i915/snps_phy: Use HDMI PLL algorithm for DG2
2024-06-26 10:07 ` Jani Nikula
@ 2024-06-27 17:02 ` Nautiyal, Ankit K
2024-06-27 18:30 ` Jani Nikula
0 siblings, 1 reply; 25+ messages in thread
From: Nautiyal, Ankit K @ 2024-06-27 17:02 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On 6/26/2024 3:37 PM, Jani Nikula wrote:
> On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Try SNPS_PHY HDMI tables computed using the algorithm, before using
>> consolidated tables.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_snps_phy.c | 20 ++++++++-----------
>> 1 file changed, 8 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>> index e6df1f92def5..10fe28af0d11 100644
>> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
>> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>> @@ -12,6 +12,7 @@
>> #include "intel_display_types.h"
>> #include "intel_snps_phy.h"
>> #include "intel_snps_phy_regs.h"
>> +#include "intel_pll_algorithm.h"
> Keep includes sorted.
Noted. Thanks for pointing this out.
>
>>
>> /**
>> * DOC: Synopsis PHY support
>> @@ -1787,22 +1788,14 @@ intel_mpllb_tables_get(struct intel_crtc_state *crtc_state,
>> int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,
>> struct intel_encoder *encoder)
>> {
>> - struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>> const struct intel_mpllb_state * const *tables;
>> int i;
>>
>> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
>> - if (intel_snps_phy_check_hdmi_link_rate(crtc_state->port_clock)
>> - != MODE_OK) {
>> - /*
>> - * FIXME: Can only support fixed HDMI frequencies
>> - * until we have a proper algorithm under a valid
>> - * license.
>> - */
>> - drm_dbg_kms(&i915->drm, "Can't support HDMI link rate %d\n",
>> - crtc_state->port_clock);
>> - return -EINVAL;
>> - }
>> + /* try computed SNPS_PHY HDMI tables before using consolidated tables */
> Computed tables vs. consolidated tables? Huh?
>
> Anyway, I think we have two choices here:
>
> - Always use computed values.
>
> - Prefer fixed tables, fall back to computed values.
>
> But we definitely should not try to compute first and fall back to fixed
> tables.
Hmm I was not sure if we need the fixed tables after this and whether we
should remove them altogether.
But it makes more sense to use prefer the fixed tables and fall back to
computed values.
I'll make the changes in the next version.
>
>> + if (intel_snps_phy_compute_hdmi_tmds_pll(crtc_state->port_clock,
>> + &crtc_state->dpll_hw_state.mpllb) == 0)
>> + return 0;
>> }
>>
>> tables = intel_mpllb_tables_get(crtc_state, encoder);
>> @@ -1991,6 +1984,9 @@ int intel_snps_phy_check_hdmi_link_rate(int clock)
>> return MODE_OK;
>> }
>>
>> + if (clock >= 25175 && clock <= 594000)
>> + return MODE_OK;
>> +
> How's this related to the patch at hand?
Currently we prune the modes if the clock does not match that given in
the table.
Now that we support all clocks between 25175 and 594000 we need this,
but perhaps will add as a separate patch.
Perhaps I can remove this function all together and put the condition in
hdmi_port_clock valid, in separate patch.
Regards,
Ankit
>
>> return MODE_CLOCK_RANGE;
>> }
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 2/5] drm/i915/snps_phy: Use HDMI PLL algorithm for DG2
2024-06-27 17:02 ` Nautiyal, Ankit K
@ 2024-06-27 18:30 ` Jani Nikula
2024-06-28 5:06 ` Nautiyal, Ankit K
0 siblings, 1 reply; 25+ messages in thread
From: Jani Nikula @ 2024-06-27 18:30 UTC (permalink / raw)
To: Nautiyal, Ankit K, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On Thu, 27 Jun 2024, "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com> wrote:
> On 6/26/2024 3:37 PM, Jani Nikula wrote:
>> On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>>> Try SNPS_PHY HDMI tables computed using the algorithm, before using
>>> consolidated tables.
>>>
>>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_snps_phy.c | 20 ++++++++-----------
>>> 1 file changed, 8 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>>> index e6df1f92def5..10fe28af0d11 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>>> @@ -12,6 +12,7 @@
>>> #include "intel_display_types.h"
>>> #include "intel_snps_phy.h"
>>> #include "intel_snps_phy_regs.h"
>>> +#include "intel_pll_algorithm.h"
>> Keep includes sorted.
> Noted. Thanks for pointing this out.
>>
>>>
>>> /**
>>> * DOC: Synopsis PHY support
>>> @@ -1787,22 +1788,14 @@ intel_mpllb_tables_get(struct intel_crtc_state *crtc_state,
>>> int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,
>>> struct intel_encoder *encoder)
>>> {
>>> - struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>>> const struct intel_mpllb_state * const *tables;
>>> int i;
>>>
>>> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
>>> - if (intel_snps_phy_check_hdmi_link_rate(crtc_state->port_clock)
>>> - != MODE_OK) {
>>> - /*
>>> - * FIXME: Can only support fixed HDMI frequencies
>>> - * until we have a proper algorithm under a valid
>>> - * license.
>>> - */
>>> - drm_dbg_kms(&i915->drm, "Can't support HDMI link rate %d\n",
>>> - crtc_state->port_clock);
>>> - return -EINVAL;
>>> - }
>>> + /* try computed SNPS_PHY HDMI tables before using consolidated tables */
>> Computed tables vs. consolidated tables? Huh?
>>
>> Anyway, I think we have two choices here:
>>
>> - Always use computed values.
>>
>> - Prefer fixed tables, fall back to computed values.
>>
>> But we definitely should not try to compute first and fall back to fixed
>> tables.
>
> Hmm I was not sure if we need the fixed tables after this and whether we
> should remove them altogether.
>
> But it makes more sense to use prefer the fixed tables and fall back to
> computed values.
>
> I'll make the changes in the next version.
>
>
>>
>>> + if (intel_snps_phy_compute_hdmi_tmds_pll(crtc_state->port_clock,
>>> + &crtc_state->dpll_hw_state.mpllb) == 0)
>>> + return 0;
>>> }
>>>
>>> tables = intel_mpllb_tables_get(crtc_state, encoder);
>>> @@ -1991,6 +1984,9 @@ int intel_snps_phy_check_hdmi_link_rate(int clock)
>>> return MODE_OK;
>>> }
>>>
>>> + if (clock >= 25175 && clock <= 594000)
>>> + return MODE_OK;
>>> +
>> How's this related to the patch at hand?
>
> Currently we prune the modes if the clock does not match that given in
> the table.
>
> Now that we support all clocks between 25175 and 594000 we need this,
> but perhaps will add as a separate patch.
>
> Perhaps I can remove this function all together and put the condition in
> hdmi_port_clock valid, in separate patch.
But we already have intel_hdmi_source_max_tmds_clock(), which also takes
into account platform specifics. For example the fact that 594000 is not
the max on all platforms.
BR,
Jani.
>
> Regards,
>
> Ankit
>
>
>>
>>> return MODE_CLOCK_RANGE;
>>> }
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 2/5] drm/i915/snps_phy: Use HDMI PLL algorithm for DG2
2024-06-27 18:30 ` Jani Nikula
@ 2024-06-28 5:06 ` Nautiyal, Ankit K
0 siblings, 0 replies; 25+ messages in thread
From: Nautiyal, Ankit K @ 2024-06-28 5:06 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On 6/28/2024 12:00 AM, Jani Nikula wrote:
> On Thu, 27 Jun 2024, "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com> wrote:
>> On 6/26/2024 3:37 PM, Jani Nikula wrote:
>>> On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>>>> Try SNPS_PHY HDMI tables computed using the algorithm, before using
>>>> consolidated tables.
>>>>
>>>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/display/intel_snps_phy.c | 20 ++++++++-----------
>>>> 1 file changed, 8 insertions(+), 12 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>>>> index e6df1f92def5..10fe28af0d11 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>>>> @@ -12,6 +12,7 @@
>>>> #include "intel_display_types.h"
>>>> #include "intel_snps_phy.h"
>>>> #include "intel_snps_phy_regs.h"
>>>> +#include "intel_pll_algorithm.h"
>>> Keep includes sorted.
>> Noted. Thanks for pointing this out.
>>>>
>>>> /**
>>>> * DOC: Synopsis PHY support
>>>> @@ -1787,22 +1788,14 @@ intel_mpllb_tables_get(struct intel_crtc_state *crtc_state,
>>>> int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,
>>>> struct intel_encoder *encoder)
>>>> {
>>>> - struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>>>> const struct intel_mpllb_state * const *tables;
>>>> int i;
>>>>
>>>> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
>>>> - if (intel_snps_phy_check_hdmi_link_rate(crtc_state->port_clock)
>>>> - != MODE_OK) {
>>>> - /*
>>>> - * FIXME: Can only support fixed HDMI frequencies
>>>> - * until we have a proper algorithm under a valid
>>>> - * license.
>>>> - */
>>>> - drm_dbg_kms(&i915->drm, "Can't support HDMI link rate %d\n",
>>>> - crtc_state->port_clock);
>>>> - return -EINVAL;
>>>> - }
>>>> + /* try computed SNPS_PHY HDMI tables before using consolidated tables */
>>> Computed tables vs. consolidated tables? Huh?
>>>
>>> Anyway, I think we have two choices here:
>>>
>>> - Always use computed values.
>>>
>>> - Prefer fixed tables, fall back to computed values.
>>>
>>> But we definitely should not try to compute first and fall back to fixed
>>> tables.
>> Hmm I was not sure if we need the fixed tables after this and whether we
>> should remove them altogether.
>>
>> But it makes more sense to use prefer the fixed tables and fall back to
>> computed values.
>>
>> I'll make the changes in the next version.
>>
>>
>>>> + if (intel_snps_phy_compute_hdmi_tmds_pll(crtc_state->port_clock,
>>>> + &crtc_state->dpll_hw_state.mpllb) == 0)
>>>> + return 0;
>>>> }
>>>>
>>>> tables = intel_mpllb_tables_get(crtc_state, encoder);
>>>> @@ -1991,6 +1984,9 @@ int intel_snps_phy_check_hdmi_link_rate(int clock)
>>>> return MODE_OK;
>>>> }
>>>>
>>>> + if (clock >= 25175 && clock <= 594000)
>>>> + return MODE_OK;
>>>> +
>>> How's this related to the patch at hand?
>> Currently we prune the modes if the clock does not match that given in
>> the table.
>>
>> Now that we support all clocks between 25175 and 594000 we need this,
>> but perhaps will add as a separate patch.
>>
>> Perhaps I can remove this function all together and put the condition in
>> hdmi_port_clock valid, in separate patch.
> But we already have intel_hdmi_source_max_tmds_clock(), which also takes
> into account platform specifics. For example the fact that 594000 is not
> the max on all platforms.
You are right,as per Bspec platform overview and port clock programming
pages maximum is indeed 600Mhz.
I am wondering, we need to fix existing
intel_c20_phy_check_hdmi_link_rate too, as per Bspec:74165.
I think we can remove the intel_cx0_phy_check_hdmi_link_rate and
intel_snps_phy_check_hdmi_link_rate checks from hdmi_port_clock_valid.
Thanks & Regards,
Ankit
>
> BR,
> Jani.
>
>
>
>
>
>> Regards,
>>
>> Ankit
>>
>>
>>>> return MODE_CLOCK_RANGE;
>>>> }
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 3/5] drm/i915/cx0_phy_regs: Add C10 registers bits
2024-06-26 5:00 [PATCH 0/5] Add HDMI PLL Algorithm for SNPS/C10PHY Ankit Nautiyal
2024-06-26 5:00 ` [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2 Ankit Nautiyal
2024-06-26 5:00 ` [PATCH 2/5] drm/i915/snps_phy: Use " Ankit Nautiyal
@ 2024-06-26 5:00 ` Ankit Nautiyal
2024-06-26 5:00 ` [PATCH 4/5] drm/i915/pll_algorithm: Compute C10 HDMI PLLs with algorithm Ankit Nautiyal
` (4 subsequent siblings)
7 siblings, 0 replies; 25+ messages in thread
From: Ankit Nautiyal @ 2024-06-26 5:00 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: jani.nikula, ville.syrjala, mika.kahola, matthew.d.roper
Add C10 register bits to be used for computing HDMI PLLs with
algorithm.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
index ab3ae110b68f..56443bf3e7cf 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
@@ -202,10 +202,34 @@
/* C10 Vendor Registers */
#define PHY_C10_VDR_PLL(idx) (0xC00 + (idx))
+#define C10_PLL0_SSC_EN REG_BIT8(0)
+#define C10_PLL0_DIVCLK_EN REG_BIT8(1)
+#define C10_PLL0_DIV5CLK_EN REG_BIT8(2)
+#define C10_PLL0_WORDDIV2_EN REG_BIT8(3)
#define C10_PLL0_FRACEN REG_BIT8(4)
+#define C10_PLL0_PMIX_EN REG_BIT8(5)
+#define C10_PLL0_ANA_FREQ_VCO_MASK REG_GENMASK8(7, 6)
+#define C10_PLL1_DIV_MULTIPLIER_MASK REG_GENMASK8(7, 0)
+#define C10_PLL2_MULTIPLIERL_MASK REG_GENMASK8(7, 0)
#define C10_PLL3_MULTIPLIERH_MASK REG_GENMASK8(3, 0)
+#define C10_PLL8_SSC_UP_SPREAD REG_BIT(5)
+#define C10_PLL9_FRACN_DENL_MASK REG_GENMASK8(7, 0)
+#define C10_PLL10_FRACN_DENH_MASK REG_GENMASK8(7, 0)
+#define C10_PLL11_FRACN_QUOT_L_MASK REG_GENMASK8(7, 0)
+#define C10_PLL12_FRACN_QUOT_H_MASK REG_GENMASK8(7, 0)
+#define C10_PLL13_FRACN_REM_L_MASK REG_GENMASK8(7, 0)
+#define C10_PLL14_FRACN_REM_H_MASK REG_GENMASK8(7, 0)
#define C10_PLL15_TXCLKDIV_MASK REG_GENMASK8(2, 0)
#define C10_PLL15_HDMIDIV_MASK REG_GENMASK8(5, 3)
+#define C10_PLL15_PIXELCLKDIV_MASK REG_GENMASK8(7, 6)
+#define C10_PLL16_ANA_CPINT REG_GENMASK8(6, 0)
+#define C10_PLL16_ANA_CPINTGS_L REG_BIT(7)
+#define C10_PLL17_ANA_CPINTGS_H_MASK REG_GENMASK8(5, 0)
+#define C10_PLL17_ANA_CPPROP_L_MASK REG_GENMASK8(7, 6)
+#define C10_PLL18_ANA_CPPROP_H_MASK REG_GENMASK8(4, 0)
+#define C10_PLL18_ANA_CPPROPGS_L_MASK REG_GENMASK8(7, 5)
+#define C10_PLL19_ANA_CPPROPGS_H_MASK REG_GENMASK8(3, 0)
+#define C10_PLL19_ANA_V2I_MASK REG_GENMASK8(5, 4)
#define PHY_C10_VDR_CMN(idx) (0xC20 + (idx))
#define C10_CMN0_REF_RANGE REG_FIELD_PREP(REG_GENMASK(4, 0), 1)
--
2.40.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 4/5] drm/i915/pll_algorithm: Compute C10 HDMI PLLs with algorithm
2024-06-26 5:00 [PATCH 0/5] Add HDMI PLL Algorithm for SNPS/C10PHY Ankit Nautiyal
` (2 preceding siblings ...)
2024-06-26 5:00 ` [PATCH 3/5] drm/i915/cx0_phy_regs: Add C10 registers bits Ankit Nautiyal
@ 2024-06-26 5:00 ` Ankit Nautiyal
2024-06-26 10:10 ` Jani Nikula
2024-06-26 5:00 ` [PATCH 5/5] drm/xe: Add intel_pll_algorithm in Makefile Ankit Nautiyal
` (3 subsequent siblings)
7 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2024-06-26 5:00 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: jani.nikula, ville.syrjala, mika.kahola, matthew.d.roper
Add support for computing C10 HDMI PLLS using the HDMI PLL algorithm.
Try C10 HDMI tables computed with the algorithm, before using the
consolidated tables.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 15 +++++
.../drm/i915/display/intel_pll_algorithm.c | 65 +++++++++++++++++++
.../drm/i915/display/intel_pll_algorithm.h | 2 +
3 files changed, 82 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 41f684c970dc..ebd2ec4023d6 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -15,6 +15,7 @@
#include "intel_dp.h"
#include "intel_hdmi.h"
#include "intel_panel.h"
+#include "intel_pll_algorithm.h"
#include "intel_psr.h"
#include "intel_tc.h"
@@ -1980,6 +1981,9 @@ static int intel_c10_phy_check_hdmi_link_rate(int clock)
return MODE_OK;
}
+ if (clock >= 25175 && clock <= 594000)
+ return MODE_OK;
+
return MODE_CLOCK_RANGE;
}
@@ -2030,6 +2034,17 @@ static int intel_c10pll_calc_state(struct intel_crtc_state *crtc_state,
const struct intel_c10pll_state * const *tables;
int i;
+ /* try computed C10 HDMI tables before using consolidated tables */
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
+ if (intel_c10_phy_compute_hdmi_tmds_pll(crtc_state->port_clock,
+ &crtc_state->dpll_hw_state.cx0pll.c10) == 0) {
+ intel_c10pll_update_pll(crtc_state, encoder);
+ crtc_state->dpll_hw_state.cx0pll.use_c10 = true;
+ }
+
+ return 0;
+ }
+
tables = intel_c10pll_tables_get(crtc_state, encoder);
if (!tables)
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.c b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
index d935715bd3ab..07b712cc0d6f 100644
--- a/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
+++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
@@ -5,6 +5,7 @@
#include <linux/math.h>
#include "i915_reg.h"
+#include "intel_cx0_phy_regs.h"
#include "intel_ddi.h"
#include "intel_ddi_buf_trans.h"
#include "intel_de.h"
@@ -250,3 +251,67 @@ int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_sta
return 0;
}
+
+int intel_c10_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_c10pll_state *pll_state)
+{
+ struct pll_output_params pll_params;
+ u32 refclk = 38400000;
+ u32 prescaler_divider = 0;
+ u32 ref_range = 1;
+ u32 ana_cp_int_gs = 30;
+ u32 ana_cp_prop_gs = 28;
+ int ret;
+ /* x axis frequencies. One curve in each array per v2i point */
+ const u64 c10_curve_freq_hz[2][8] = {
+ {2500000000, 3000000000, 3000000000, 3500000000, 3500000000, 4000000000, 4000000000, 5000000000},
+ {4000000000, 4600000000, 4601000000, 5400000000, 5401000000, 6600000000, 6601000000, 8001000000}};
+ /* y axis heights multiplied with 1000000000 */
+
+ const u64 c10_curve_0[2][8] = {
+ {41174500, 48605500, 42973700, 49433100, 42408600, 47681900, 40297400, 49131400},
+ {82056800, 94420700, 82323400, 96370600, 81273300, 98630100, 81728700, 99105700}};
+
+ const u64 c10_curve_1[2][8] = {
+ {73300000000000, 66000000000000, 83100000000000, 75300000000000, 99700000000000, 92300000000000, 125000000000000, 110000000000000},
+ {53700000000000, 47700000000000, 62200000000000, 54400000000000, 75100000000000, 63400000000000, 90600000000000, 76300000000000}};
+
+ /* Multiplied with 1000000000000 */
+ const u64 c10_curve_2[2][8] = {
+ {2415790000, 3136460000, 2581990000, 3222670000, 2529330000, 3042020000, 2336970000, 3191460000},
+ {4808390000, 5994250000, 4832730000, 6193730000, 4737700000, 6428750000, 4779200000, 6479340000}};
+
+ ret = _intel_phy_compute_hdmi_tmds_pll(pixel_clock, refclk, ref_range,
+ ana_cp_int_gs, ana_cp_prop_gs,
+ c10_curve_freq_hz, c10_curve_0,
+ c10_curve_1, c10_curve_2, prescaler_divider,
+ &pll_params);
+ if (ret)
+ return ret;
+
+ pll_state->tx = 0x10;
+ pll_state->cmn = 0x1;
+ pll_state->pll[0] = REG_FIELD_PREP(C10_PLL0_DIV5CLK_EN, pll_params.mpll_div5_en) |
+ REG_FIELD_PREP(C10_PLL0_FRACEN, pll_params.fracn_en) |
+ REG_FIELD_PREP(C10_PLL0_PMIX_EN, pll_params.pmix_en) |
+ REG_FIELD_PREP(C10_PLL0_ANA_FREQ_VCO_MASK, pll_params.ana_freq_vco);
+ pll_state->pll[2] = REG_FIELD_PREP(C10_PLL2_MULTIPLIERL_MASK, pll_params.multiplier);
+ pll_state->pll[3] = REG_FIELD_PREP(C10_PLL3_MULTIPLIERH_MASK, pll_params.multiplier >> 8);
+ pll_state->pll[8] = REG_FIELD_PREP(C10_PLL8_SSC_UP_SPREAD, pll_params.ssc_up_spread);
+ pll_state->pll[9] = REG_FIELD_PREP(C10_PLL9_FRACN_DENL_MASK, pll_params.fracn_den);
+ pll_state->pll[10] = REG_FIELD_PREP(C10_PLL10_FRACN_DENH_MASK, pll_params.fracn_den >> 8);
+ pll_state->pll[11] = REG_FIELD_PREP(C10_PLL11_FRACN_QUOT_L_MASK, pll_params.fracn_quot);
+ pll_state->pll[12] = REG_FIELD_PREP(C10_PLL12_FRACN_QUOT_H_MASK, pll_params.fracn_quot >> 8);
+ pll_state->pll[13] = REG_FIELD_PREP(C10_PLL13_FRACN_REM_L_MASK, pll_params.fracn_rem);
+ pll_state->pll[14] = REG_FIELD_PREP(C10_PLL14_FRACN_REM_H_MASK, pll_params.fracn_rem >> 8);
+ pll_state->pll[15] = REG_FIELD_PREP(C10_PLL15_TXCLKDIV_MASK, pll_params.tx_clk_div) |
+ REG_FIELD_PREP(C10_PLL15_HDMIDIV_MASK, pll_params.hdmi_div);
+ pll_state->pll[16] = REG_FIELD_PREP(C10_PLL16_ANA_CPINT, pll_params.ana_cp_int) |
+ REG_FIELD_PREP(C10_PLL16_ANA_CPINTGS_L, ana_cp_int_gs);
+ pll_state->pll[17] = REG_FIELD_PREP(C10_PLL17_ANA_CPINTGS_H_MASK, ana_cp_int_gs >> 1) |
+ REG_FIELD_PREP(C10_PLL17_ANA_CPPROP_L_MASK, pll_params.ana_cp_prop);
+ pll_state->pll[18] = REG_FIELD_PREP(C10_PLL18_ANA_CPPROP_H_MASK, pll_params.ana_cp_prop >> 2) |
+ REG_FIELD_PREP(C10_PLL18_ANA_CPPROPGS_L_MASK, ana_cp_prop_gs);
+ pll_state->pll[19] = REG_FIELD_PREP(C10_PLL19_ANA_CPPROPGS_H_MASK, ana_cp_prop_gs >> 3) |
+ REG_FIELD_PREP(C10_PLL19_ANA_V2I_MASK, pll_params.mpll_ana_v2i);
+ return 0;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.h b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
index 83a620fb3db2..aafbf158403b 100644
--- a/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
+++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
@@ -10,6 +10,7 @@
struct drm_i915_private;
struct intel_atomic_state;
+struct intel_c10pll_state;
struct intel_crtc;
struct intel_crtc_state;
struct intel_encoder;
@@ -35,5 +36,6 @@ struct pll_output_params {
};
int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_state *pll_state);
+int intel_c10_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_c10pll_state *pll_state);
#endif /* __INTEL_PLL_ALGORITHM_H__ */
--
2.40.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 4/5] drm/i915/pll_algorithm: Compute C10 HDMI PLLs with algorithm
2024-06-26 5:00 ` [PATCH 4/5] drm/i915/pll_algorithm: Compute C10 HDMI PLLs with algorithm Ankit Nautiyal
@ 2024-06-26 10:10 ` Jani Nikula
2024-06-27 17:08 ` Nautiyal, Ankit K
0 siblings, 1 reply; 25+ messages in thread
From: Jani Nikula @ 2024-06-26 10:10 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Add support for computing C10 HDMI PLLS using the HDMI PLL algorithm.
> Try C10 HDMI tables computed with the algorithm, before using the
> consolidated tables.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 15 +++++
> .../drm/i915/display/intel_pll_algorithm.c | 65 +++++++++++++++++++
> .../drm/i915/display/intel_pll_algorithm.h | 2 +
> 3 files changed, 82 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> index 41f684c970dc..ebd2ec4023d6 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> @@ -15,6 +15,7 @@
> #include "intel_dp.h"
> #include "intel_hdmi.h"
> #include "intel_panel.h"
> +#include "intel_pll_algorithm.h"
> #include "intel_psr.h"
> #include "intel_tc.h"
>
> @@ -1980,6 +1981,9 @@ static int intel_c10_phy_check_hdmi_link_rate(int clock)
> return MODE_OK;
> }
>
> + if (clock >= 25175 && clock <= 594000)
> + return MODE_OK;
> +
Again, seems like an unrelated change.
> return MODE_CLOCK_RANGE;
> }
>
> @@ -2030,6 +2034,17 @@ static int intel_c10pll_calc_state(struct intel_crtc_state *crtc_state,
> const struct intel_c10pll_state * const *tables;
> int i;
>
> + /* try computed C10 HDMI tables before using consolidated tables */
IMO it's not "tables" if it's computed.
And again, same thing as before, either go all in with the computed
values, or try fixed tables first and fall back to computed values. Not
the other way round.
> + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> + if (intel_c10_phy_compute_hdmi_tmds_pll(crtc_state->port_clock,
> + &crtc_state->dpll_hw_state.cx0pll.c10) == 0) {
> + intel_c10pll_update_pll(crtc_state, encoder);
> + crtc_state->dpll_hw_state.cx0pll.use_c10 = true;
> + }
> +
> + return 0;
> + }
> +
> tables = intel_c10pll_tables_get(crtc_state, encoder);
> if (!tables)
> return -EINVAL;
> diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.c b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
> index d935715bd3ab..07b712cc0d6f 100644
> --- a/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
> +++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
> @@ -5,6 +5,7 @@
>
> #include <linux/math.h>
> #include "i915_reg.h"
> +#include "intel_cx0_phy_regs.h"
> #include "intel_ddi.h"
> #include "intel_ddi_buf_trans.h"
> #include "intel_de.h"
> @@ -250,3 +251,67 @@ int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_sta
>
> return 0;
> }
> +
> +int intel_c10_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_c10pll_state *pll_state)
> +{
> + struct pll_output_params pll_params;
> + u32 refclk = 38400000;
> + u32 prescaler_divider = 0;
> + u32 ref_range = 1;
> + u32 ana_cp_int_gs = 30;
> + u32 ana_cp_prop_gs = 28;
> + int ret;
> + /* x axis frequencies. One curve in each array per v2i point */
> + const u64 c10_curve_freq_hz[2][8] = {
> + {2500000000, 3000000000, 3000000000, 3500000000, 3500000000, 4000000000, 4000000000, 5000000000},
> + {4000000000, 4600000000, 4601000000, 5400000000, 5401000000, 6600000000, 6601000000, 8001000000}};
> + /* y axis heights multiplied with 1000000000 */
> +
> + const u64 c10_curve_0[2][8] = {
> + {41174500, 48605500, 42973700, 49433100, 42408600, 47681900, 40297400, 49131400},
> + {82056800, 94420700, 82323400, 96370600, 81273300, 98630100, 81728700, 99105700}};
> +
> + const u64 c10_curve_1[2][8] = {
> + {73300000000000, 66000000000000, 83100000000000, 75300000000000, 99700000000000, 92300000000000, 125000000000000, 110000000000000},
> + {53700000000000, 47700000000000, 62200000000000, 54400000000000, 75100000000000, 63400000000000, 90600000000000, 76300000000000}};
> +
> + /* Multiplied with 1000000000000 */
> + const u64 c10_curve_2[2][8] = {
> + {2415790000, 3136460000, 2581990000, 3222670000, 2529330000, 3042020000, 2336970000, 3191460000},
> + {4808390000, 5994250000, 4832730000, 6193730000, 4737700000, 6428750000, 4779200000, 6479340000}};
Static const. Please fix the style.
> +
> + ret = _intel_phy_compute_hdmi_tmds_pll(pixel_clock, refclk, ref_range,
> + ana_cp_int_gs, ana_cp_prop_gs,
> + c10_curve_freq_hz, c10_curve_0,
> + c10_curve_1, c10_curve_2, prescaler_divider,
> + &pll_params);
> + if (ret)
> + return ret;
> +
> + pll_state->tx = 0x10;
> + pll_state->cmn = 0x1;
> + pll_state->pll[0] = REG_FIELD_PREP(C10_PLL0_DIV5CLK_EN, pll_params.mpll_div5_en) |
> + REG_FIELD_PREP(C10_PLL0_FRACEN, pll_params.fracn_en) |
> + REG_FIELD_PREP(C10_PLL0_PMIX_EN, pll_params.pmix_en) |
> + REG_FIELD_PREP(C10_PLL0_ANA_FREQ_VCO_MASK, pll_params.ana_freq_vco);
> + pll_state->pll[2] = REG_FIELD_PREP(C10_PLL2_MULTIPLIERL_MASK, pll_params.multiplier);
> + pll_state->pll[3] = REG_FIELD_PREP(C10_PLL3_MULTIPLIERH_MASK, pll_params.multiplier >> 8);
> + pll_state->pll[8] = REG_FIELD_PREP(C10_PLL8_SSC_UP_SPREAD, pll_params.ssc_up_spread);
> + pll_state->pll[9] = REG_FIELD_PREP(C10_PLL9_FRACN_DENL_MASK, pll_params.fracn_den);
> + pll_state->pll[10] = REG_FIELD_PREP(C10_PLL10_FRACN_DENH_MASK, pll_params.fracn_den >> 8);
> + pll_state->pll[11] = REG_FIELD_PREP(C10_PLL11_FRACN_QUOT_L_MASK, pll_params.fracn_quot);
> + pll_state->pll[12] = REG_FIELD_PREP(C10_PLL12_FRACN_QUOT_H_MASK, pll_params.fracn_quot >> 8);
> + pll_state->pll[13] = REG_FIELD_PREP(C10_PLL13_FRACN_REM_L_MASK, pll_params.fracn_rem);
> + pll_state->pll[14] = REG_FIELD_PREP(C10_PLL14_FRACN_REM_H_MASK, pll_params.fracn_rem >> 8);
> + pll_state->pll[15] = REG_FIELD_PREP(C10_PLL15_TXCLKDIV_MASK, pll_params.tx_clk_div) |
> + REG_FIELD_PREP(C10_PLL15_HDMIDIV_MASK, pll_params.hdmi_div);
> + pll_state->pll[16] = REG_FIELD_PREP(C10_PLL16_ANA_CPINT, pll_params.ana_cp_int) |
> + REG_FIELD_PREP(C10_PLL16_ANA_CPINTGS_L, ana_cp_int_gs);
> + pll_state->pll[17] = REG_FIELD_PREP(C10_PLL17_ANA_CPINTGS_H_MASK, ana_cp_int_gs >> 1) |
> + REG_FIELD_PREP(C10_PLL17_ANA_CPPROP_L_MASK, pll_params.ana_cp_prop);
> + pll_state->pll[18] = REG_FIELD_PREP(C10_PLL18_ANA_CPPROP_H_MASK, pll_params.ana_cp_prop >> 2) |
> + REG_FIELD_PREP(C10_PLL18_ANA_CPPROPGS_L_MASK, ana_cp_prop_gs);
> + pll_state->pll[19] = REG_FIELD_PREP(C10_PLL19_ANA_CPPROPGS_H_MASK, ana_cp_prop_gs >> 3) |
> + REG_FIELD_PREP(C10_PLL19_ANA_V2I_MASK, pll_params.mpll_ana_v2i);
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.h b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
> index 83a620fb3db2..aafbf158403b 100644
> --- a/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
> +++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
> @@ -10,6 +10,7 @@
>
> struct drm_i915_private;
> struct intel_atomic_state;
> +struct intel_c10pll_state;
> struct intel_crtc;
> struct intel_crtc_state;
> struct intel_encoder;
> @@ -35,5 +36,6 @@ struct pll_output_params {
> };
>
> int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_state *pll_state);
> +int intel_c10_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_c10pll_state *pll_state);
>
> #endif /* __INTEL_PLL_ALGORITHM_H__ */
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 4/5] drm/i915/pll_algorithm: Compute C10 HDMI PLLs with algorithm
2024-06-26 10:10 ` Jani Nikula
@ 2024-06-27 17:08 ` Nautiyal, Ankit K
0 siblings, 0 replies; 25+ messages in thread
From: Nautiyal, Ankit K @ 2024-06-27 17:08 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On 6/26/2024 3:40 PM, Jani Nikula wrote:
> On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Add support for computing C10 HDMI PLLS using the HDMI PLL algorithm.
>> Try C10 HDMI tables computed with the algorithm, before using the
>> consolidated tables.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 15 +++++
>> .../drm/i915/display/intel_pll_algorithm.c | 65 +++++++++++++++++++
>> .../drm/i915/display/intel_pll_algorithm.h | 2 +
>> 3 files changed, 82 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>> index 41f684c970dc..ebd2ec4023d6 100644
>> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>> @@ -15,6 +15,7 @@
>> #include "intel_dp.h"
>> #include "intel_hdmi.h"
>> #include "intel_panel.h"
>> +#include "intel_pll_algorithm.h"
>> #include "intel_psr.h"
>> #include "intel_tc.h"
>>
>> @@ -1980,6 +1981,9 @@ static int intel_c10_phy_check_hdmi_link_rate(int clock)
>> return MODE_OK;
>> }
>>
>> + if (clock >= 25175 && clock <= 594000)
>> + return MODE_OK;
>> +
> Again, seems like an unrelated change.
Will move the relevant change in a separate patch as mentioned in
previous response.
>
>> return MODE_CLOCK_RANGE;
>> }
>>
>> @@ -2030,6 +2034,17 @@ static int intel_c10pll_calc_state(struct intel_crtc_state *crtc_state,
>> const struct intel_c10pll_state * const *tables;
>> int i;
>>
>> + /* try computed C10 HDMI tables before using consolidated tables */
> IMO it's not "tables" if it's computed.
Yeah I meant to mention values. Will fix this in next version.
>
> And again, same thing as before, either go all in with the computed
> values, or try fixed tables first and fall back to computed values. Not
> the other way round.
As agreed in previous patch, will fix this to try fixed tables first and
fall back to computed values.
>> + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
>> + if (intel_c10_phy_compute_hdmi_tmds_pll(crtc_state->port_clock,
>> + &crtc_state->dpll_hw_state.cx0pll.c10) == 0) {
>> + intel_c10pll_update_pll(crtc_state, encoder);
>> + crtc_state->dpll_hw_state.cx0pll.use_c10 = true;
>> + }
>> +
>> + return 0;
>> + }
>> +
>> tables = intel_c10pll_tables_get(crtc_state, encoder);
>> if (!tables)
>> return -EINVAL;
>> diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.c b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
>> index d935715bd3ab..07b712cc0d6f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
>> +++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.c
>> @@ -5,6 +5,7 @@
>>
>> #include <linux/math.h>
>> #include "i915_reg.h"
>> +#include "intel_cx0_phy_regs.h"
>> #include "intel_ddi.h"
>> #include "intel_ddi_buf_trans.h"
>> #include "intel_de.h"
>> @@ -250,3 +251,67 @@ int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_sta
>>
>> return 0;
>> }
>> +
>> +int intel_c10_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_c10pll_state *pll_state)
>> +{
>> + struct pll_output_params pll_params;
>> + u32 refclk = 38400000;
>> + u32 prescaler_divider = 0;
>> + u32 ref_range = 1;
>> + u32 ana_cp_int_gs = 30;
>> + u32 ana_cp_prop_gs = 28;
>> + int ret;
>> + /* x axis frequencies. One curve in each array per v2i point */
>> + const u64 c10_curve_freq_hz[2][8] = {
>> + {2500000000, 3000000000, 3000000000, 3500000000, 3500000000, 4000000000, 4000000000, 5000000000},
>> + {4000000000, 4600000000, 4601000000, 5400000000, 5401000000, 6600000000, 6601000000, 8001000000}};
>> + /* y axis heights multiplied with 1000000000 */
>> +
>> + const u64 c10_curve_0[2][8] = {
>> + {41174500, 48605500, 42973700, 49433100, 42408600, 47681900, 40297400, 49131400},
>> + {82056800, 94420700, 82323400, 96370600, 81273300, 98630100, 81728700, 99105700}};
>> +
>> + const u64 c10_curve_1[2][8] = {
>> + {73300000000000, 66000000000000, 83100000000000, 75300000000000, 99700000000000, 92300000000000, 125000000000000, 110000000000000},
>> + {53700000000000, 47700000000000, 62200000000000, 54400000000000, 75100000000000, 63400000000000, 90600000000000, 76300000000000}};
>> +
>> + /* Multiplied with 1000000000000 */
>> + const u64 c10_curve_2[2][8] = {
>> + {2415790000, 3136460000, 2581990000, 3222670000, 2529330000, 3042020000, 2336970000, 3191460000},
>> + {4808390000, 5994250000, 4832730000, 6193730000, 4737700000, 6428750000, 4779200000, 6479340000}};
> Static const. Please fix the style.
Noted, will fix this.
Thanks & Regards,
Ankit
>
>> +
>> + ret = _intel_phy_compute_hdmi_tmds_pll(pixel_clock, refclk, ref_range,
>> + ana_cp_int_gs, ana_cp_prop_gs,
>> + c10_curve_freq_hz, c10_curve_0,
>> + c10_curve_1, c10_curve_2, prescaler_divider,
>> + &pll_params);
>> + if (ret)
>> + return ret;
>> +
>> + pll_state->tx = 0x10;
>> + pll_state->cmn = 0x1;
>> + pll_state->pll[0] = REG_FIELD_PREP(C10_PLL0_DIV5CLK_EN, pll_params.mpll_div5_en) |
>> + REG_FIELD_PREP(C10_PLL0_FRACEN, pll_params.fracn_en) |
>> + REG_FIELD_PREP(C10_PLL0_PMIX_EN, pll_params.pmix_en) |
>> + REG_FIELD_PREP(C10_PLL0_ANA_FREQ_VCO_MASK, pll_params.ana_freq_vco);
>> + pll_state->pll[2] = REG_FIELD_PREP(C10_PLL2_MULTIPLIERL_MASK, pll_params.multiplier);
>> + pll_state->pll[3] = REG_FIELD_PREP(C10_PLL3_MULTIPLIERH_MASK, pll_params.multiplier >> 8);
>> + pll_state->pll[8] = REG_FIELD_PREP(C10_PLL8_SSC_UP_SPREAD, pll_params.ssc_up_spread);
>> + pll_state->pll[9] = REG_FIELD_PREP(C10_PLL9_FRACN_DENL_MASK, pll_params.fracn_den);
>> + pll_state->pll[10] = REG_FIELD_PREP(C10_PLL10_FRACN_DENH_MASK, pll_params.fracn_den >> 8);
>> + pll_state->pll[11] = REG_FIELD_PREP(C10_PLL11_FRACN_QUOT_L_MASK, pll_params.fracn_quot);
>> + pll_state->pll[12] = REG_FIELD_PREP(C10_PLL12_FRACN_QUOT_H_MASK, pll_params.fracn_quot >> 8);
>> + pll_state->pll[13] = REG_FIELD_PREP(C10_PLL13_FRACN_REM_L_MASK, pll_params.fracn_rem);
>> + pll_state->pll[14] = REG_FIELD_PREP(C10_PLL14_FRACN_REM_H_MASK, pll_params.fracn_rem >> 8);
>> + pll_state->pll[15] = REG_FIELD_PREP(C10_PLL15_TXCLKDIV_MASK, pll_params.tx_clk_div) |
>> + REG_FIELD_PREP(C10_PLL15_HDMIDIV_MASK, pll_params.hdmi_div);
>> + pll_state->pll[16] = REG_FIELD_PREP(C10_PLL16_ANA_CPINT, pll_params.ana_cp_int) |
>> + REG_FIELD_PREP(C10_PLL16_ANA_CPINTGS_L, ana_cp_int_gs);
>> + pll_state->pll[17] = REG_FIELD_PREP(C10_PLL17_ANA_CPINTGS_H_MASK, ana_cp_int_gs >> 1) |
>> + REG_FIELD_PREP(C10_PLL17_ANA_CPPROP_L_MASK, pll_params.ana_cp_prop);
>> + pll_state->pll[18] = REG_FIELD_PREP(C10_PLL18_ANA_CPPROP_H_MASK, pll_params.ana_cp_prop >> 2) |
>> + REG_FIELD_PREP(C10_PLL18_ANA_CPPROPGS_L_MASK, ana_cp_prop_gs);
>> + pll_state->pll[19] = REG_FIELD_PREP(C10_PLL19_ANA_CPPROPGS_H_MASK, ana_cp_prop_gs >> 3) |
>> + REG_FIELD_PREP(C10_PLL19_ANA_V2I_MASK, pll_params.mpll_ana_v2i);
>> + return 0;
>> +}
>> diff --git a/drivers/gpu/drm/i915/display/intel_pll_algorithm.h b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
>> index 83a620fb3db2..aafbf158403b 100644
>> --- a/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
>> +++ b/drivers/gpu/drm/i915/display/intel_pll_algorithm.h
>> @@ -10,6 +10,7 @@
>>
>> struct drm_i915_private;
>> struct intel_atomic_state;
>> +struct intel_c10pll_state;
>> struct intel_crtc;
>> struct intel_crtc_state;
>> struct intel_encoder;
>> @@ -35,5 +36,6 @@ struct pll_output_params {
>> };
>>
>> int intel_snps_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_mpllb_state *pll_state);
>> +int intel_c10_phy_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_c10pll_state *pll_state);
>>
>> #endif /* __INTEL_PLL_ALGORITHM_H__ */
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 5/5] drm/xe: Add intel_pll_algorithm in Makefile
2024-06-26 5:00 [PATCH 0/5] Add HDMI PLL Algorithm for SNPS/C10PHY Ankit Nautiyal
` (3 preceding siblings ...)
2024-06-26 5:00 ` [PATCH 4/5] drm/i915/pll_algorithm: Compute C10 HDMI PLLs with algorithm Ankit Nautiyal
@ 2024-06-26 5:00 ` Ankit Nautiyal
2024-06-26 10:12 ` Jani Nikula
2024-06-26 5:42 ` ✗ Fi.CI.CHECKPATCH: warning for Add HDMI PLL Algorithm for SNPS/C10PHY Patchwork
` (2 subsequent siblings)
7 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2024-06-26 5:00 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: jani.nikula, ville.syrjala, mika.kahola, matthew.d.roper
Include the intel_pll_algorithm for xe driver.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 478acc94a71c..30b63c2eadd0 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -261,6 +261,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_modeset_setup.o \
i915-display/intel_modeset_verify.o \
i915-display/intel_panel.o \
+ i915-display/intel_pll_algorithm.o \
i915-display/intel_pmdemand.o \
i915-display/intel_pps.o \
i915-display/intel_psr.o \
--
2.40.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 5/5] drm/xe: Add intel_pll_algorithm in Makefile
2024-06-26 5:00 ` [PATCH 5/5] drm/xe: Add intel_pll_algorithm in Makefile Ankit Nautiyal
@ 2024-06-26 10:12 ` Jani Nikula
2024-06-27 17:12 ` Nautiyal, Ankit K
0 siblings, 1 reply; 25+ messages in thread
From: Jani Nikula @ 2024-06-26 10:12 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Include the intel_pll_algorithm for xe driver.
Not how this works. Please build every commit before submitting and
you'll see the build is broken at patch 2.
git rebase -i $tip -x make
BR,
Jani.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 478acc94a71c..30b63c2eadd0 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -261,6 +261,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
> i915-display/intel_modeset_setup.o \
> i915-display/intel_modeset_verify.o \
> i915-display/intel_panel.o \
> + i915-display/intel_pll_algorithm.o \
> i915-display/intel_pmdemand.o \
> i915-display/intel_pps.o \
> i915-display/intel_psr.o \
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 5/5] drm/xe: Add intel_pll_algorithm in Makefile
2024-06-26 10:12 ` Jani Nikula
@ 2024-06-27 17:12 ` Nautiyal, Ankit K
0 siblings, 0 replies; 25+ messages in thread
From: Nautiyal, Ankit K @ 2024-06-27 17:12 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe
Cc: ville.syrjala, mika.kahola, matthew.d.roper
On 6/26/2024 3:42 PM, Jani Nikula wrote:
> On Wed, 26 Jun 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Include the intel_pll_algorithm for xe driver.
> Not how this works. Please build every commit before submitting and
> you'll see the build is broken at patch 2.
>
> git rebase -i $tip -x make
>
> BR,
> Jani.
Apologies for this, will move this earlier in the series.
Thanks & Regards,
Ankit
>
>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/xe/Makefile | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
>> index 478acc94a71c..30b63c2eadd0 100644
>> --- a/drivers/gpu/drm/xe/Makefile
>> +++ b/drivers/gpu/drm/xe/Makefile
>> @@ -261,6 +261,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
>> i915-display/intel_modeset_setup.o \
>> i915-display/intel_modeset_verify.o \
>> i915-display/intel_panel.o \
>> + i915-display/intel_pll_algorithm.o \
>> i915-display/intel_pmdemand.o \
>> i915-display/intel_pps.o \
>> i915-display/intel_psr.o \
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Add HDMI PLL Algorithm for SNPS/C10PHY
2024-06-26 5:00 [PATCH 0/5] Add HDMI PLL Algorithm for SNPS/C10PHY Ankit Nautiyal
` (4 preceding siblings ...)
2024-06-26 5:00 ` [PATCH 5/5] drm/xe: Add intel_pll_algorithm in Makefile Ankit Nautiyal
@ 2024-06-26 5:42 ` Patchwork
2024-06-26 5:42 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-26 5:50 ` ✓ Fi.CI.BAT: success " Patchwork
7 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2024-06-26 5:42 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx
== Series Details ==
Series: Add HDMI PLL Algorithm for SNPS/C10PHY
URL : https://patchwork.freedesktop.org/series/135397/
State : warning
== Summary ==
Error: dim checkpatch failed
3e40cbc4f650 drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
-:32: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#32:
new file mode 100644
-:231: WARNING:LONG_LINE: line length of 113 exceeds 100 columns
#231: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:195:
+ {2500000000, 3000000000, 3000000000, 3500000000, 3500000000, 4000000000, 4000000000, 5000000000},
-:232: WARNING:LONG_LINE: line length of 114 exceeds 100 columns
#232: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:196:
+ {4000000000, 4600000000, 4601000000, 5400000000, 5401000000, 6600000000, 6601000000, 8001000000}};
-:241: WARNING:LONG_LINE: line length of 149 exceeds 100 columns
#241: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:205:
+ {85177000000000, 79385227160000, 95672603580000, 88857207160000, 109379790900000, 103528193900000, 131941242400000, 117279000000000},
-:242: WARNING:LONG_LINE: line length of 148 exceeds 100 columns
#242: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:206:
+ {60255000000000, 55569000000000, 72036000000000, 69509000000000, 81785000000000, 731030000000000, 96591000000000, 69077000000000}};
-:246: WARNING:LONG_LINE: line length of 113 exceeds 100 columns
#246: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:210:
+ {2186930000, 2835287134, 2395395343, 2932270687, 2351887545, 2861031697, 2294149152, 3091730000},
-:247: WARNING:LONG_LINE: line length of 112 exceeds 100 columns
#247: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:211:
+ {4560000000, 5570000000, 4610000000, 5770000000, 4670000000, 6240000000, 4890000000, 6600000000}
total: 0 errors, 7 warnings, 0 checks, 298 lines checked
a0b42b19bf39 drm/i915/snps_phy: Use HDMI PLL algorithm for DG2
a26be620bf3c drm/i915/cx0_phy_regs: Add C10 registers bits
d10909335f98 drm/i915/pll_algorithm: Compute C10 HDMI PLLs with algorithm
-:41: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#41: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2040:
+ &crtc_state->dpll_hw_state.cx0pll.c10) == 0) {
-:80: WARNING:LONG_LINE: line length of 113 exceeds 100 columns
#80: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:266:
+ {2500000000, 3000000000, 3000000000, 3500000000, 3500000000, 4000000000, 4000000000, 5000000000},
-:81: WARNING:LONG_LINE: line length of 114 exceeds 100 columns
#81: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:267:
+ {4000000000, 4600000000, 4601000000, 5400000000, 5401000000, 6600000000, 6601000000, 8001000000}};
-:89: WARNING:LONG_LINE: line length of 147 exceeds 100 columns
#89: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:275:
+ {73300000000000, 66000000000000, 83100000000000, 75300000000000, 99700000000000, 92300000000000, 125000000000000, 110000000000000},
-:90: WARNING:LONG_LINE: line length of 146 exceeds 100 columns
#90: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:276:
+ {53700000000000, 47700000000000, 62200000000000, 54400000000000, 75100000000000, 63400000000000, 90600000000000, 76300000000000}};
-:94: WARNING:LONG_LINE: line length of 113 exceeds 100 columns
#94: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:280:
+ {2415790000, 3136460000, 2581990000, 3222670000, 2529330000, 3042020000, 2336970000, 3191460000},
-:95: WARNING:LONG_LINE: line length of 114 exceeds 100 columns
#95: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:281:
+ {4808390000, 5994250000, 4832730000, 6193730000, 4737700000, 6428750000, 4779200000, 6479340000}};
-:117: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#117: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:303:
+ pll_state->pll[12] = REG_FIELD_PREP(C10_PLL12_FRACN_QUOT_H_MASK, pll_params.fracn_quot >> 8);
-:126: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#126: FILE: drivers/gpu/drm/i915/display/intel_pll_algorithm.c:312:
+ pll_state->pll[18] = REG_FIELD_PREP(C10_PLL18_ANA_CPPROP_H_MASK, pll_params.ana_cp_prop >> 2) |
total: 0 errors, 9 warnings, 0 checks, 120 lines checked
7432c2d794f6 drm/xe: Add intel_pll_algorithm in Makefile
^ permalink raw reply [flat|nested] 25+ messages in thread* ✗ Fi.CI.SPARSE: warning for Add HDMI PLL Algorithm for SNPS/C10PHY
2024-06-26 5:00 [PATCH 0/5] Add HDMI PLL Algorithm for SNPS/C10PHY Ankit Nautiyal
` (5 preceding siblings ...)
2024-06-26 5:42 ` ✗ Fi.CI.CHECKPATCH: warning for Add HDMI PLL Algorithm for SNPS/C10PHY Patchwork
@ 2024-06-26 5:42 ` Patchwork
2024-06-26 5:50 ` ✓ Fi.CI.BAT: success " Patchwork
7 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2024-06-26 5:42 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx
== Series Details ==
Series: Add HDMI PLL Algorithm for SNPS/C10PHY
URL : https://patchwork.freedesktop.org/series/135397/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:243:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:243:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:243:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:243:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:243:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:245:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:245:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:245:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:245:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:245:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:137:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:137:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:137:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:137:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:137:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:139:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:139:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:139:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:139:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:139:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'break'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'break'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'break'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'break'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'break'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'continue'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'continue'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'continue'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'continue'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'continue'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:140:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:140:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:140:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:140:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:151:1: warning: too many warnings
+./include/asm-generic/bitops/instrumented-non-atomic.h:151:1: warning: too many warnings
+./include/asm-generic/bitops/instrumented-non-atomic.h:151:1: warning: too many warnings
+./include/asm-generic/bitops/instrumented-non-atomic.h:151:1: warning: too many warnings
+./include/asm-generic/bitops/instrumented-non-atomic.h:151:1: warning: too many warnings
+./include/asm-generic/bitops/instrumented-non-atomic.h:154:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:154:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:154:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:154:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:154:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
^ permalink raw reply [flat|nested] 25+ messages in thread* ✓ Fi.CI.BAT: success for Add HDMI PLL Algorithm for SNPS/C10PHY
2024-06-26 5:00 [PATCH 0/5] Add HDMI PLL Algorithm for SNPS/C10PHY Ankit Nautiyal
` (6 preceding siblings ...)
2024-06-26 5:42 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2024-06-26 5:50 ` Patchwork
7 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2024-06-26 5:50 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 12530 bytes --]
== Series Details ==
Series: Add HDMI PLL Algorithm for SNPS/C10PHY
URL : https://patchwork.freedesktop.org/series/135397/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15000 -> Patchwork_135397v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/index.html
Participating hosts (41 -> 40)
------------------------------
Additional (3): fi-glk-j4005 bat-mtlp-6 fi-bsw-n3050
Missing (4): bat-kbl-2 fi-kbl-8809g fi-snb-2520m bat-jsl-3
Known issues
------------
Here are the changes found in Patchwork_135397v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- bat-mtlp-6: NOTRUN -> [SKIP][1] ([i915#9318])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@debugfs_test@basic-hwmon.html
* igt@fbdev@info:
- bat-mtlp-6: NOTRUN -> [SKIP][2] ([i915#1849] / [i915#2582])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@fbdev@info.html
* igt@fbdev@write:
- bat-mtlp-6: NOTRUN -> [SKIP][3] ([i915#2582]) +3 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@fbdev@write.html
* igt@gem_huc_copy@huc-copy:
- fi-glk-j4005: NOTRUN -> [SKIP][4] ([i915#2190])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/fi-glk-j4005/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-glk-j4005: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/fi-glk-j4005/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050: NOTRUN -> [SKIP][6] +19 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/fi-bsw-n3050/igt@gem_lmem_swapping@random-engines.html
* igt@gem_lmem_swapping@verify-random:
- bat-mtlp-6: NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@gem_lmem_swapping@verify-random.html
* igt@gem_mmap@basic:
- bat-mtlp-6: NOTRUN -> [SKIP][8] ([i915#4083])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@gem_mmap@basic.html
* igt@gem_tiled_blits@basic:
- bat-mtlp-6: NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@gem_tiled_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-mtlp-6: NOTRUN -> [SKIP][10] ([i915#4079]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-mtlp-6: NOTRUN -> [SKIP][11] ([i915#6621])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@workarounds:
- bat-adlp-6: [PASS][12] -> [INCOMPLETE][13] ([i915#9413])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-adlp-6/igt@i915_selftest@live@workarounds.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-adlp-6/igt@i915_selftest@live@workarounds.html
* igt@kms_addfb_basic@addfb25-x-tiled-legacy:
- bat-mtlp-6: NOTRUN -> [SKIP][14] ([i915#4212] / [i915#9792]) +8 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-mtlp-6: NOTRUN -> [SKIP][15] ([i915#5190] / [i915#9792])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-glk-j4005: NOTRUN -> [SKIP][16] +10 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/fi-glk-j4005/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- bat-mtlp-6: NOTRUN -> [SKIP][17] ([i915#9792]) +17 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_flip@basic-flip-vs-dpms:
- bat-mtlp-6: NOTRUN -> [SKIP][18] ([i915#3637] / [i915#9792]) +3 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@kms_flip@basic-flip-vs-dpms.html
* igt@kms_frontbuffer_tracking@basic:
- bat-mtlp-6: NOTRUN -> [SKIP][19] ([i915#4342] / [i915#5354] / [i915#9792])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-dp-1:
- bat-dg2-8: [PASS][20] -> [FAIL][21] ([i915#11379])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-dg2-8/igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-dp-1.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-dg2-8/igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-dp-1.html
* igt@kms_pm_backlight@basic-brightness:
- bat-mtlp-6: NOTRUN -> [SKIP][22] ([i915#5354] / [i915#9792])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-cursor-plane-move:
- bat-mtlp-6: NOTRUN -> [SKIP][23] ([i915#1072] / [i915#9673] / [i915#9732] / [i915#9792]) +3 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@kms_psr@psr-cursor-plane-move.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-mtlp-6: NOTRUN -> [SKIP][24] ([i915#3555] / [i915#8809] / [i915#9792])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-mtlp-6: NOTRUN -> [SKIP][25] ([i915#3708] / [i915#9792])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-mtlp-6: NOTRUN -> [SKIP][26] ([i915#3708] / [i915#4077]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-read:
- bat-mtlp-6: NOTRUN -> [SKIP][27] ([i915#3708]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-write:
- bat-mtlp-6: NOTRUN -> [SKIP][28] ([i915#10216] / [i915#3708])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-6/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@gem_lmem_swapping@basic@lmem0:
- bat-dg2-11: [FAIL][29] ([i915#10378]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html
* igt@i915_selftest@live@sanitycheck:
- bat-atsm-1: [INCOMPLETE][31] ([i915#10594]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-atsm-1/igt@i915_selftest@live@sanitycheck.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-atsm-1/igt@i915_selftest@live@sanitycheck.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-dg2-9: [SKIP][33] ([i915#5274]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-dg2-9/igt@kms_force_connector_basic@prune-stale-modes.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-dg2-9/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-dg2-11: [SKIP][35] ([i915#5274]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-dg2-11/igt@kms_force_connector_basic@prune-stale-modes.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-dg2-11/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-mtlp-8: [SKIP][37] ([i915#5274]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-mtlp-8/igt@kms_force_connector_basic@prune-stale-modes.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-mtlp-8/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-dg2-8: [SKIP][39] ([i915#5274]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-dg2-8/igt@kms_force_connector_basic@prune-stale-modes.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-dg2-8/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-dg2-14: [SKIP][41] ([i915#5274]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-dg2-14/igt@kms_force_connector_basic@prune-stale-modes.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-dg2-14/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_frontbuffer_tracking@basic:
- bat-arls-2: [DMESG-WARN][43] ([i915#7507]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15000/bat-arls-2/igt@kms_frontbuffer_tracking@basic.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/bat-arls-2/igt@kms_frontbuffer_tracking@basic.html
[i915#10216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10216
[i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
[i915#10594]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10594
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#11379]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11379
[i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2582
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4342
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#7507]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7507
[i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
[i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
[i915#9413]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9413
[i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9792]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9792
Build changes
-------------
* Linux: CI_DRM_15000 -> Patchwork_135397v1
CI-20190529: 20190529
CI_DRM_15000: edccdf441f1e061f81e0d1d172aa0f37511bbe4d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7900: cec03bdc0e810e09dc7d632ef340f704069d316c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_135397v1: edccdf441f1e061f81e0d1d172aa0f37511bbe4d @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135397v1/index.html
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