From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1C5AEB64D8 for ; Fri, 16 Jun 2023 06:05:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9381010E5A0; Fri, 16 Jun 2023 06:05:20 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id DDE9910E59D for ; Fri, 16 Jun 2023 06:05:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686895518; x=1718431518; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=4s64AdyVHNCcGTrPesGgIf6priKDENKayJ7jjDEf3wM=; b=n1Wwh6xLFoqBaDtYITmSeEYszlTzaVJcEfF+hY1CEuU2B9UHRXs6ASgr YkWhiFu3AxoEWTj05YxMpTR8zIW7gW/FyqOJJZnPS60iuZBSK52bqp8UB owBekVhzpyqVapiShQvnbXskv9vB5nANDsrkROvP1tepv2yzyx3082ePD AStyIKzOfXSBPXArKFA9iFQhva5SX/k+W3rKF2ZYsYz3Kmip9RIiomYB4 itwuF71vWyAXN9oPOqKnpRlAY9n6gTRyiNae9S5Gmsp7bY4gGB5P7/h3L W9DKPRmz+BJY5LKNrYO/TcFkwSUSOZNPNlXbqxwnVVFoMdG4VKY1y6dG9 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="348843021" X-IronPort-AV: E=Sophos;i="6.00,246,1681196400"; d="scan'208";a="348843021" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 22:52:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="836888466" X-IronPort-AV: E=Sophos;i="6.00,246,1681196400"; d="scan'208";a="836888466" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.255.230.186]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 22:52:05 -0700 Date: Thu, 15 Jun 2023 22:33:24 -0700 Message-ID: <87v8fox97f.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Umesh Nerlige Ramappa In-Reply-To: <20230616013850.611281-1-umesh.nerlige.ramappa@intel.com> References: <20230616013850.611281-1-umesh.nerlige.ramappa@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/perf: Determine context valid in OA reports X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lionel G Landwerlin , intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, 15 Jun 2023 18:38:50 -0700, Umesh Nerlige Ramappa wrote: > Hi Umesh, > When supporting OA for TGL, it was seen that the context valid bit in > the report ID was not defined, however revisiting the spec seems to have > this bit defined. The bit is used to determine if a context is valid on > a context switch and is essential to determine active and idle periods > for a context. Re-enable the context valid bit for gen12 platforms. A Bspec reference here would be nice if available. Otherwise this is: Reviewed-by: Ashutosh Dixit > > Fixes: 00a7f0d7155c ("drm/i915/tgl: Add perf support on TGL") > Signed-off-by: Umesh Nerlige Ramappa > --- > drivers/gpu/drm/i915/i915_perf.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c > index 0a111b281578..b5491a382bfd 100644 > --- a/drivers/gpu/drm/i915/i915_perf.c > +++ b/drivers/gpu/drm/i915/i915_perf.c > @@ -482,8 +482,7 @@ static void oa_report_id_clear(struct i915_perf_stream *stream, u32 *report) > static bool oa_report_ctx_invalid(struct i915_perf_stream *stream, void *report) > { > return !(oa_report_id(stream, report) & > - stream->perf->gen8_valid_ctx_bit) && > - GRAPHICS_VER(stream->perf->i915) <= 11; > + stream->perf->gen8_valid_ctx_bit); > } > > static u64 oa_timestamp(struct i915_perf_stream *stream, void *report) > @@ -5096,6 +5095,7 @@ static void i915_perf_init_info(struct drm_i915_private *i915) > perf->gen8_valid_ctx_bit = BIT(16); > break; > case 12: > + perf->gen8_valid_ctx_bit = BIT(16); > /* > * Calculate offset at runtime in oa_pin_context for gen12 and > * cache the value in perf->ctx_oactxctrl_offset. > -- > 2.36.1 >