From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1DEA0ECAAA3 for ; Fri, 26 Aug 2022 20:03:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2268A10E2B9; Fri, 26 Aug 2022 20:03:12 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id DF58D10E2B9 for ; Fri, 26 Aug 2022 20:03:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661544187; x=1693080187; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=AEpAC3N/Lscm1fSgqCaZJ7iccBLD3vhpTHpyU7eZG6w=; b=nY8+IUkAvMsJ6nVDT7VV+IEC74ER08orVQvym/OguHzYnGxZL+cddc52 TAR9k+lhAfhJp2zJplwLHU6GUWI4mi+KwrHZQbww9lHUTyg1TJAYMkeSD woIJgpNLR3yqJr3/L3pie6Md17FqQxO1bXeiYNeHj6kXFQlT9a3j81Mmq tbJPiq6upHq9QriifqUmOnkG70+Mo0yRfe4jHdzTrl4pyZMd1yUnJi7i+ /Z+R0tPqw4gMlNoXFV5kMGA+mrMFbkUe8w42H3cRVgPgD0QGGQh1ytNYX krh1Kfcs2/G0+T/OlafsqAlzxOTcgveCXjyGw0Vh4aPGypmLI4WyuK6U5 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10451"; a="295363258" X-IronPort-AV: E=Sophos;i="5.93,266,1654585200"; d="scan'208";a="295363258" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2022 13:03:07 -0700 X-IronPort-AV: E=Sophos;i="5.93,266,1654585200"; d="scan'208";a="714091192" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.255.229.56]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2022 13:03:06 -0700 Date: Fri, 26 Aug 2022 13:03:05 -0700 Message-ID: <87v8qen56u.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Rodrigo Vivi In-Reply-To: <20220826174434.157513-1-rodrigo.vivi@intel.com> References: <87h71zjgfr.wl-ashutosh.dixit@intel.com> <20220826174434.157513-1-rodrigo.vivi@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/slpc: Fix PCODE IA Freq requests when using SLPC X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, Sushma Venkatesh Reddy , stable@vger.kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, 26 Aug 2022 10:44:34 -0700, Rodrigo Vivi wrote: > > Fixes: 7ba79a671568 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled") > Cc: # v5.15+ > Cc: Ashutosh Dixit > Tested-by: Sushma Venkatesh Reddy > Signed-off-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/gt/intel_llc.c | 24 ++++++++++++++++-------- > 1 file changed, 16 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c > index 14fe65812e42..2677d62573d9 100644 > --- a/drivers/gpu/drm/i915/gt/intel_llc.c > +++ b/drivers/gpu/drm/i915/gt/intel_llc.c > @@ -49,13 +49,28 @@ static unsigned int cpu_max_MHz(void) > static bool get_ia_constants(struct intel_llc *llc, > struct ia_constants *consts) > { > + struct intel_guc_slpc *slpc = &llc_to_gt(llc)->uc.guc.slpc; > struct drm_i915_private *i915 = llc_to_gt(llc)->i915; > struct intel_rps *rps = &llc_to_gt(llc)->rps; > > if (!HAS_LLC(i915) || IS_DGFX(i915)) > return false; > > - if (rps->max_freq <= rps->min_freq) > + if (intel_uc_uses_guc_slpc(&llc_to_gt(llc)->uc)) { > + consts->min_gpu_freq = slpc->min_freq; > + consts->max_gpu_freq = slpc->rp0_freq; > + } else { > + consts->min_gpu_freq = rps->min_freq; > + consts->max_gpu_freq = rps->max_freq; > + } > + > + if (GRAPHICS_VER(i915) >= 9) { > + /* Convert GT frequency to 50 HZ units */ > + consts->min_gpu_freq /= GEN9_FREQ_SCALER; > + consts->max_gpu_freq /= GEN9_FREQ_SCALER; > + } > + > + if (consts->max_gpu_freq <= consts->min_gpu_freq) > return false; Hi Rodrigo, sorry, I missed this check previously too and the code is now equivalent to the previous code. But now, looking at the code in gen6_update_ring_freq, I am wondering if we should return true in this case (i.e. remove the check) and we had a bug in the previous code? Because if we return false, gen6_update_ring_freq will skip the PCODE programming if 'max_gpu_freq == min_gpu_freq', but why should we skip the PCODE programming if 'max_gpu_freq == min_gpu_freq'? The case of 'max_gpu_freq < min_gpu_freq' is fine since the loop in gen6_update_ring_freq is not entered in that case. Thanks. -- Ashutosh