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From: Jani Nikula <jani.nikula@intel.com>
To: Animesh Manna <animesh.manna@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Michel Thierry <michel.thierry@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH 00/15] DSB enablement.
Date: Fri, 09 Aug 2019 12:42:04 +0300	[thread overview]
Message-ID: <87v9v6hdzn.fsf@intel.com> (raw)
In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com>

On Mon, 01 Jul 2019, Animesh Manna <animesh.manna@intel.com> wrote:
> Display State Buffer (DSB) is hardware capability which allows
> driver to batch submit HW programming.
>
> As part of initial enablement common api created which currently used
> to program gamma lut proramming.
>
> Going forwad DSB support can be added for HDR and flip related operation.
>
> Few changes of this patch series is not tested, sending version 1
> for design review, will be testing in parallel.

Our CI reported on the same day that this series oopses on a lot of
platforms. Have you investigated and fixed those issues? Please post the
fixed series.

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Graphics Center
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  parent reply	other threads:[~2019-08-09  9:37 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-01  6:26 [PATCH 00/15] DSB enablement Animesh Manna
2019-07-01  6:26 ` [PATCH 01/15] drm/i915/dsb: feature flag added for display state buffer Animesh Manna
2019-07-01  6:26 ` [PATCH 02/15] drm/i915/dsb: DSB context creation Animesh Manna
2019-07-01  6:26 ` [PATCH 03/15] drm/i915/dsb: single register write function for DSB Animesh Manna
2019-07-01  6:26 ` [PATCH 04/15] drm/i915/dsb: Added enum for reg write capability Animesh Manna
2019-07-01  6:26 ` [PATCH 05/15] drm/i915/dsb: Indexed register write function for DSB Animesh Manna
2019-07-01  6:26 ` [PATCH 06/15] drm/i915/dsb: Update i915_write to call dsb-write Animesh Manna
2019-07-01  6:26 ` [PATCH 07/15] drm/i915/dsb: Register definition of DSB registers Animesh Manna
2019-07-01  6:26 ` [PATCH 08/15] drm/i915/dsb: Check DSB engine status Animesh Manna
2019-07-01  6:26 ` [PATCH 09/15] drm/i915/dsb: functions to enable/disable DSB engine Animesh Manna
2019-07-01  6:26 ` [PATCH 10/15] drm/i915/dsb: function to trigger workload execution of DSB Animesh Manna
2019-07-01  6:26 ` [PATCH 11/15] drm/i915/dsb: function to destroy DSB context Animesh Manna
2019-07-01  6:26 ` [PATCH 12/15] drm/i915/dsb: Early prepare of dsb context Animesh Manna
2019-07-01  6:26 ` [PATCH 13/15] drm/i915/dsb: Cleanup of DSB context Animesh Manna
2019-07-01  6:26 ` [PATCH 14/15] drm/i915/dsb: Documentation for DSB Animesh Manna
2019-07-01  6:26 ` [PATCH 15/15] drm/i915/dsb: Enable gamma lut programming using DSB Animesh Manna
2019-07-01  7:09 ` ✗ Fi.CI.CHECKPATCH: warning for DSB enablement Patchwork
2019-07-01  7:16 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-07-01  7:39 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-01  9:05 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-08-09  9:42 ` Jani Nikula [this message]
2019-08-12  8:52   ` [PATCH 00/15] " Animesh Manna

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