Re: [PATCH 2/2] drm/i915/BXT: Tolerance at BXT DSI pipe_config comparison

Daniel Vetter
2016-04-13T11:57:14Z

On Wed, Apr 13, 2016 at 1:48 PM, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Wed, Apr 13, 2016 at 1:06 PM, Jani Nikula <jani.nikula@intel.com> wrote:
>>> Then fix adjusted_mode to have the timings in terms of txbyteclkhs
>>> already. Problem solved.
>>
>> I let Ville convince me there would be problems with that. Ville, care
>> to fill in the details?
>
> If we change them too hard the accurate vblank timestamp stuff will be
> upset. But then we only need to adjust horizontal timings for dsi,
> whereas on gen5+ the vblank ts code uses the line counter (i.e.
> vertical timings) only.
>
> If it's just that it should work, and I don't think we have any other
> users of the adjusted_mode.

Ok, I was wrong and we obviously need the right dotclock to compute
linedur_ns correctly in drm_calc_timestamping_constants(). So either
we adjust the dotclock of adjusted_mode too (imo makes most sense), or
we need yet another mode somewhere and use that for dsi cross checking
(real ugly imo). More I missed?
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch