From: Jani Nikula <jani.nikula@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: m.deepak@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/bxt: add missing DSI power domain to power well 1
Date: Wed, 09 Mar 2016 10:03:21 +0200 [thread overview]
Message-ID: <87vb4woz7a.fsf@intel.com> (raw)
In-Reply-To: <20160308192101.GS10446@intel.com>
On Tue, 08 Mar 2016, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Mar 08, 2016 at 09:00:56PM +0200, Jani Nikula wrote:
>> The DSI power domain was missing from BXT power well 1 definitions,
>> failing to get the power well for DSI transcoders. As pipe A is in the
>> same power well as DSI transcoders, the problem should only occur with
>> pipes B and C.
>>
>> Cc: Ramalingam C <ramalingam.c@intel.com>
>> Cc: Deepak M <m.deepak@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>>
>> ---
>>
>> This should superseed [1], but a change will be required in
>> haswell_get_pipe_config() or [2] to check the DSI power domain.
>>
>> [1] http://patchwork.freedesktop.org/patch/msgid/1456239619-14808-1-git-send-email-ramalingam.c@intel.com
>> [2] http://patchwork.freedesktop.org/patch/msgid/1456771760-18823-1-git-send-email-ramalingam.c@intel.com
>> ---
>> drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> index 5adf4b337de3..2e88a5e06884 100644
>> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> @@ -421,6 +421,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv,
>> BIT(POWER_DOMAIN_TRANSCODER_EDP) | \
>> BIT(POWER_DOMAIN_PIPE_A_PANEL_FITTER) | \
>> BIT(POWER_DOMAIN_PORT_DDI_A_LANES) | \
>> + BIT(POWER_DOMAIN_PORT_DSI) | \
>
> This is basically a nop since pw1 is under dmc control. But given that
> we still have this stuff defined here, it's clearly correct to include
> DSI here.
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pushed to drm-intel-next-queued, thanks for the review.
None of the CI fails have anything to do with this.
BR,
Jani.
>
>> BIT(POWER_DOMAIN_AUX_A) | \
>> BIT(POWER_DOMAIN_PLLS) | \
>> BIT(POWER_DOMAIN_INIT))
>> --
>> 2.1.4
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-03-09 8:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-08 19:00 [PATCH] drm/i915/bxt: add missing DSI power domain to power well 1 Jani Nikula
2016-03-08 19:21 ` Ville Syrjälä
2016-03-09 8:03 ` Jani Nikula [this message]
2016-03-09 7:32 ` ✗ Fi.CI.BAT: failure for " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87vb4woz7a.fsf@intel.com \
--to=jani.nikula@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=m.deepak@intel.com \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox