From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot Date: Thu, 03 Jul 2014 23:44:34 +0300 Message-ID: <87vbrecgul.fsf@intel.com> References: <87vbrgfcas.fsf@intel.com> <1404290153-26487-1-git-send-email-jani.nikula@intel.com> <53B59471.1030305@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 2AAA46E765 for ; Thu, 3 Jul 2014 13:44:53 -0700 (PDT) In-Reply-To: <53B59471.1030305@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Clint Taylor , intel-gfx@lists.freedesktop.org Cc: jesse.barnes@intel.com List-Id: intel-gfx@lists.freedesktop.org On Thu, 03 Jul 2014, Clint Taylor wrote: > On 07/02/2014 01:35 AM, Jani Nikula wrote: >> From: Clint Taylor >> >> The panel power sequencer on vlv doesn't appear to accept changes to its >> T12 power down duration during warm reboots. This change forces a delay >> for warm reboots to the T12 panel timing as defined in the VBT table for >> the connected panel. >> >> Ver2: removed redundant pr_crit(), commented magic value for pp_div_reg >> >> Ver3: moved SYS_RESTART check earlier, new name for pp_div. >> >> Ver4: Minor issue changes >> >> Signed-off-by: Clint Taylor >> [Jani: rebased on current -nightly.] >> Signed-off-by: Jani Nikula >> >> --- >> >> I ended up doing the rebase myself, but I'd like to have a quick review >> before pushing. > > Quick review complete. Everything appears OK. See Paulo's review; want to take over? Jani. > > >> >> Thanks, >> Jani. >> --- >> drivers/gpu/drm/i915/intel_dp.c | 40 ++++++++++++++++++++++++++++++++++++++++ >> drivers/gpu/drm/i915/intel_drv.h | 2 ++ >> 2 files changed, 42 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >> index b5ec48913b47..f0d23c435cf6 100644 >> --- a/drivers/gpu/drm/i915/intel_dp.c >> +++ b/drivers/gpu/drm/i915/intel_dp.c >> @@ -28,6 +28,8 @@ >> #include >> #include >> #include >> +#include >> +#include >> #include >> #include >> #include >> @@ -336,6 +338,36 @@ static u32 _pp_stat_reg(struct intel_dp *intel_dp) >> return VLV_PIPE_PP_STATUS(vlv_power_sequencer_pipe(intel_dp)); >> } >> >> +/* Reboot notifier handler to shutdown panel power to guarantee T12 timing */ >> +static int edp_notify_handler(struct notifier_block *this, unsigned long code, >> + void *unused) >> +{ >> + struct intel_dp *intel_dp = container_of(this, typeof(* intel_dp), >> + edp_notifier); >> + struct drm_device *dev = intel_dp_to_dev(intel_dp); >> + struct drm_i915_private *dev_priv = dev->dev_private; >> + u32 pp_div; >> + u32 pp_ctrl_reg, pp_div_reg; >> + enum pipe pipe = vlv_power_sequencer_pipe(intel_dp); >> + >> + if (!is_edp(intel_dp) || code != SYS_RESTART) >> + return 0; >> + >> + if (IS_VALLEYVIEW(dev)) { >> + pp_ctrl_reg = VLV_PIPE_PP_CONTROL(pipe); >> + pp_div_reg = VLV_PIPE_PP_DIVISOR(pipe); >> + pp_div = I915_READ(VLV_PIPE_PP_DIVISOR(pipe)); >> + pp_div &= PP_REFERENCE_DIVIDER_MASK; >> + >> + /* 0x1F write to PP_DIV_REG sets max cycle delay */ >> + I915_WRITE(pp_div_reg, pp_div | 0x1F); >> + I915_WRITE(pp_ctrl_reg, PANEL_UNLOCK_REGS | PANEL_POWER_OFF); >> + msleep(intel_dp->panel_power_cycle_delay); >> + } >> + >> + return 0; >> +} >> + >> static bool edp_have_panel_power(struct intel_dp *intel_dp) >> { >> struct drm_device *dev = intel_dp_to_dev(intel_dp); >> @@ -3785,6 +3817,10 @@ void intel_dp_encoder_destroy(struct drm_encoder *encoder) >> drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); >> edp_panel_vdd_off_sync(intel_dp); >> drm_modeset_unlock(&dev->mode_config.connection_mutex); >> + if (intel_dp->edp_notifier.notifier_call) { >> + unregister_reboot_notifier(&intel_dp->edp_notifier); >> + intel_dp->edp_notifier.notifier_call = NULL; >> + } >> } >> kfree(intel_dig_port); >> } >> @@ -4353,6 +4389,10 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, >> if (is_edp(intel_dp)) { >> intel_dp_init_panel_power_timestamps(intel_dp); >> intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq); >> + if (IS_VALLEYVIEW(dev)) { >> + intel_dp->edp_notifier.notifier_call = edp_notify_handler; >> + register_reboot_notifier(&intel_dp->edp_notifier); >> + } >> } >> >> intel_dp_aux_init(intel_dp, intel_connector); >> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h >> index 5f7c7bd94d90..87d1715db21d 100644 >> --- a/drivers/gpu/drm/i915/intel_drv.h >> +++ b/drivers/gpu/drm/i915/intel_drv.h >> @@ -541,6 +541,8 @@ struct intel_dp { >> unsigned long last_power_cycle; >> unsigned long last_power_on; >> unsigned long last_backlight_off; >> + struct notifier_block edp_notifier; >> + >> bool use_tps3; >> struct intel_connector *attached_connector; >> >> > -- Jani Nikula, Intel Open Source Technology Center