From: Jani Nikula <jani.nikula@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>, intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 3/5] drm/i915: check for more ASLC interrupts
Date: Fri, 13 Sep 2013 13:23:43 +0300 [thread overview]
Message-ID: <87vc25m34g.fsf@intel.com> (raw)
In-Reply-To: <1379005101-1500-3-git-send-email-przanoni@gmail.com>
On Thu, 12 Sep 2013, Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Sometimes I see the "non asle set request??" message on my Haswell
> machine, so I decided to get the spec and see if some bits are missing
> from the mask. We do have some bits missing from the mask, so this
> patch adds them. But I still see the "non asle set request??" message
> on my machine :(
>
> Also use the proper ASLC name to indicate the registers we're talking
> about.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/intel_opregion.c | 33 ++++++++++++++++++++++-----------
> 1 file changed, 22 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
> index c4fb2ae..a01e0f8 100644
> --- a/drivers/gpu/drm/i915/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/intel_opregion.c
> @@ -117,12 +117,17 @@ struct opregion_asle {
> #define ASLE_ARDY_READY (1 << 0)
> #define ASLE_ARDY_NOT_READY (0 << 0)
>
> -/* ASLE irq request bits */
> -#define ASLE_SET_ALS_ILLUM (1 << 0)
> -#define ASLE_SET_BACKLIGHT (1 << 1)
> -#define ASLE_SET_PFIT (1 << 2)
> -#define ASLE_SET_PWM_FREQ (1 << 3)
> -#define ASLE_REQ_MSK 0xf
> +/* ASLE Interrupt Command (ASLC) bits */
> +#define ASLC_SET_ALS_ILLUM (1 << 0)
> +#define ASLC_SET_BACKLIGHT (1 << 1)
> +#define ASLC_SET_PFIT (1 << 2)
> +#define ASLC_SET_PWM_FREQ (1 << 3)
> +#define ASLC_SUPPORTED_ROTATION_ANGLES (1 << 4)
> +#define ASLC_BUTTON_ARRAY (1 << 5)
> +#define ASLC_CONVERTIBLE_INDICATOR (1 << 6)
> +#define ASLC_DOCKING_INDICATOR (1 << 7)
> +#define ASLC_ISCT_STATE_CHANGE (1 << 8)
> +#define ASLC_REQ_MSK 0x1ff
While at it, please also s/ASLE/ASLC/ on the response bits, and add the
correspoinding response defines for the added bits above.
> /* response bits of ASLE irq request */
> #define ASLE_ALS_ILLUM_FAILED (1<<10)
> @@ -421,25 +426,31 @@ void intel_opregion_asle_intr(struct drm_device *dev)
> if (!asle)
> return;
>
> - asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;
> + asle_req = ioread32(&asle->aslc) & ASLC_REQ_MSK;
>
> if (!asle_req) {
> DRM_DEBUG_DRIVER("non asle set request??\n");
Maybe we should log the original ioread32(&asle->aslc) in this case.
> return;
> }
>
> - if (asle_req & ASLE_SET_ALS_ILLUM)
> + if (asle_req & ASLC_SET_ALS_ILLUM)
> asle_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
>
> - if (asle_req & ASLE_SET_BACKLIGHT)
> + if (asle_req & ASLC_SET_BACKLIGHT)
> asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
>
> - if (asle_req & ASLE_SET_PFIT)
> + if (asle_req & ASLC_SET_PFIT)
> asle_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
>
> - if (asle_req & ASLE_SET_PWM_FREQ)
> + if (asle_req & ASLC_SET_PWM_FREQ)
> asle_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
>
> + if (asle_req & (ASLC_SUPPORTED_ROTATION_ANGLES | ASLC_BUTTON_ARRAY |
> + ASLC_CONVERTIBLE_INDICATOR | ASLC_DOCKING_INDICATOR |
> + ASLC_ISCT_STATE_CHANGE)) {
> + DRM_DEBUG_DRIVER("ASLC interrupt not supported\n");
Should we report failure for these, similar to what everything other
than the backlight request do?
BR,
Jani.
> + }
> +
> iowrite32(asle_stat, &asle->aslc);
> }
>
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
next prev parent reply other threads:[~2013-09-13 10:21 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-12 16:58 [PATCH 1/5] drm/i915: don't save/restore LBB on Gen5+ Paulo Zanoni
2013-09-12 16:58 ` [PATCH 2/5] drm/i915: WARN if the DP aux read is too big Paulo Zanoni
2013-09-12 17:15 ` Chris Wilson
2013-09-12 21:03 ` [PATCH 2/5] drm/i915: fix intel_dp_aux_native_read's reply array size Paulo Zanoni
2013-09-13 9:21 ` Jani Nikula
2013-09-13 12:53 ` Damien Lespiau
2013-09-13 13:41 ` Jani Nikula
2013-09-13 13:50 ` Damien Lespiau
2013-09-16 19:26 ` Paulo Zanoni
2013-09-12 16:58 ` [PATCH 3/5] drm/i915: check for more ASLC interrupts Paulo Zanoni
2013-09-13 10:23 ` Jani Nikula [this message]
2013-09-12 16:58 ` [PATCH 4/5] drm/i915: clear opregon->lid_state after we unmap it Paulo Zanoni
2013-09-13 13:53 ` Rodrigo Vivi
2013-09-12 16:58 ` [PATCH 5/5] drm/i915: check for errors on i915_drm_thaw Paulo Zanoni
2013-09-12 17:10 ` Chris Wilson
2013-09-12 21:06 ` [PATCH 6/5] drm/i915: move more code to __i915_drm_thaw Paulo Zanoni
2013-09-12 21:44 ` Chris Wilson
2013-09-13 9:40 ` Daniel Vetter
2013-09-12 17:36 ` [PATCH 1/5] drm/i915: don't save/restore LBB on Gen5+ Ville Syrjälä
2013-09-13 9:41 ` Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87vc25m34g.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=paulo.r.zanoni@intel.com \
--cc=przanoni@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox