From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32B45C4332F for ; Wed, 19 Oct 2022 23:41:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A45BC10E170; Wed, 19 Oct 2022 23:41:12 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 28C1110E170; Wed, 19 Oct 2022 23:41:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666222867; x=1697758867; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=0nTXPRUfKJ1yfC+94li1b10lkZ7ZEfCVohCFDHsiNYA=; b=Z9xl9ea0DKL+LN6HsAFc2W7/dkhe/3LtOuDhLLQ19LMGaZcAPKzc33Hx 43yZ1oWpNySID6CWtf9LssQcfkjEIUMdyWllymzKNL8ofVstbGScgDNmc tN7tVq1nD/CovaxVagx4ZXG0Kb7CD+a2+FVUIxxNzM9jUq/2fm+9fAKu6 MLyQYj0a2k6eKFZ1Cv0nYF4xa7DBkEQCR/L9/WPxdGbHcmJBPkHAYCizh 6NL4hkL2fLlGSRzwSTpKQlaV4I0b0TzQjdg+nAUQ8rZ9bBSso9r6RYRN5 GpG6ZJRXypoJvdPhF3RUl4CzTLxz0qh+5mGUrLzpm3zkZHE61e3MBxO2F Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10505"; a="308240422" X-IronPort-AV: E=Sophos;i="5.95,196,1661842800"; d="scan'208";a="308240422" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2022 16:41:06 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10505"; a="662709999" X-IronPort-AV: E=Sophos;i="5.95,196,1661842800"; d="scan'208";a="662709999" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.209.69.147]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2022 16:41:06 -0700 Date: Wed, 19 Oct 2022 16:40:51 -0700 Message-ID: <87wn8vidq4.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Jani Nikula In-Reply-To: <87fsfki73i.fsf@intel.com> References: <20221019052043.3193842-1-ashutosh.dixit@intel.com> <20221019052043.3193842-4-ashutosh.dixit@intel.com> <87fsfki73i.fsf@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915/gt: Use RC6 residency types as arguments to residency functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, 19 Oct 2022 00:51:45 -0700, Jani Nikula wrote: > > On Tue, 18 Oct 2022, Ashutosh Dixit wrote: > > diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.h b/drivers/gpu/drm/i915/gt/intel_rc6.h > > index b6fea71afc223..3105bc72c096b 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_rc6.h > > +++ b/drivers/gpu/drm/i915/gt/intel_rc6.h > > @@ -6,7 +6,7 @@ > > #ifndef INTEL_RC6_H > > #define INTEL_RC6_H > > > > -#include "i915_reg_defs.h" > > +#include "intel_rc6_types.h" > > > > struct intel_engine_cs; > > struct intel_rc6; > > @@ -21,7 +21,9 @@ void intel_rc6_sanitize(struct intel_rc6 *rc6); > > void intel_rc6_enable(struct intel_rc6 *rc6); > > void intel_rc6_disable(struct intel_rc6 *rc6); > > > > -u64 intel_rc6_residency_ns(struct intel_rc6 *rc6, i915_reg_t reg); > > -u64 intel_rc6_residency_us(struct intel_rc6 *rc6, i915_reg_t reg); > > +u64 intel_rc6_residency_ns(struct intel_rc6 *rc6, enum intel_rc6_res_type id); > > +u64 intel_rc6_residency_us(struct intel_rc6 *rc6, enum intel_rc6_res_type id); > > +void intel_rc6_print_residency(struct seq_file *m, const char *title, > > + enum intel_rc6_res_type id); > > > > #endif /* INTEL_RC6_H */ > > Please apply this on top to avoid includes from includes. > > > diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.h b/drivers/gpu/drm/i915/gt/intel_rc6.h > index 3105bc72c096..456fa668a276 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rc6.h > +++ b/drivers/gpu/drm/i915/gt/intel_rc6.h > @@ -6,10 +6,11 @@ > #ifndef INTEL_RC6_H > #define INTEL_RC6_H > > -#include "intel_rc6_types.h" > +#include > > -struct intel_engine_cs; > +enum intel_rc6_res_type; > struct intel_rc6; > +struct seq_file; > > void intel_rc6_init(struct intel_rc6 *rc6); > void intel_rc6_fini(struct intel_rc6 *rc6); Thanks, done in series version v8. Ashutosh