From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2BD9C433F5 for ; Tue, 25 Jan 2022 05:38:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6E5BD10E657; Tue, 25 Jan 2022 05:38:19 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8CC9610E657 for ; Tue, 25 Jan 2022 05:38:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643089098; x=1674625098; h=from:to:subject:in-reply-to:references:date:message-id: mime-version:content-transfer-encoding; bh=1CfpGmMQ+dyTE5Z+6KrkuG0f7lq0l5AgDheILItegrc=; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Intel-gfx] [PATCH 4/5] drm/i915: Extract hsw_configure_cpu_transcoder() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 24 Jan 2022, Ville Syrjala wrote: > From: Ville Syrj=C3=A4l=C3=A4 > > Pull the transcoder specific modeset steps into a single place. > With bigoiner we need to keep in mind wheher we're dealing with > the transcoder or the pipe, and a slightly higher level split makes > that easier. > > Signed-off-by: Ville Syrj=C3=A4l=C3=A4 Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_display.c | 38 ++++++++++++-------- > 1 file changed, 23 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/d= rm/i915/display/intel_display.c > index c23c854f212f..d2906434ab3f 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -2012,6 +2012,27 @@ static void icl_ddi_bigjoiner_pre_enable(struct in= tel_atomic_state *state, > intel_uncompressed_joiner_enable(crtc_state); > } >=20=20 > +static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *= crtc_state) > +{ > + struct intel_crtc *crtc =3D to_intel_crtc(crtc_state->uapi.crtc); > + struct drm_i915_private *dev_priv =3D to_i915(crtc->base.dev); > + enum transcoder cpu_transcoder =3D crtc_state->cpu_transcoder; > + > + intel_set_transcoder_timings(crtc_state); > + > + if (cpu_transcoder !=3D TRANSCODER_EDP) > + intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder), > + crtc_state->pixel_multiplier - 1); > + > + if (crtc_state->has_pch_encoder) > + intel_cpu_transcoder_set_m_n(crtc_state, > + &crtc_state->fdi_m_n, NULL); > + > + hsw_set_frame_start_delay(crtc_state); > + > + hsw_set_transconf(crtc_state); > +} > + > static void hsw_crtc_enable(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > @@ -2040,21 +2061,8 @@ static void hsw_crtc_enable(struct intel_atomic_st= ate *state, > if (DISPLAY_VER(dev_priv) >=3D 9 || IS_BROADWELL(dev_priv)) > bdw_set_pipemisc(new_crtc_state); >=20=20 > - if (!new_crtc_state->bigjoiner_slave && !transcoder_is_dsi(cpu_transcod= er)) { > - intel_set_transcoder_timings(new_crtc_state); > - > - if (cpu_transcoder !=3D TRANSCODER_EDP) > - intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder), > - new_crtc_state->pixel_multiplier - 1); > - > - if (new_crtc_state->has_pch_encoder) > - intel_cpu_transcoder_set_m_n(new_crtc_state, > - &new_crtc_state->fdi_m_n, NULL); > - > - hsw_set_frame_start_delay(new_crtc_state); > - > - hsw_set_transconf(new_crtc_state); > - } > + if (!new_crtc_state->bigjoiner_slave && !transcoder_is_dsi(cpu_transcod= er)) > + hsw_configure_cpu_transcoder(new_crtc_state); >=20=20 > crtc->active =3D true; --=20 Jani Nikula, Intel Open Source Graphics Center